--- nono/m680x0/m68030ops.cpp	2026/04/29 17:05:15	1.1.1.5
+++ nono/m680x0/m68030ops.cpp	2026/04/29 17:05:26	1.1.1.8
@@ -54,7 +54,7 @@ OP_DEF(ori_b)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16() & 0xff;
+	uint32 src = fetch_2() & 0xff;
 	if (n < 8) {
 		// ORI.B #<imm>,Dn
 		CYCLE(2);
@@ -62,17 +62,17 @@ OP_DEF(ori_b)
 		ACC.move_8(dst);
 		reg.D[n] = (reg.D[n] & 0xffffff00) | dst;
 	} else if (n == 0b111100) {
-		// ORI.B #<imm>,SR
+		// ORI.B #<imm>,CCR
 		CYCLE2(12, 14);
 		CCR.Set(CCR.Get() | src);
 	} else {
 		// ORI.B #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst |= src;
 		ACC.move_8(dst);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -85,7 +85,7 @@ OP_DEF(ori_w)
 	if (n < 8) {
 		// ORI.W #<imm>,Dn
 		CYCLE(2);
-		uint32 src = fetch_16();
+		uint32 src = fetch_2();
 		uint32 dst = (reg.D[n] & 0xffff) | src;
 		ACC.move_16(dst);
 		reg.D[n] = (reg.D[n] & 0xffff0000) | dst;
@@ -93,17 +93,17 @@ OP_DEF(ori_w)
 		// ORI.W #<imm>,SR
 		SUPERVISOR_OP;
 		CYCLE2(12, 14);
-		uint32 src = fetch_16();
+		uint32 src = fetch_2();
 		SetSR(GetSR() | src);
 	} else {
 		// ORI.W #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 src = fetch_16();
-		uint32 ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint32 src = fetch_2();
+		uint32 ea = cea_data_2();
+		uint32 dst = read_2(ea);
 		dst |= src;
 		ACC.move_16(dst);
-		write_16(ea, dst);
+		write_2(ea, dst);
 	}
 }
 
@@ -112,7 +112,7 @@ OP_DEF(ori_l)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_32();
+	uint32 src = fetch_4();
 	if (n < 8) {
 		// ORI.L #<imm>,Dn
 		CYCLE(2);
@@ -121,18 +121,18 @@ OP_DEF(ori_l)
 	} else {
 		// ORI.L #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 dst = read_4(ea);
 		dst |= src;
 		ACC.move_32(dst);
-		write_32(ea, dst);
+		write_4(ea, dst);
 	}
 }
 
 // %0000_000011_mmmrrr	CMP2/CHK2.B <ea>,Rn
 OP_DEF(cmp2chk2_b)
 {
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint32 compare;
 	uint32 ea = cea_ctrl();
 	uint32 lower;
@@ -148,8 +148,8 @@ OP_DEF(cmp2chk2_b)
 
 	// 本当は PC 相対ならプログラム空間アクセス、
 	// それ以外はデータ空間アクセスだが、ここでは区別しない。
-	lower = (int32)(int8)read_8(ea);
-	upper = (int32)(int8)read_8(ea + 1);
+	lower = (int32)(int8)read_1(ea);
+	upper = (int32)(int8)read_1(ea + 1);
 
 	ACC.chk2cmp2_32(compare, lower, upper);
 
@@ -173,7 +173,7 @@ OP_DEF(cmp2chk2_b)
 void
 MPU680x0Device::ops_movep()
 {
-	uint32 disp = (int32)(int16)fetch_16();
+	uint32 disp = (int32)(int16)fetch_2();
 	uint32 ea = RegAY + disp;
 	bool size_long = ((ir & 0x40) != 0);
 	bool reg2mem = ((ir & 0x80) != 0);
@@ -184,30 +184,30 @@ MPU680x0Device::ops_movep()
 		// Dx -> memory
 		uint32 dx = RegDX;
 		if (size_long) {
-			write_8(ea, (dx >> 24));
+			write_1(ea, (dx >> 24));
 			ea += 2;
-			write_8(ea, (dx >> 16) & 0xff);
+			write_1(ea, (dx >> 16) & 0xff);
 			ea += 2;
 		}
-		write_8(ea, (dx >> 8) & 0xff);
+		write_1(ea, (dx >> 8) & 0xff);
 		ea += 2;
-		write_8(ea, (dx & 0xff));
+		write_1(ea, (dx & 0xff));
 	} else {
 		// memory -> Dx
 		uint32 dx = 0;
 		if (size_long) {
-			dx = read_8(ea);
+			dx = read_1(ea);
 			dx <<= 8;
 			ea += 2;
-			dx |= read_8(ea);
+			dx |= read_1(ea);
 			dx <<= 8;
 			ea += 2;
 		}
 		// word
-		dx |= read_8(ea);
+		dx |= read_1(ea);
 		dx <<= 8;
 		ea += 2;
-		dx |= read_8(ea);
+		dx |= read_1(ea);
 
 		if (size_long) {
 			RegDX = dx;
@@ -236,7 +236,7 @@ OP_DEF(btst_dn_ea)
 		// BTST.B Dx,<ea>
 		CYCLE(4);
 		uint bit = (RegDX & 7);
-		uint32 data = fea_data_8();
+		uint32 data = fea_data_1();
 		ACC.btst(data, bit);
 	}
 }
@@ -260,10 +260,10 @@ OP_DEF(bchg_dn_ea)
 		// BCHG.B Dx,<ea>
 		CYCLE(6);
 		uint bit = (RegDX & 7);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.bchg(data, bit);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -286,10 +286,10 @@ OP_DEF(bclr_dn_ea)
 		// BCLR.B Dx,<ea>
 		CYCLE(6);
 		uint bit = (RegDX & 7);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.bclr(data, bit);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -312,10 +312,10 @@ OP_DEF(bset_dn_ea)
 		// BSET.B Dx,<ea>
 		CYCLE(6);
 		uint bit = (RegDX & 7);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.bset(data, bit);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -325,7 +325,7 @@ OP_DEF(andi_b)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16() & 0xff;
+	uint32 src = fetch_2() & 0xff;
 	if (n < 8) {
 		// ANDI.B #<imm>,Dn
 		CYCLE(2);
@@ -340,11 +340,11 @@ OP_DEF(andi_b)
 	} else {
 		// ANDI.B #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst &= src;
 		ACC.move_8(dst);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -357,7 +357,7 @@ OP_DEF(andi_w)
 	if (n < 8) {
 		// ANDI.W #<imm>,Dn
 		CYCLE(2);
-		uint32 src = fetch_16();
+		uint32 src = fetch_2();
 		uint32 dst = reg.D[n] & 0xffff;
 		dst &= src;
 		ACC.move_16(dst);
@@ -366,17 +366,17 @@ OP_DEF(andi_w)
 		// ANDI.W #<imm>,SR
 		SUPERVISOR_OP;
 		CYCLE2(12, 14);
-		uint32 src = fetch_16();
+		uint32 src = fetch_2();
 		SetSR(GetSR() & src);
 	} else {
 		// ANDI.W #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 src = fetch_16();
-		uint32 ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint32 src = fetch_2();
+		uint32 ea = cea_data_2();
+		uint32 dst = read_2(ea);
 		dst &= src;
 		ACC.move_16(dst);
-		write_16(ea, dst);
+		write_2(ea, dst);
 	}
 }
 
@@ -385,7 +385,7 @@ OP_DEF(andi_l)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_32();
+	uint32 src = fetch_4();
 	if (n < 8) {
 		// ANDI.L #<imm>,Dn
 		CYCLE(2);
@@ -394,18 +394,18 @@ OP_DEF(andi_l)
 	} else {
 		// ANDI.L #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 dst = read_4(ea);
 		dst &= src;
 		ACC.move_32(dst);
-		write_32(ea, dst);
+		write_4(ea, dst);
 	}
 }
 
 // %0000_001011_mmmrrr	CMP2/CHK2.W <ea>,Rn
 OP_DEF(cmp2chk2_w)
 {
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint32 compare;
 	uint32 ea = cea_ctrl();
 	uint32 lower;
@@ -421,8 +421,8 @@ OP_DEF(cmp2chk2_w)
 
 	// 本当は PC 相対ならプログラム空間アクセス、
 	// それ以外はデータ空間アクセスだが、ここでは区別しない。
-	lower = (int32)(int16)read_16(ea);
-	upper = (int32)(int16)read_16(ea + 2);
+	lower = (int32)(int16)read_2(ea);
+	upper = (int32)(int16)read_2(ea + 2);
 
 	ACC.chk2cmp2_32(compare, lower, upper);
 
@@ -446,7 +446,7 @@ OP_DEF(subi_b)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16() & 0xff;
+	uint32 src = fetch_2() & 0xff;
 	if (n < 8) {
 		// SUBI.B #<imm>,Dn
 		CYCLE(2);
@@ -456,10 +456,10 @@ OP_DEF(subi_b)
 	} else {
 		// SUBI.B #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst = ACC.sub_8(src, dst);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -468,7 +468,7 @@ OP_DEF(subi_w)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16();
+	uint32 src = fetch_2();
 	if (n < 8) {
 		// SUBI.W #<imm>,Dn
 		CYCLE(2);
@@ -478,10 +478,10 @@ OP_DEF(subi_w)
 	} else {
 		// SUBI.W #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 dst = read_2(ea);
 		dst = ACC.sub_16(src, dst);
-		write_16(ea, dst);
+		write_2(ea, dst);
 	}
 }
 
@@ -490,7 +490,7 @@ OP_DEF(subi_l)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_32();
+	uint32 src = fetch_4();
 	if (n < 8) {
 		// SUBI.L #<imm>,Dn
 		CYCLE(2);
@@ -498,17 +498,17 @@ OP_DEF(subi_l)
 	} else {
 		// SUBI.L #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 dst = read_4(ea);
 		dst = ACC.sub_32(src, dst);
-		write_32(ea, dst);
+		write_4(ea, dst);
 	}
 }
 
 // %0000_010011_mmmrrr	CMP2/CHK2.L <ea>,Rn
 OP_DEF(cmp2chk2_l)
 {
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint32 compare = reg.R[ir2 >> 12];
 	uint32 ea = cea_ctrl();
 	uint32 lower;
@@ -516,8 +516,8 @@ OP_DEF(cmp2chk2_l)
 
 	// 本当は PC 相対ならプログラム空間アクセス、
 	// それ以外はデータ空間アクセスだが、ここでは区別しない。
-	lower = read_32(ea);
-	upper = read_32(ea + 4);
+	lower = read_4(ea);
+	upper = read_4(ea + 4);
 
 	ACC.chk2cmp2_32(compare, lower, upper);
 
@@ -541,7 +541,7 @@ OP_DEF(addi_b)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16() & 0xff;
+	uint32 src = fetch_2() & 0xff;
 	if (n < 8) {
 		// ADDI.B #<imm>,Dn
 		CYCLE(2);
@@ -551,10 +551,10 @@ OP_DEF(addi_b)
 	} else {
 		// ADDI.B #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst = ACC.add_8(src, dst);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -563,7 +563,7 @@ OP_DEF(addi_w)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16();
+	uint32 src = fetch_2();
 	if (n < 8) {
 		// ADDI.W #<imm>,Dn
 		CYCLE(2);
@@ -573,10 +573,10 @@ OP_DEF(addi_w)
 	} else {
 		// ADDI.W #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 dst = read_2(ea);
 		dst = ACC.add_16(src, dst);
-		write_16(ea, dst);
+		write_2(ea, dst);
 	}
 }
 
@@ -585,7 +585,7 @@ OP_DEF(addi_l)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_32();
+	uint32 src = fetch_4();
 	if (n < 8) {
 		// ADDI.L #<imm>,Dn
 		CYCLE(2);
@@ -593,10 +593,10 @@ OP_DEF(addi_l)
 	} else {
 		// ADDI.L #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 dst = read_4(ea);
 		dst = ACC.add_32(src, dst);
-		write_32(ea, dst);
+		write_4(ea, dst);
 	}
 }
 
@@ -616,7 +616,7 @@ OP_DEF(btst_imm_ea)
 	if (n < 8) {
 		// BTST.L #<imm>,Dy
 		CYCLE(4);
-		uint bit = fetch_16() & 31;
+		uint bit = fetch_2() & 31;
 		ACC.btst(RegDY, bit);
 	} else if (n == 0x3c) {
 		// BTST.B #<imm>,<ea> の <ea> には #imm はない
@@ -624,8 +624,8 @@ OP_DEF(btst_imm_ea)
 	} else {
 		// BTST.B #<imm>,<ea>
 		CYCLE(4);
-		uint bit = fetch_16() & 7;
-		uint32 data = fea_data_8();
+		uint bit = fetch_2() & 7;
+		uint32 data = fea_data_1();
 		ACC.btst(data, bit);
 	}
 }
@@ -639,7 +639,7 @@ OP_DEF(bchg_imm_ea)
 	if (n < 8) {
 		// BCHG.L #<imm>,Dy
 		CYCLE(6);
-		uint bit = fetch_16() & 31;
+		uint bit = fetch_2() & 31;
 		RegDY = ACC.bchg(RegDY, bit);
 	} else if (n == 0x3c) {
 		// BCHG.B #<imm>,<ea> の <ea> には #imm はない
@@ -647,11 +647,11 @@ OP_DEF(bchg_imm_ea)
 	} else {
 		// BCHG.B #<imm>,<ea>
 		CYCLE(6);
-		uint bit = fetch_16() & 7;
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint bit = fetch_2() & 7;
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.bchg(data, bit);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -664,7 +664,7 @@ OP_DEF(bclr_imm_ea)
 	if (n < 8) {
 		// BCLR.L #<imm>,Dy
 		CYCLE(6);
-		uint bit = fetch_16() & 31;
+		uint bit = fetch_2() & 31;
 		RegDY = ACC.bclr(RegDY, bit);
 	} else if (n == 0x3c) {
 		// BCLR.B #<imm>,<ea> の <ea> には #imm はない
@@ -672,11 +672,11 @@ OP_DEF(bclr_imm_ea)
 	} else {
 		// BCLR.B #<imm>,<ea>
 		CYCLE(6);
-		uint bit = fetch_16() & 7;
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint bit = fetch_2() & 7;
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.bclr(data, bit);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -689,7 +689,7 @@ OP_DEF(bset_imm_ea)
 	if (n < 8) {
 		// BSET.L #<imm>,Dy
 		CYCLE(6);
-		uint bit = fetch_16() & 31;
+		uint bit = fetch_2() & 31;
 		RegDY = ACC.bset(RegDY, bit);
 	} else if (n == 0x3c) {
 		// BSET.B #<imm>,<ea> の <ea> には #imm はない
@@ -697,11 +697,11 @@ OP_DEF(bset_imm_ea)
 	} else {
 		// BSET.B #<imm>,<ea>
 		CYCLE(6);
-		uint bit = fetch_16() & 7;
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint bit = fetch_2() & 7;
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.bset(data, bit);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -711,7 +711,7 @@ OP_DEF(eori_b)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_16() & 0xff;
+	uint32 src = fetch_2() & 0xff;
 	if (n < 8) {
 		// EORI.B #<imm>,Dn
 		CYCLE(2);
@@ -719,17 +719,17 @@ OP_DEF(eori_b)
 		ACC.move_8(dst);
 		reg.D[n] = (reg.D[n] & 0xffffff00) | dst;
 	} else if (n == 0b111100) {
-		// EORI.B #<imm>,SR
+		// EORI.B #<imm>,CCR
 		CYCLE2(12, 14);
 		CCR.Set(CCR.Get() ^ src);
 	} else {
 		// EORI.B #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst ^= src;
 		ACC.move_8(dst);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -742,7 +742,7 @@ OP_DEF(eori_w)
 	if (n < 8) {
 		// EORI.W #<imm>,Dn
 		CYCLE(2);
-		uint32 src = fetch_16();
+		uint32 src = fetch_2();
 		uint32 dst = (reg.D[n] & 0xffff) ^ src;
 		ACC.move_16(dst);
 		reg.D[n] = (reg.D[n] & 0xffff0000) | dst;
@@ -750,17 +750,17 @@ OP_DEF(eori_w)
 		// EORI.W #<imm>,SR
 		SUPERVISOR_OP;
 		CYCLE2(12, 14);
-		uint32 src = fetch_16();
+		uint32 src = fetch_2();
 		SetSR(GetSR() ^ src);
 	} else {
 		// EORI.W #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 src = fetch_16();
-		uint32 ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint32 src = fetch_2();
+		uint32 ea = cea_data_2();
+		uint32 dst = read_2(ea);
 		dst ^= src;
 		ACC.move_16(dst);
-		write_16(ea, dst);
+		write_2(ea, dst);
 	}
 }
 
@@ -769,7 +769,7 @@ OP_DEF(eori_l)
 {
 	uint n = ir & 0x3f;
 
-	uint32 src = fetch_32();
+	uint32 src = fetch_4();
 	if (n < 8) {
 		// EORI.L #<imm>,Dn
 		CYCLE(2);
@@ -778,30 +778,30 @@ OP_DEF(eori_l)
 	} else {
 		// EORI.L #<imm>,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 dst = read_4(ea);
 		dst ^= src;
 		ACC.move_32(dst);
-		write_32(ea, dst);
+		write_4(ea, dst);
 	}
 }
 
 // %0000_101011_mmmrrr	CAS.B Dc,Du,<ea>
 OP_DEF(cas_b)
 {
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint c = ir2 & 7;
 	uint u = (ir2 >> 6) & 7;
 	uint32 dc = reg.D[c] & 0xff;
 	uint32 du = reg.D[u] & 0xff;
-	uint ea = cea_data_8();
-	uint32 dst = read_8(ea);
+	uint ea = cea_data_1();
+	uint32 dst = read_1(ea);
 
 	ACC.cmp_8(dc, dst);
 	if (CCR.IsZ()) {
 		// 等しければ、Du -> dst
 		CYCLE(13);
-		write_8(ea, du);
+		write_1(ea, du);
 	} else {
 		// そうでなければ、dst -> Dc
 		CYCLE(11);
@@ -820,8 +820,8 @@ OP_DEF(cmpi_b)
 		return;
 	}
 	CYCLE(2);
-	uint32 src = fetch_16() & 0xff;
-	uint32 dst = fea_data_8();
+	uint32 src = fetch_2() & 0xff;
+	uint32 dst = fea_data_1();
 	ACC.cmp_8(src, dst);
 }
 
@@ -836,8 +836,8 @@ OP_DEF(cmpi_w)
 		return;
 	}
 	CYCLE(2);
-	uint32 src = fetch_16();
-	uint32 dst = fea_data_16();
+	uint32 src = fetch_2();
+	uint32 dst = fea_data_2();
 	ACC.cmp_16(src, dst);
 }
 
@@ -852,8 +852,8 @@ OP_DEF(cmpi_l)
 		return;
 	}
 	CYCLE(2);
-	uint32 src = fetch_32();
-	uint32 dst = fea_data_32();
+	uint32 src = fetch_4();
+	uint32 dst = fea_data_4();
 	ACC.cmp_32(src, dst);
 }
 
@@ -865,8 +865,8 @@ OP_DEF(cas_w)
 
 	if (n == 0x3c) {
 		// CAS2.W Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
-		ir2 = fetch_16();
-		uint32 ir3 = fetch_16();
+		ir2 = fetch_2();
+		uint32 ir3 = fetch_2();
 		uint c1 = ir2 & 7;
 		uint u1 = (ir2 >> 6) & 7;
 		uint r1 = ir2 >> 12;
@@ -880,16 +880,16 @@ OP_DEF(cas_w)
 		uint32 du2 = reg.D[u2] & 0xffff;
 		uint32 ea2 = reg.R[r2];
 
-		uint32 dst1 = read_16(ea1);
-		uint32 dst2 = read_16(ea2);
+		uint32 dst1 = read_2(ea1);
+		uint32 dst2 = read_2(ea2);
 		ACC.cmp_16(dc1, dst1);
 		if (CCR.IsZ()) {
 			ACC.cmp_16(dc2, dst2);
 			if (CCR.IsZ()) {
 				// 更新オペランド -> デスティネーション
 				CYCLE2(0, 2);	// これは成功時の追加分
-				write_16(ea1, du1);
-				write_16(ea2, du2);
+				write_2(ea1, du1);
+				write_2(ea2, du2);
 			}
 		}
 		// デスティネーション -> 比較オペランド
@@ -898,19 +898,19 @@ OP_DEF(cas_w)
 		reg.D[c2] = (reg.D[c2] & 0xffff0000) | dst2;
 	} else {
 		// CAS.W Dc,Du,<ea>
-		ir2 = fetch_16();
+		ir2 = fetch_2();
 		uint c = ir2 & 7;
 		uint u = (ir2 >> 6) & 7;
 		uint32 dc = reg.D[c] & 0xffff;
 		uint32 du = reg.D[u] & 0xffff;
-		uint ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint ea = cea_data_2();
+		uint32 dst = read_2(ea);
 
 		ACC.cmp_16(dc, dst);
 		if (CCR.IsZ()) {
 			// 等しければ、Du -> dst
 			CYCLE(13);
-			write_16(ea, du);
+			write_2(ea, du);
 		} else {
 			// そうでなければ、dst -> Dc
 			CYCLE(11);
@@ -925,7 +925,7 @@ OP_DEF(moves_b)
 {
 	SUPERVISOR_OP;
 
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint n = ir2 >> 12;
 	uint ea;
 	uint32 data;
@@ -935,11 +935,12 @@ OP_DEF(moves_b)
 		return;
 	}
 
-	ea = cea_data_8();
+	ea = cea_data_1();
 	if ((ir2 & 0x0800) == 0) {
 		// <ea>,Rn
 		CYCLE(7);
-		data = read_8_fc(ea);
+		busaddr addr = busaddr(ea) | reg.sfc | BusAddr::Size1;
+		data = read_data(addr);
 		if (n < 8) {	// Dn
 			reg.D[n] = (reg.D[n] & 0xffffff00) | data;
 		} else {		// An
@@ -948,8 +949,9 @@ OP_DEF(moves_b)
 	} else {
 		// Rn,<ea>
 		CYCLE2(5, 6);
+		busaddr addr = busaddr(ea) | reg.dfc | BusAddr::Size1;
 		data = reg.R[n] & 0xff;
-		write_8_fc(ea, data);
+		write_data(addr, data);
 	}
 }
 
@@ -959,7 +961,7 @@ OP_DEF(moves_w)
 {
 	SUPERVISOR_OP;
 
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint n = ir2 >> 12;
 	uint ea;
 	uint32 data;
@@ -969,11 +971,12 @@ OP_DEF(moves_w)
 		return;
 	}
 
-	ea = cea_data_16();
+	ea = cea_data_2();
 	if ((ir2 & 0x0800) == 0) {
 		// <ea>,Rn
 		CYCLE(7);
-		data = read_16_fc(ea);
+		busaddr addr = busaddr(ea) | reg.sfc | BusAddr::Size2;
+		data = read_data(addr);
 		if (n < 8) {	// Dn
 			reg.D[n] = (reg.D[n] & 0xffff0000) | data;
 		} else {		// An
@@ -982,8 +985,9 @@ OP_DEF(moves_w)
 	} else {
 		// Rn,<ea>
 		CYCLE2(5, 6);
+		busaddr addr = busaddr(ea) | reg.dfc | BusAddr::Size2;
 		data = reg.R[n] & 0xffff;
-		write_16_fc(ea, data);
+		write_data(addr, data);
 	}
 }
 
@@ -993,7 +997,7 @@ OP_DEF(moves_l)
 {
 	SUPERVISOR_OP;
 
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint n = ir2 >> 12;
 	uint ea;
 	uint32 data;
@@ -1003,17 +1007,19 @@ OP_DEF(moves_l)
 		return;
 	}
 
-	ea = cea_data_32();
+	ea = cea_data_4();
 	if ((ir2 & 0x0800) == 0) {
 		// <ea>,Rn
 		CYCLE(7);
-		data = read_32_fc(ea);
+		busaddr addr = busaddr(ea) | reg.sfc | BusAddr::Size4;
+		data = read_data(addr);
 		reg.R[n] = data;
 	} else {
 		// Rn,<ea>
 		CYCLE2(5, 6);
+		busaddr addr = busaddr(ea) | reg.dfc | BusAddr::Size4;
 		data = reg.R[n];
-		write_32_fc(ea, data);
+		write_data(addr, data);
 	}
 }
 
@@ -1025,8 +1031,8 @@ OP_DEF(cas_l)
 
 	if (n == 0x3c) {
 		// CAS2.L Dc1:Dc2,Du1:Du2,(Rn1):(Rn2)
-		ir2 = fetch_16();
-		uint32 ir3 = fetch_16();
+		ir2 = fetch_2();
+		uint32 ir3 = fetch_2();
 		uint c1 = ir2 & 7;
 		uint u1 = (ir2 >> 6) & 7;
 		uint r1 = ir2 >> 12;
@@ -1040,16 +1046,16 @@ OP_DEF(cas_l)
 		uint32 du2 = reg.D[u2];
 		uint32 ea2 = reg.R[r2];
 
-		uint32 dst1 = read_32(ea1);
-		uint32 dst2 = read_32(ea2);
+		uint32 dst1 = read_4(ea1);
+		uint32 dst2 = read_4(ea2);
 		ACC.cmp_32(dc1, dst1);
 		if (CCR.IsZ()) {
 			ACC.cmp_32(dc2, dst2);
 			if (CCR.IsZ()) {
 				// 更新オペランド -> デスティネーション
 				CYCLE2(0, 2);	// これは成功時の追加分
-				write_32(ea1, du1);
-				write_32(ea2, du2);
+				write_4(ea1, du1);
+				write_4(ea2, du2);
 			}
 		}
 		// デスティネーション -> 比較オペランド
@@ -1058,19 +1064,19 @@ OP_DEF(cas_l)
 		reg.D[c2] = dst2;
 	} else {
 		// CAS.L Dc,Du,<ea>
-		ir2 = fetch_16();
+		ir2 = fetch_2();
 		uint c = ir2 & 7;
 		uint u = (ir2 >> 6) & 7;
 		uint32 dc = reg.D[c];
 		uint32 du = reg.D[u];
-		uint ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint ea = cea_data_4();
+		uint32 dst = read_4(ea);
 
 		ACC.cmp_32(dc, dst);
 		if (CCR.IsZ()) {
 			// 等しければ、Du -> dst
 			CYCLE(13);
-			write_32(ea, du);
+			write_4(ea, du);
 		} else {
 			// そうでなければ、dst -> Dc
 			CYCLE(11);
@@ -1083,7 +1089,7 @@ OP_DEF(cas_l)
 OP_DEF(move_b_ea_dn)
 {
 	CYCLE(2);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	ACC.move_8(data);
 	RegDX = (RegDX & 0xffffff00) | data;
 }
@@ -1093,10 +1099,10 @@ OP_DEF(move_b_ea_anin)
 {
 	// 実際にはソースがレジスタなら (3, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	uint32 ea = cea_anin(RegIRX);
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0001_xxx011_mmmrrr	MOVE.B <ea>,(Ax)+
@@ -1104,10 +1110,12 @@ OP_DEF(move_b_ea_anpi)
 {
 	// 実際にはソースがレジスタなら (3, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_8();
-	uint32 ea = cea_anpi_8(RegIRX);
+	uint32 data = fea_all_1();
+	// (An)+,(Ax)+ が n==x なら2回目はセーブしてはいけない。
+	save_reg_pi_if(RegIRX);
+	uint32 ea = cea_anpi_1(RegIRX);
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0001_xxx100_mmmrrr	MOVE.B <ea>,-(Ax)
@@ -1115,20 +1123,22 @@ OP_DEF(move_b_ea_anpd)
 {
 	// 実際にはソースがレジスタなら (4, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_8();
-	uint32 ea = cea_anpd_8(RegIRX);
+	uint32 data = fea_all_1();
+	// -(An),-(Ax) が n==x なら2回目はセーブしてはいけない。
+	save_reg_pd_if(RegIRX);
+	uint32 ea = cea_anpd_1(RegIRX);
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0001_xxx101_mmmrrr	MOVE.B <ea>,d16(Ax)
 OP_DEF(move_b_ea_andi)
 {
 	CYCLE2(4, 5);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	uint32 ea = cea_andi(RegIRX);
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0001_xxx110_mmmrrr	MOVE.B <ea>,(Ax,IX)
@@ -1136,37 +1146,37 @@ OP_DEF(move_b_ea_anix)
 {
 	// XXX 実際にはdstのフォーマットによって(8,9)-(20,23)
 	CYCLE2(16, 18);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	uint32 ea = cea_anix(RegIRX);
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0001_000111_mmmrrr	MOVE.B <ea>,Abs.W
 OP_DEF(move_b_ea_absw)
 {
 	CYCLE2(4, 5);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	uint32 ea = cea_absw();
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0001_001111_mmmrrr	MOVE.B <ea>,Abs.L
 OP_DEF(move_b_ea_absl)
 {
 	CYCLE2(6, 7);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	uint32 ea = cea_absl();
 	ACC.move_8(data);
-	write_8(ea, data);
+	write_1(ea, data);
 }
 
 // %0010_xxx000_mmmrrr	MOVE.L <ea>,Dx
 OP_DEF(move_l_ea_dn)
 {
 	CYCLE(2);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	ACC.move_32(data);
 	RegDX = data;
 }
@@ -1175,7 +1185,7 @@ OP_DEF(move_l_ea_dn)
 OP_DEF(movea_l)
 {
 	CYCLE(2);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	RegAX = data;
 }
 
@@ -1184,10 +1194,10 @@ OP_DEF(move_l_ea_anin)
 {
 	// 実際にはソースがレジスタなら (3, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	uint32 ea = cea_anin(RegIRX);
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0010_xxx011_mmmrrr	MOVE.L <ea>,(Ax)+
@@ -1195,10 +1205,12 @@ OP_DEF(move_l_ea_anpi)
 {
 	// 実際にはソースがレジスタなら (3, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_32();
-	uint32 ea = cea_anpi_32(RegIRX);
+	uint32 data = fea_all_4();
+	// (An)+,(Ax)+ が n==x なら2回目はセーブしてはいけない。
+	save_reg_pi_if(RegIRX);
+	uint32 ea = cea_anpi_4(RegIRX);
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0010_xxx100_mmmrrr	MOVE.L <ea>,-(Ax)
@@ -1206,20 +1218,22 @@ OP_DEF(move_l_ea_anpd)
 {
 	// 実際にはソースがレジスタなら (4, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_32();
-	uint32 ea = cea_anpd_32(RegIRX);
+	uint32 data = fea_all_4();
+	// -(An),-(Ax) が n==x なら2回目はセーブしてはいけない。
+	save_reg_pd_if(RegIRX);
+	uint32 ea = cea_anpd_4(RegIRX);
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0010_xxx101_mmmrrr	MOVE.L <ea>,d16(Ax)
 OP_DEF(move_l_ea_andi)
 {
 	CYCLE2(4, 5);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	uint32 ea = cea_andi(RegIRX);
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0010_xxx110_mmmrrr	MOVE.L <ea>,(Ax,IX)
@@ -1227,37 +1241,37 @@ OP_DEF(move_l_ea_anix)
 {
 	// XXX 実際にはdstのフォーマットによって(8,9)-(20,23)
 	CYCLE2(16, 18);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	uint32 ea = cea_anix(RegIRX);
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0010_000111_mmmrrr	MOVE.L <ea>,Abs.W
 OP_DEF(move_l_ea_absw)
 {
 	CYCLE2(4, 5);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	uint32 ea = cea_absw();
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0010_001111_mmmrrr	MOVE.L <ea>,Abs.L
 OP_DEF(move_l_ea_absl)
 {
 	CYCLE2(6, 7);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	uint32 ea = cea_absl();
 	ACC.move_32(data);
-	write_32(ea, data);
+	write_4(ea, data);
 }
 
 // %0011_xxx000_mmmrrr	MOVE.W <ea>,Dx
 OP_DEF(move_w_ea_dn)
 {
 	CYCLE(2);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	ACC.move_16(data);
 	RegDX = (RegDX & 0xffff0000) | data;
 }
@@ -1266,7 +1280,7 @@ OP_DEF(move_w_ea_dn)
 OP_DEF(movea_w)
 {
 	CYCLE(2);
-	uint32 data = (int32)(int16)fea_all_16();
+	uint32 data = (int32)(int16)fea_all_2();
 	RegAX = data;
 }
 
@@ -1275,10 +1289,10 @@ OP_DEF(move_w_ea_anin)
 {
 	// 実際にはソースがレジスタなら (3, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	uint32 ea = cea_anin(RegIRX);
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0011_xxx011_mmmrrr	MOVE.W <ea>,(Ax)+
@@ -1286,10 +1300,12 @@ OP_DEF(move_w_ea_anpi)
 {
 	// 実際にはソースがレジスタなら (3, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_16();
-	uint32 ea = cea_anpi_16(RegIRX);
+	uint32 data = fea_all_2();
+	// (An)+,(Ax)+ が n==x なら2回目はセーブしてはいけない。
+	save_reg_pi_if(RegIRX);
+	uint32 ea = cea_anpi_2(RegIRX);
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0011_xxx100_mmmrrr	MOVE.W <ea>,-(Ax)
@@ -1297,20 +1313,22 @@ OP_DEF(move_w_ea_anpd)
 {
 	// 実際にはソースがレジスタなら (4, 4)、メモリなら (4, 5)
 	CYCLE2(4, 5);
-	uint32 data = fea_all_16();
-	uint32 ea = cea_anpd_16(RegIRX);
+	uint32 data = fea_all_2();
+	// -(An),-(Ax) が n==x なら2回目はセーブしてはいけない。
+	save_reg_pd_if(RegIRX);
+	uint32 ea = cea_anpd_2(RegIRX);
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0011_xxx101_mmmrrr	MOVE.W <ea>,d16(Ax)
 OP_DEF(move_w_ea_andi)
 {
 	CYCLE2(4, 5);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	uint32 ea = cea_andi(RegIRX);
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0011_xxx110_mmmrrr	MOVE.W <ea>,(Ax,IX)
@@ -1318,30 +1336,30 @@ OP_DEF(move_w_ea_anix)
 {
 	// XXX 実際にはdstのフォーマットによって(8,9)-(20,23)
 	CYCLE2(16, 18);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	uint32 ea = cea_anix(RegIRX);
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0011_000111_mmmrrr	MOVE.W <ea>,Abs.W
 OP_DEF(move_w_ea_absw)
 {
 	CYCLE2(4, 5);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	uint32 ea = cea_absw();
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0011_001111_mmmrrr	MOVE.W <ea>,Abs.L
 OP_DEF(move_w_ea_absl)
 {
 	CYCLE2(6, 7);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	uint32 ea = cea_absl();
 	ACC.move_16(data);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %0100_000000_mmmrrr	NEGX.B <ea>
@@ -1360,10 +1378,10 @@ OP_DEF(negx_b)
 	} else {
 		// NEGX.B <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.subx_8(data, 0);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -1383,10 +1401,10 @@ OP_DEF(negx_w)
 	} else {
 		// NEGX.W <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = ACC.subx_16(data, 0);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -1404,10 +1422,10 @@ OP_DEF(negx_l)
 	} else {
 		// NEGX.L <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ACC.subx_32(data, 0);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -1424,8 +1442,8 @@ OP_DEF(move_sr_ea)
 	} else {
 		// MOVE.W SR,<ea>
 		CYCLE2(4, 5);
-		uint32 ea = cea_data_16();
-		write_16(ea, GetSR());
+		uint32 ea = cea_data_2();
+		write_2(ea, GetSR());
 	}
 }
 
@@ -1442,7 +1460,7 @@ OP_DEF(chk_l)
 		return;
 	}
 	// 本当はこうじゃないけど、とりあえず
-	uint32 src = fea_data_32();
+	uint32 src = fea_data_4();
 	if ((int32)dst > (int32)src) {
 		CYCLE2(28, 30);
 		CCR.SetN(false);
@@ -1465,7 +1483,7 @@ OP_DEF(chk_w)
 		return;
 	}
 	// 本当はこうじゃないけど、とりあえず
-	uint32 src = fea_data_16();
+	uint32 src = fea_data_2();
 	if ((int16)dst > (int16)src) {
 		CYCLE2(28, 30);
 		CCR.SetN(false);
@@ -1506,9 +1524,9 @@ OP_DEF(clr_b)
 	} else {
 		// CLR.B <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
+		uint32 ea = cea_data_1();
 		ACC.move_8(0);
-		write_8(ea, 0);
+		write_1(ea, 0);
 	}
 }
 
@@ -1525,9 +1543,9 @@ OP_DEF(clr_w)
 	} else {
 		// CLR.W <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
+		uint32 ea = cea_data_2();
 		ACC.move_16(0);
-		write_16(ea, 0);
+		write_2(ea, 0);
 	}
 }
 
@@ -1544,9 +1562,9 @@ OP_DEF(clr_l)
 	} else {
 		// CLR.L <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
+		uint32 ea = cea_data_4();
 		ACC.move_32(0);
-		write_32(ea, 0);
+		write_4(ea, 0);
 	}
 }
 
@@ -1566,8 +1584,8 @@ OP_DEF(move_ccr_ea)
 	} else {
 		// MOVE.W CCR,<ea>
 		CYCLE2(4, 5);
-		uint32 ea = cea_data_16();
-		write_16(ea, CCR.Get());
+		uint32 ea = cea_data_2();
+		write_2(ea, CCR.Get());
 	}
 }
 
@@ -1584,10 +1602,10 @@ OP_DEF(neg_b)
 	} else {
 		// NEG.B <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.sub_8(data, 0);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -1604,10 +1622,10 @@ OP_DEF(neg_w)
 	} else {
 		// NEG.W <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = ACC.sub_16(data, 0);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -1623,10 +1641,10 @@ OP_DEF(neg_l)
 	} else {
 		// NEG.L <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ACC.sub_32(data, 0);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -1646,7 +1664,7 @@ OP_DEF(move_ea_ccr)
 	} else {
 		// MOVE.W <ea>,CCR
 		CYCLE(4);
-		uint32 data = fea_data_16();
+		uint32 data = fea_data_2();
 		CCR.Set(data);
 	}
 }
@@ -1665,11 +1683,11 @@ OP_DEF(not_b)
 	} else {
 		// NOT.B <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = (~data) & 0xff;
 		ACC.move_8(data);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -1687,11 +1705,11 @@ OP_DEF(not_w)
 	} else {
 		// NOT.W <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = (~data) & 0xffff;
 		ACC.move_16(data);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -1708,19 +1726,21 @@ OP_DEF(not_l)
 	} else {
 		// NOT.L <ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ~data;
 		ACC.move_32(data);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
 // %0100_011011_mmmrrr	MOVE.W <ea>,SR
 OP_DEF(move_ea_sr)
 {
+	SUPERVISOR_OP;
+
 	CYCLE2(8, 10);
-	uint16 data = fea_data_16();
+	uint16 data = fea_data_2();
 	SetSR(data);
 }
 
@@ -1742,10 +1762,10 @@ OP_DEF(nbcd)
 		CYCLE2(6, 7);
 		// レジスタやスタックを変更する前にフェッチしないと、
 		// ページフォルトで再実行できなくなる
-		imm = fetch_32();
+		imm = fetch_4();
 		// ページフォルトに備えて保存する
 		save_reg_pd(7);
-		push_32(reg.A[6]);
+		push_4(reg.A[6]);
 		reg.A[6] = reg.A[7];
 		reg.A[7] += imm;
 	} else if (n < 16) {
@@ -1753,19 +1773,19 @@ OP_DEF(nbcd)
 		CYCLE2(6, 7);
 		// レジスタやスタックを変更する前にフェッチしないと、
 		// ページフォルトで再実行できなくなる
-		imm = fetch_32();
+		imm = fetch_4();
 		// ページフォルトに備えて保存する
 		save_reg_pd(7);
-		push_32(RegAY);
+		push_4(RegAY);
 		RegAY = reg.A[7];
 		reg.A[7] += imm;
 	} else {
 		// NBCD.B <ea>
 		CYCLE(6);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst = ACC.sbcd_8(dst, 0);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -1793,7 +1813,7 @@ OP_DEF(pea)
 		uint32 ea = cea_ctrl();
 		// ページフォルトに備えて保存する
 		save_reg_pd(7);
-		push_32(ea);
+		push_4(ea);
 	}
 }
 
@@ -1819,15 +1839,15 @@ MPU680x0Device::ops_movem_list_ea(int by
 	}
 
 	// 第2ワードは EA が正当な場合のみ EA より先にフェッチ
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 
 	// EA 取得。MOVEM だけ別対応
 	// |  M -WXZ  | MOVEM list,<ea>
 	// だが、不当 EA はすでに弾いてあるので cea_data でいい
 	if (bytesize == 2) {
-		ea = cea_data_16();
+		ea = cea_data_2();
 	} else {
-		ea = cea_data_32();
+		ea = cea_data_4();
 	}
 
 	regcount = 0;
@@ -1839,9 +1859,9 @@ MPU680x0Device::ops_movem_list_ea(int by
 		while (list) {
 			int ctz = __builtin_ctz(list);
 			if (bytesize == 2) {
-				write_16(ea, reg.R[15 - ctz] & 0xffff);
+				write_2(ea, reg.R[15 - ctz] & 0xffff);
 			} else {
-				write_32(ea, reg.R[15 - ctz]);
+				write_4(ea, reg.R[15 - ctz]);
 			}
 			ea -= bytesize;
 			regcount++;
@@ -1857,9 +1877,9 @@ MPU680x0Device::ops_movem_list_ea(int by
 		while (list) {
 			int ctz = __builtin_ctz(list);
 			if (bytesize == 2) {
-				write_16(ea, reg.R[ctz] & 0xffff);
+				write_2(ea, reg.R[ctz] & 0xffff);
 			} else {
-				write_32(ea, reg.R[ctz]);
+				write_4(ea, reg.R[ctz]);
 			}
 			ea += bytesize;
 			regcount++;
@@ -1910,7 +1930,7 @@ OP_DEF(movem_l_mem)
 OP_DEF(tst_b)
 {
 	CYCLE(2);
-	uint32 data = fea_all_8();
+	uint32 data = fea_all_1();
 	ACC.move_8(data);
 }
 
@@ -1918,7 +1938,7 @@ OP_DEF(tst_b)
 OP_DEF(tst_w)
 {
 	CYCLE(2);
-	uint32 data = fea_all_16();
+	uint32 data = fea_all_2();
 	ACC.move_16(data);
 }
 
@@ -1926,7 +1946,7 @@ OP_DEF(tst_w)
 OP_DEF(tst_l)
 {
 	CYCLE(2);
-	uint32 data = fea_all_32();
+	uint32 data = fea_all_4();
 	ACC.move_32(data);
 }
 
@@ -1950,10 +1970,10 @@ OP_DEF(tas)
 		// TAS.B <ea>
 		// リード・モディファイ・ライトという概念はない
 		CYCLE(12);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		ACC.move_8(data);
-		write_8(ea, (data | 0x80));
+		write_1(ea, (data | 0x80));
 	}
 }
 
@@ -1966,16 +1986,16 @@ OP_DEF(mul)
 	//    |  |+------------ %1:64bit, %0:32bit
 	//    |  +------------- %1:MULS, %0:MULU
 	//    +---------------- Dl
-	ir2 = fetch_16();
-	int h = ir2 & 7;
-	int l = (ir2 >> 12) & 7;
+	ir2 = fetch_2();
+	uint h = ir2 & 7;
+	uint l = (ir2 >> 12) & 7;
 
 	CYCLE(44);	// XXX これは本当は最大値だけど
 	switch ((ir2 >> 10) & 3) {
 	 case 0:
 	 {
 		// MULU.L <ea>,Dl
-		uint32 src = fea_data_32();
+		uint32 src = fea_data_4();
 		uint32 dst = reg.D[l];
 		reg.D[l] = ACC.mulu_32(src, dst);
 		break;
@@ -1984,7 +2004,7 @@ OP_DEF(mul)
 	 case 1:
 	 {
 		// MULU.L <ea>,Dh:Dl
-		uint32 src = fea_data_32();
+		uint32 src = fea_data_4();
 		uint32 dst = reg.D[l];
 		uint64 res = ACC.mulu_64(src, dst);
 		// h == l の時は未定義なので考えない。
@@ -1996,7 +2016,7 @@ OP_DEF(mul)
 	 case 2:
 	 {
 		// MULS.L <ea>,Dl
-		uint32 src = fea_data_32();
+		uint32 src = fea_data_4();
 		uint32 dst = reg.D[l];
 		reg.D[l] = ACC.muls_32(src, dst);
 		break;
@@ -2005,7 +2025,7 @@ OP_DEF(mul)
 	 case 3:
 	 {
 		// MULS.L <ea>,Dh:Dl
-		uint32 src = fea_data_32();
+		uint32 src = fea_data_4();
 		uint32 dst = reg.D[l];
 		uint64 res = ACC.muls_64(src, dst);
 		// h == l の時は未定義なので考えない。
@@ -2022,11 +2042,11 @@ OP_DEF(mul)
 // DIVU.L <ea>,Dq
 // DIVUL.L <ea>,Dr:Dq
 void
-MPU680x0Device::ops_divu_32_32(int r, int q)
+MPU680x0Device::ops_divu_32_32(uint r, uint q)
 {
 	CYCLE(78);	// XXX これは本当は最大値だけど
 
-	uint32 src = fea_data_32();
+	uint32 src = fea_data_4();
 	uint32 dst = reg.D[q];
 
 	if (src == 0) {
@@ -2054,11 +2074,11 @@ MPU680x0Device::ops_divu_32_32(int r, in
 
 // DIVU.L <ea>,Dr:Dq
 void
-MPU680x0Device::ops_divu_64_32(int r, int q)
+MPU680x0Device::ops_divu_64_32(uint r, uint q)
 {
 	CYCLE(78);	// XXX これは本当は最大値だけど
 
-	uint32 src = fea_data_32();
+	uint32 src = fea_data_4();
 	uint64 dst = (((uint64)reg.D[r]) << 32) | reg.D[q];
 
 	if (src == 0) {
@@ -2097,11 +2117,11 @@ MPU680x0Device::ops_divu_64_32(int r, in
 // DIVS.L <ea>,Dq
 // DIVSL.L <ea>,Dr:Dq
 void
-MPU680x0Device::ops_divs_32_32(int r, int q)
+MPU680x0Device::ops_divs_32_32(uint r, uint q)
 {
 	CYCLE(90);	// XXX これは本当は最大値だけど
 
-	uint32 src = fea_data_32();
+	uint32 src = fea_data_4();
 	uint32 dst = reg.D[q];
 
 	if (src == 0) {
@@ -2142,11 +2162,11 @@ MPU680x0Device::ops_divs_32_32(int r, in
 
 // DIVSL.L
 void
-MPU680x0Device::ops_divs_64_32(int r, int q)
+MPU680x0Device::ops_divs_64_32(uint r, uint q)
 {
 	CYCLE(90);	// XXX これは本当は最大値だけど
 
-	uint32 src = fea_data_32();
+	uint32 src = fea_data_4();
 	uint64 dst = (((uint64)reg.D[r]) << 32) | reg.D[q];
 
 	if (src == 0) {
@@ -2205,9 +2225,9 @@ OP_DEF(div)
 	//    |  |+------------ %1:64bit, %0:32bit
 	//    |  +------------- %1:DIVS, %0:DIVU
 	//    +---------------- Dq
-	ir2 = fetch_16();
-	int r = ir2 & 7;
-	int q = (ir2 >> 12) & 7;
+	ir2 = fetch_2();
+	uint r = ir2 & 7;
+	uint q = (ir2 >> 12) & 7;
 
 	switch ((ir2 >> 10) & 3) {
 	 case 0:
@@ -2234,7 +2254,7 @@ MPU680x0Device::ops_movem_ea_list(int by
 	int regcount;
 	bool anpi = false;
 
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 
 	// EA 取得。MOVEM だけ別対応
 	// |  M+ WXZP | MOVEM <ea>,list
@@ -2243,10 +2263,11 @@ MPU680x0Device::ops_movem_ea_list(int by
 		ea = cea_anin(eanum(ir));
 		break;
 	 case 3:	// (An)+
+		save_reg_pi(eanum(ir));
 		if (bytesize == 2) {
-			ea = cea_anpi_16(eanum(ir));
+			ea = cea_anpi_2(eanum(ir));
 		} else {
-			ea = cea_anpi_32(eanum(ir));
+			ea = cea_anpi_4(eanum(ir));
 		}
 		anpi = true;
 		break;
@@ -2280,17 +2301,17 @@ MPU680x0Device::ops_movem_ea_list(int by
 		return;
 	}
 
-// XXX レジスタリストに表れて、ea オペランドに出てくる
-// レジスタはデータレジスタIX も含めて全部保存しておく必要がある。
+	// XXX レジスタリストに表れて、ea オペランドに出てくる
+	// レジスタは Dn、IX も含めて全部保存しておく必要がある。
 
 	regcount = 0;
 	uint list = ir2;
 	while (list) {
 		uint32 data;
 		if (bytesize == 2) {
-			data = (int32)(int16)read_16(ea);
+			data = (int32)(int16)read_2(ea);
 		} else {
-			data = read_32(ea);
+			data = read_4(ea);
 		}
 		ea += bytesize;
 		regcount++;
@@ -2326,15 +2347,15 @@ MPU680x0Device::ops_movec_rc_rn()
 	SUPERVISOR_OP;
 
 	CYCLE(6);
-	ir2 = fetch_16();
-	int n = ir2 >> 12;
-	int c = ir2 & 0xfff;
+	ir2 = fetch_2();
+	uint n = ir2 >> 12;
+	uint c = ir2 & 0xfff;
 	switch (c) {
 	 case 0x000:
-		reg.R[n] = reg.sfc;
+		reg.R[n] = reg.GetSFC();
 		return;
 	 case 0x001:
-		reg.R[n] = reg.dfc;
+		reg.R[n] = reg.GetDFC();
 		return;
 	 case 0x002:
 		reg.R[n] = reg.cacr;
@@ -2374,21 +2395,21 @@ MPU680x0Device::ops_movec_rn_rc()
 {
 	SUPERVISOR_OP;
 
-	ir2 = fetch_16();
-	int n = ir2 >> 12;
-	int c = ir2 & 0xfff;
+	ir2 = fetch_2();
+	uint n = ir2 >> 12;
+	uint c = ir2 & 0xfff;
 	switch (c) {
 	 case 0x000:
 		CYCLE(12);
-		reg.sfc = reg.R[n];
+		reg.sfc = busaddr::FC(reg.R[n] & 7) | BusAddr::R;
 		return;
 	 case 0x001:
 		CYCLE(12);
-		reg.dfc = reg.R[n];
+		reg.dfc = busaddr::FC(reg.R[n] & 7) | BusAddr::W;
 		return;
 	 case 0x002:
 		CYCLE(12);
-		reg.cacr = reg.R[n];
+		SetCACR(reg.R[n]);
 		return;
 	 case 0x800:
 		CYCLE(6);
@@ -2445,12 +2466,18 @@ OP_DEF(trap)
 	int32 imm;
 
 	switch (n) {
-	 case 0x00 ... 0x0f:// TRAP #<vector>
+	 case 0x00 ... 0x0e:// TRAP #<vector>
 		CYCLE2(18, 20);
 		// TRAP#N 例外
 		Exception(M68K::EXCEP_TRAP0 + n);
 		return;
 
+	 case 0x0f:			// TRAP #15
+		CYCLE2(18, 20);
+		// TRAP#15 例外 (IOCS コール表示のためこれだけ別処理)
+		ExceptionTrap15();
+		return;
+
 	 case 0x10:
 	 case 0x11:
 	 case 0x12:
@@ -2461,9 +2488,9 @@ OP_DEF(trap)
 		CYCLE2(4, 5);
 		// レジスタやスタックを変更する前にフェッチとセーブをしないと、
 		// ページフォルトで再実行できなくなる
-		imm = (int32)(int16)fetch_16();
+		imm = (int32)(int16)fetch_2();
 		save_reg_pd(7);
-		push_32(RegAY);
+		push_4(RegAY);
 		RegAY = reg.A[7];
 		reg.A[7] += imm;
 		return;
@@ -2472,9 +2499,9 @@ OP_DEF(trap)
 		CYCLE2(4, 5);
 		// レジスタやスタックを変更する前にフェッチとセーブをしないと、
 		// ページフォルトで再実行できなくなる
-		imm = (int32)(int16)fetch_16();
+		imm = (int32)(int16)fetch_2();
 		save_reg_pd(7);
-		push_32(reg.A[6]);
+		push_4(reg.A[6]);
 		reg.A[6] = reg.A[7];
 		reg.A[7] += imm;
 		return;
@@ -2490,7 +2517,7 @@ OP_DEF(trap)
 		// ページフォルトに備えて保存する
 		save_reg_pi(7);
 		reg.A[7] = RegAY;
-		RegAY = pop_32();
+		RegAY = pop_4();
 		return;
 	 case 0x1e:			// UNLK A6
 		// UNLK はほぼ A6 なのでこいつだけ展開してみる
@@ -2498,7 +2525,7 @@ OP_DEF(trap)
 		// ページフォルトに備えて保存する
 		save_reg_pi(7);
 		reg.A[7] = reg.A[6];
-		reg.A[6] = pop_32();
+		reg.A[6] = pop_4();
 		return;
 
 	 case 0x20:
@@ -2553,8 +2580,8 @@ OP_DEF(trap)
 		CYCLE2(10, 12);
 		// ページフォルトに備えて保存する
 		save_reg_pi(7);
-		uint32 disp = fetch_16();
-		Jump(pop_32());
+		uint32 disp = fetch_2();
+		Jump(pop_4());
 		reg.A[7] += (int32)(int16)disp;
 		return;
 	 }
@@ -2563,7 +2590,7 @@ OP_DEF(trap)
 		CYCLE2(9, 11);
 		// ページフォルトに備えて保存する
 		save_reg_pi(7);
-		Jump(pop_32());
+		Jump(pop_4());
 		return;
 
 	 case 0x36:			// TRAPV
@@ -2579,8 +2606,8 @@ OP_DEF(trap)
 		CYCLE2(12, 14);
 		// ページフォルトに備えて保存する
 		save_reg_pi(7);
-		CCR.Set(pop_16());
-		Jump(pop_32());
+		CCR.Set(pop_2());
+		Jump(pop_4());
 		return;
 
 	 case 0x3a:			// MOVEC.L Rc,Rn
@@ -2604,7 +2631,7 @@ OP_DEF(jsr)
 	uint32 ea = cea_ctrl();
 	// ページフォルトに備えて保存する
 	save_reg_pd(7);
-	push_32(reg.pc);
+	push_4(reg.pc);
 	Jump(ea);
 }
 
@@ -2632,10 +2659,10 @@ OP_DEF(addq_b)
 	} else {
 		// ADDQ.B #qqq,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.add_8(src, data);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -2660,10 +2687,10 @@ OP_DEF(addq_w)
 	} else {
 		// ADDQ.W #qqq,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = ACC.add_16(src, data);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -2687,10 +2714,10 @@ OP_DEF(addq_l)
 	} else {
 		// ADDQ.L #qqq,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ACC.add_32(src, data);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -2734,7 +2761,7 @@ OP_DEF(scc)
 		if (CCR.Cond(cond)) {
 			// 真なら何もしない。disp を読み飛ばして次へ。
 			CYCLE2(6, 8);
-			fetch_16();
+			fetch_2();
 		} else {
 			// 偽の場合
 
@@ -2748,12 +2775,12 @@ OP_DEF(scc)
 				// ループ終了。disp を読み飛ばす
 				CYCLE2(10, 13);
 				RegDY |= 0x0000ffff;
-				fetch_16();
+				fetch_2();
 			} else {
 				CYCLE2(6, 8);
 				RegDY--;
 				uint32 origin = reg.pc;
-				int32 disp = (int32)(int16)fetch_16();
+				int32 disp = (int32)(int16)fetch_2();
 				Jump(origin + disp);
 			}
 		}
@@ -2769,28 +2796,28 @@ OP_DEF(scc)
 	 {
 		CYCLE(5);
 		// 条件成立可否に関わらず EA は取得しないといけない
-		uint32 ea = cea_data_8();
+		uint32 ea = cea_data_1();
 		uint32 data;
 		if (CCR.Cond(cond)) {
 			data = 0xff;
 		} else {
 			data = 0;
 		}
-		write_8(ea, data);
+		write_1(ea, data);
 		return;
 	 }
 
 	 case 0b111010:		// TRAPcc.W #<imm>
 		// オペランドなしTRAPccに比べてすべてのケースで2サイクル多い
 		CYCLE(2);
-		fetch_16();
+		fetch_2();
 		ops_trapcc(cond);
 		return;
 
 	 case 0b111011:		// TRAPcc.L #<imm>
 		// オペランドなしTRAPccに比べてすべてのケースで4サイクル多い
 		CYCLE(4);
-		fetch_32();
+		fetch_4();
 		ops_trapcc(cond);
 		return;
 
@@ -2819,10 +2846,10 @@ OP_DEF(subq_b)
 	} else {
 		// SUBQ.B #qqq,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.sub_8(src, data);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -2847,10 +2874,10 @@ OP_DEF(subq_w)
 	} else {
 		// SUBQ.W #qqq,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = ACC.sub_16(src, data);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -2874,10 +2901,10 @@ OP_DEF(subq_l)
 	} else {
 		// SUBQ.L #qqq,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ACC.sub_32(src, data);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -2890,10 +2917,10 @@ MPU680x0Device::ops_bra()
 	int32 disp = (int32)(int8)(ir & 0xff);
 	if (disp == -1) {
 		// Bcc.L
-		disp = (int32)fetch_32();
+		disp = (int32)fetch_4();
 	} else if (disp == 0) {
 		// Bcc.W
-		disp = (int32)(int16)fetch_16();
+		disp = (int32)(int16)fetch_2();
 	}
 	Jump(origin + disp);
 }
@@ -2916,14 +2943,14 @@ OP_DEF(bsr)
 	int32 disp = (int32)(int8)(ir & 0xff);
 	if (disp == -1) {
 		// BSR.L <label>
-		disp = (int32)fetch_32();
+		disp = (int32)fetch_4();
 	} else if (disp == 0) {
 		// BSR.W <label>
-		disp = (int32)(int16)fetch_16();
+		disp = (int32)(int16)fetch_2();
 	}
 	// ページフォルトに備えて保存する
 	save_reg_pd(7);
-	push_32(reg.pc);
+	push_4(reg.pc);
 	Jump(origin + disp);
 }
 
@@ -2942,11 +2969,11 @@ OP_DEF(bcc)
 		if (disp == -1) {
 			// Bcc.L (not taken)
 			CYCLE(8);
-			fetch_32();
+			fetch_4();
 		} else if (disp == 0) {
 			// Bcc.W (not taken)
 			CYCLE(6);
-			fetch_16();
+			fetch_2();
 		} else {
 			// Bcc.B (not taken)
 			CYCLE(4);
@@ -2968,7 +2995,7 @@ OP_DEF(or_b_ea_dn)
 	uint n = ir & 0x3f;
 
 	CYCLE(2);
-	int x = RegIRX;
+	uint x = RegIRX;
 	if (n < 8) {
 		// OR.B Dn,Dx
 		uint32 data = (reg.D[x] | reg.D[n]) & 0xff;
@@ -2976,7 +3003,7 @@ OP_DEF(or_b_ea_dn)
 		reg.D[x] = (reg.D[x] & 0xffffff00) | data;
 	} else {
 		// OR.B <ea>,Dx
-		uint32 src = fea_data_8();
+		uint32 src = fea_data_1();
 		uint32 data = (reg.D[x] | src) & 0xff;
 		ACC.move_8(data);
 		reg.D[x] = (reg.D[x] & 0xffffff00) | data;
@@ -2989,7 +3016,7 @@ OP_DEF(or_w_ea_dn)
 	uint n = ir & 0x3f;
 
 	CYCLE(2);
-	int x = RegIRX;
+	uint x = RegIRX;
 	if (n < 8) {
 		// OR.W Dn,Dx
 		uint32 data = (reg.D[x] | reg.D[n]) & 0xffff;
@@ -2997,7 +3024,7 @@ OP_DEF(or_w_ea_dn)
 		reg.D[x] = (reg.D[x] & 0xffff0000) | data;
 	} else {
 		// OR.W <ea>,Dx
-		uint32 src = fea_data_16();
+		uint32 src = fea_data_2();
 		uint32 data = (reg.D[x] | src) & 0xffff;
 		ACC.move_16(data);
 		reg.D[x] = (reg.D[x] & 0xffff0000) | data;
@@ -3010,14 +3037,14 @@ OP_DEF(or_l_ea_dn)
 	uint n = ir & 0x3f;
 
 	CYCLE(2);
-	int x = RegIRX;
+	uint x = RegIRX;
 	if (n < 8) {
 		// OR.L Dn,Dx
 		reg.D[x] |= reg.D[n];
 		ACC.move_32(reg.D[x]);
 	} else {
 		// OR.L <ea>,Dx
-		uint32 src = fea_data_32();
+		uint32 src = fea_data_4();
 		uint32 data = reg.D[x] | src;
 		ACC.move_32(data);
 		reg.D[x] = data;
@@ -3029,7 +3056,7 @@ OP_DEF(divu_w)
 {
 	CYCLE(44);	// XXX これは本当は最大値だけど
 
-	uint16 src = fea_data_16();
+	uint16 src = fea_data_2();
 	uint32 dst = RegDX;
 
 	if (src == 0) {
@@ -3081,20 +3108,22 @@ OP_DEF(or_b_dn_ea)
 	} else if (n < 16) {
 		// SBCD.B -(Ay),-(Ax)
 		CYCLE2(13, 14);
-		uint32 srcea = internal_ea_anpd_8(RegIRY);
-		uint32 dstea = internal_ea_anpd_8(RegIRX);
-		uint32 src = read_8(srcea);
-		uint32 dst = read_8(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_1(RegIRY);
+		uint32 dstea = internal_ea_anpd_1(RegIRX);
+		uint32 src = read_1(srcea);
+		uint32 dst = read_1(dstea);
 		dst = ACC.sbcd_8(src, dst);
-		write_8(dstea, dst);
+		write_1(dstea, dst);
 	} else {
 		// OR.B Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint8 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint8 data = read_1(ea);
 		data |= RegDX;
 		ACC.move_8(data);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -3108,32 +3137,34 @@ OP_DEF(or_w_dn_ea)
 	if (n < 8) {
 		// PACK Dy,Dx,#<imm>
 		CYCLE(6);
-		uint32 imm = fetch_16();
+		uint32 imm = fetch_2();
 		uint32 src = RegDY + imm;
 		RegDX = (RegDX & 0xffffff00) | ((src >> 4) & 0x00f0) | (src & 0x000f);
 	} else if (n < 16) {
 		// PACK -(Ay),-(Ax),#<imm>
 		CYCLE(11);
-		uint32 imm = fetch_16();
+		uint32 imm = fetch_2();
 		uint32 srcea;
 		uint32 src;
 		// -(Ay) を2回行う
-		srcea = internal_ea_anpd_8(RegIRY);
-		src = read_8(srcea);
-		srcea = internal_ea_anpd_8(RegIRY);
-		src |= (read_8(srcea) << 8);
+		save_reg_pd(RegIRY);
+		srcea = internal_ea_anpd_1(RegIRY);
+		src = read_1(srcea);
+		srcea = internal_ea_anpd_1(RegIRY);
+		src |= (read_1(srcea) << 8);
 		src += imm;
 		uint32 dst = ((src >> 4) & 0x00f0) | (src & 0x000f);
-		uint32 dstea = internal_ea_anpd_8(RegIRX);
-		write_8(dstea, dst);
+		save_reg_pd_if(RegIRX);
+		uint32 dstea = internal_ea_anpd_1(RegIRX);
+		write_1(dstea, dst);
 	} else {
 		// OR.W Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint16 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint16 data = read_2(ea);
 		data |= RegDX;
 		ACC.move_16(data);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -3147,7 +3178,7 @@ OP_DEF(or_l_dn_ea)
 	if (n < 8) {
 		// UNPK Dy,Dx,#<imm>
 		CYCLE(8);
-		uint32 imm = fetch_16();
+		uint32 imm = fetch_2();
 		uint16 src = RegDY;
 		src = ((src & 0x00f0) << 4) | (src & 0x000f);
 		src += imm;
@@ -3155,25 +3186,27 @@ OP_DEF(or_l_dn_ea)
 	} else if (n < 16) {
 		// UNPK -(Ay),-(Ax),#<imm>
 		CYCLE(11);
-		uint32 imm = fetch_16();
-		uint32 srcea = internal_ea_anpd_8(RegIRY);
-		uint16 src = read_8(srcea);
+		uint32 imm = fetch_2();
+		save_reg_pd(RegIRY);
+		uint32 srcea = internal_ea_anpd_1(RegIRY);
+		uint16 src = read_1(srcea);
 		src = ((src & 0x00f0) << 4) | (src & 0x000f);
 		src += imm;
 		// -(Ax) を2回行う
+		save_reg_pd_if(RegIRX);
 		uint32 dstea;
-		dstea = internal_ea_anpd_8(RegIRX);
-		write_8(dstea, (src & 0xff));
-		dstea = internal_ea_anpd_8(RegIRX);
-		write_8(dstea, src >> 8);
+		dstea = internal_ea_anpd_1(RegIRX);
+		write_1(dstea, (src & 0xff));
+		dstea = internal_ea_anpd_1(RegIRX);
+		write_1(dstea, src >> 8);
 	} else {
 		// OR.L Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data |= RegDX;
 		ACC.move_32(data);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -3182,7 +3215,7 @@ OP_DEF(divs_w)
 {
 	CYCLE(56);	// XXX これは本当は最大値だけど
 
-	uint16 src = fea_data_16();
+	uint16 src = fea_data_2();
 	uint32 dst = RegDX;
 
 	if (src == 0) {
@@ -3229,7 +3262,7 @@ OP_DEF(divs_w)
 OP_DEF(sub_b_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_all_8();
+	uint32 src = fea_all_1();
 	uint32 data = ACC.sub_8(src, RegDX & 0xff);
 	RegDX = (RegDX & 0xffffff00) | data;
 }
@@ -3238,7 +3271,7 @@ OP_DEF(sub_b_ea_dn)
 OP_DEF(sub_w_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_all_16();
+	uint32 src = fea_all_2();
 	uint32 data = ACC.sub_16(src, RegDX & 0xffff);
 	RegDX = (RegDX & 0xffff0000) | data;
 }
@@ -3247,7 +3280,7 @@ OP_DEF(sub_w_ea_dn)
 OP_DEF(sub_l_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_all_32();
+	uint32 src = fea_all_4();
 	RegDX = ACC.sub_32(src, RegDX);
 }
 
@@ -3255,7 +3288,7 @@ OP_DEF(sub_l_ea_dn)
 OP_DEF(suba_w)
 {
 	CYCLE(4);
-	uint32 src = (int32)(int16)fea_all_16();
+	uint32 src = (int32)(int16)fea_all_2();
 	RegAX -= src;
 }
 
@@ -3276,19 +3309,21 @@ OP_DEF(sub_b_dn_ea)
 	} else if (n < 16) {
 		// SUBX.B -(Ay),-(Ax)
 		CYCLE2(9, 10);
-		uint32 srcea = internal_ea_anpd_8(RegIRY);
-		uint32 dstea = internal_ea_anpd_8(RegIRX);
-		uint32 src = read_8(srcea);
-		uint32 dst = read_8(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_1(RegIRY);
+		uint32 dstea = internal_ea_anpd_1(RegIRX);
+		uint32 src = read_1(srcea);
+		uint32 dst = read_1(dstea);
 		dst = ACC.subx_8(src, dst);
-		write_8(dstea, dst);
+		write_1(dstea, dst);
 	} else {
 		// SUB.B Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.sub_8(RegDX & 0xff, data);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -3309,19 +3344,21 @@ OP_DEF(sub_w_dn_ea)
 	} else if (n < 16) {
 		// SUBX.W -(Ay),-(Ax)
 		CYCLE2(9, 10);
-		uint32 srcea = internal_ea_anpd_16(RegIRY);
-		uint32 dstea = internal_ea_anpd_16(RegIRX);
-		uint32 src = read_16(srcea);
-		uint32 dst = read_16(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_2(RegIRY);
+		uint32 dstea = internal_ea_anpd_2(RegIRX);
+		uint32 src = read_2(srcea);
+		uint32 dst = read_2(dstea);
 		dst = ACC.subx_16(src, dst);
-		write_16(dstea, dst);
+		write_2(dstea, dst);
 	} else {
 		// SUB.W Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = ACC.sub_16(RegDX & 0xffff, data);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -3341,19 +3378,21 @@ OP_DEF(sub_l_dn_ea)
 	} else if (n < 16) {
 		// SUBX.L -(Ay),-(Ax)
 		CYCLE2(9, 10);
-		uint32 srcea = internal_ea_anpd_32(RegIRY);
-		uint32 dstea = internal_ea_anpd_32(RegIRX);
-		uint32 src = read_32(srcea);
-		uint32 dst = read_32(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_4(RegIRY);
+		uint32 dstea = internal_ea_anpd_4(RegIRX);
+		uint32 src = read_4(srcea);
+		uint32 dst = read_4(dstea);
 		dst = ACC.subx_32(src, dst);
-		write_32(dstea, dst);
+		write_4(dstea, dst);
 	} else {
 		// SUB.L Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ACC.sub_32(RegDX, data);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -3361,7 +3400,7 @@ OP_DEF(sub_l_dn_ea)
 OP_DEF(suba_l)
 {
 	CYCLE(2);
-	uint32 src = fea_all_32();
+	uint32 src = fea_all_4();
 	RegAX -= src;
 }
 
@@ -3381,7 +3420,7 @@ OP_DEF(aline)
 OP_DEF(cmp_b)
 {
 	CYCLE(2);
-	uint32 src = fea_all_8();
+	uint32 src = fea_all_1();
 	uint32 dst = RegDX & 0xff;
 	ACC.cmp_8(src, dst);
 }
@@ -3390,7 +3429,7 @@ OP_DEF(cmp_b)
 OP_DEF(cmp_w)
 {
 	CYCLE(2);
-	uint32 src = fea_all_16();
+	uint32 src = fea_all_2();
 	uint32 dst = RegDX & 0xffff;
 	ACC.cmp_16(src, dst);
 }
@@ -3399,7 +3438,7 @@ OP_DEF(cmp_w)
 OP_DEF(cmp_l)
 {
 	CYCLE(2);
-	uint32 src = fea_all_32();
+	uint32 src = fea_all_4();
 	ACC.cmp_32(src, RegDX);
 }
 
@@ -3407,7 +3446,7 @@ OP_DEF(cmp_l)
 OP_DEF(cmpa_w)
 {
 	CYCLE(4);
-	uint32 src = (uint32)(int32)(int16)fea_all_16();
+	uint32 src = (uint32)(int32)(int16)fea_all_2();
 	ACC.cmp_32(src, RegAX);
 }
 
@@ -3426,18 +3465,20 @@ OP_DEF(eor_b)
 	} else if (n < 16) {
 		// CMPM.B (Ay)+,(Ax)+
 		CYCLE(8);
-		uint32 srcea = internal_ea_anpi_8(RegIRY);
-		uint32 dstea = internal_ea_anpi_8(RegIRX);
-		uint32 src = read_8(srcea);
-		uint32 dst = read_8(dstea);
+		save_reg_pi_if(RegIRY);
+		save_reg_pi_if(RegIRX);
+		uint32 srcea = internal_ea_anpi_1(RegIRY);
+		uint32 dstea = internal_ea_anpi_1(RegIRX);
+		uint32 src = read_1(srcea);
+		uint32 dst = read_1(dstea);
 		ACC.cmp_8(src, dst);
 	} else {
 		// EOR.B Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data ^= (RegDX & 0xff);
-		write_8(ea, data);
+		write_1(ea, data);
 		ACC.move_8(data);
 	}
 }
@@ -3457,18 +3498,20 @@ OP_DEF(eor_w)
 	} else if (n < 16) {
 		// CMPM.W (Ay)+,(Ax)+
 		CYCLE(8);
-		uint32 srcea = internal_ea_anpi_16(RegIRY);
-		uint32 dstea = internal_ea_anpi_16(RegIRX);
-		uint32 src = read_16(srcea);
-		uint32 dst = read_16(dstea);
+		save_reg_pi_if(RegIRY);
+		save_reg_pi_if(RegIRX);
+		uint32 srcea = internal_ea_anpi_2(RegIRY);
+		uint32 dstea = internal_ea_anpi_2(RegIRX);
+		uint32 src = read_2(srcea);
+		uint32 dst = read_2(dstea);
 		ACC.cmp_16(src, dst);
 	} else {
 		// EOR.W Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data ^= (RegDX & 0xffff);
-		write_16(ea, data);
+		write_2(ea, data);
 		ACC.move_16(data);
 	}
 }
@@ -3480,25 +3523,27 @@ OP_DEF(eor_l)
 	uint n = ir & 0x3f;
 
 	if (n < 8) {
-		CYCLE(2);
 		// EOR.L Dx,Dy
+		CYCLE(2);
 		reg.D[n] ^= RegDX;
 		ACC.move_32(reg.D[n]);
 	} else if (n < 16) {
 		// CMPM.L (Ay)+,(Ax)+
 		CYCLE(8);
-		uint32 srcea = internal_ea_anpi_32(RegIRY);
-		uint32 dstea = internal_ea_anpi_32(RegIRX);
-		uint32 src = read_32(srcea);
-		uint32 dst = read_32(dstea);
+		save_reg_pi_if(RegIRY);
+		save_reg_pi_if(RegIRX);
+		uint32 srcea = internal_ea_anpi_4(RegIRY);
+		uint32 dstea = internal_ea_anpi_4(RegIRX);
+		uint32 src = read_4(srcea);
+		uint32 dst = read_4(dstea);
 		ACC.cmp_32(src, dst);
 	} else {
 		// EOR.L Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data ^= RegDX;
-		write_32(ea, data);
+		write_4(ea, data);
 		ACC.move_32(data);
 	}
 }
@@ -3507,7 +3552,7 @@ OP_DEF(eor_l)
 OP_DEF(cmpa_l)
 {
 	CYCLE(4);
-	uint32 src = fea_all_32();
+	uint32 src = fea_all_4();
 	ACC.cmp_32(src, RegAX);
 }
 
@@ -3515,7 +3560,7 @@ OP_DEF(cmpa_l)
 OP_DEF(and_b_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_data_8();
+	uint32 src = fea_data_1();
 	uint32 dst = (RegDX & 0x000000ff) & src;
 	ACC.move_8(dst);
 	RegDX = (RegDX & 0xffffff00) | dst;
@@ -3525,7 +3570,7 @@ OP_DEF(and_b_ea_dn)
 OP_DEF(and_w_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_data_16();
+	uint32 src = fea_data_2();
 	uint32 dst = (RegDX & 0x0000ffff) & src;
 	ACC.move_16(dst);
 	RegDX = (RegDX & 0xffff0000) | dst;
@@ -3535,7 +3580,7 @@ OP_DEF(and_w_ea_dn)
 OP_DEF(and_l_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_data_32();
+	uint32 src = fea_data_4();
 	RegDX = RegDX & src;
 	ACC.move_32(RegDX);
 }
@@ -3544,7 +3589,7 @@ OP_DEF(and_l_ea_dn)
 OP_DEF(mulu_w)
 {
 	CYCLE(28);	// 実際にはこれは最大値
-	uint32 src = fea_data_16();
+	uint32 src = fea_data_2();
 	uint32 dst = RegDX & 0xffff;
 	RegDX = ACC.mulu_16(src, dst);
 }
@@ -3568,21 +3613,23 @@ OP_DEF(and_b_dn_ea)
 	} else if (n < 16) {
 		// ABCD.B -(Ay),-(Ax)
 		CYCLE2(13, 14);
-		uint32 srcea = internal_ea_anpd_8(RegIRY);
-		uint32 dstea = internal_ea_anpd_8(RegIRX);
-		uint32 src = read_8(srcea);
-		uint32 dst = read_8(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_1(RegIRY);
+		uint32 dstea = internal_ea_anpd_1(RegIRX);
+		uint32 src = read_1(srcea);
+		uint32 dst = read_1(dstea);
 		dst = ACC.abcd_8(src, dst);
-		write_8(dstea, dst);
+		write_1(dstea, dst);
 		return;
 	} else {
 		// AND.B Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 dst = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 dst = read_1(ea);
 		dst &= RegDX & 0xff;
 		ACC.move_8(dst);
-		write_8(ea, dst);
+		write_1(ea, dst);
 	}
 }
 
@@ -3596,8 +3643,8 @@ OP_DEF(and_w_dn_ea)
 	if (n < 8) {
 		// EXG.L Dx,Dy
 		CYCLE(4);
-		int x = RegIRX;
-		int y = n;
+		uint x = RegIRX;
+		uint y = n;
 		uint32 tmp = reg.D[x];
 		reg.D[x] = reg.D[y];
 		reg.D[y] = tmp;
@@ -3606,8 +3653,8 @@ OP_DEF(and_w_dn_ea)
 		// EXG.L Ax,Ay
 		// ここでは x は 0..7 で A(x)、y は 8..15 で R(y)
 		CYCLE(4);
-		int x = RegIRX;
-		int y = n;
+		uint x = RegIRX;
+		uint y = n;
 		uint32 tmp = reg.A[x];
 		reg.A[x] = reg.R[y];
 		reg.R[y] = tmp;
@@ -3615,11 +3662,11 @@ OP_DEF(and_w_dn_ea)
 	} else {
 		// AND.W Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 dst = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 dst = read_2(ea);
 		dst &= RegDX & 0xffff;
 		ACC.move_16(dst);
-		write_16(ea, dst);
+		write_2(ea, dst);
 	}
 }
 
@@ -3636,8 +3683,8 @@ OP_DEF(and_l_dn_ea)
 		// EXG.L Dx,Ay
 		// ここでは x は 0..7 で D(x)、y は 8..15 で R(y)
 		CYCLE(4);
-		int x = RegIRX;
-		int y = n;
+		uint x = RegIRX;
+		uint y = n;
 		uint32 tmp = reg.D[x];
 		reg.D[x] = reg.R[y];
 		reg.R[y] = tmp;
@@ -3645,11 +3692,11 @@ OP_DEF(and_l_dn_ea)
 	} else {
 		// AND.L Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 dst = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 dst = read_4(ea);
 		dst &= RegDX;
 		ACC.move_32(dst);
-		write_32(ea, dst);
+		write_4(ea, dst);
 	}
 }
 
@@ -3657,7 +3704,7 @@ OP_DEF(and_l_dn_ea)
 OP_DEF(muls_w)
 {
 	CYCLE(28);	// 実際にはこれは最大値
-	uint32 src = fea_data_16();
+	uint32 src = fea_data_2();
 	uint32 dst = RegDX & 0xffff;
 	RegDX = ACC.muls_16(src, dst);
 }
@@ -3666,7 +3713,7 @@ OP_DEF(muls_w)
 OP_DEF(add_b_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_all_8();
+	uint32 src = fea_all_1();
 	uint32 data = ACC.add_8(src, RegDX & 0xff);
 	RegDX = (RegDX & 0xffffff00) | data;
 }
@@ -3675,7 +3722,7 @@ OP_DEF(add_b_ea_dn)
 OP_DEF(add_w_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_all_16();
+	uint32 src = fea_all_2();
 	uint32 data = ACC.add_16(src, RegDX & 0xffff);
 	RegDX = (RegDX & 0xffff0000) | data;
 }
@@ -3684,7 +3731,7 @@ OP_DEF(add_w_ea_dn)
 OP_DEF(add_l_ea_dn)
 {
 	CYCLE(2);
-	uint32 src = fea_all_32();
+	uint32 src = fea_all_4();
 	RegDX = ACC.add_32(src, RegDX);
 }
 
@@ -3692,7 +3739,7 @@ OP_DEF(add_l_ea_dn)
 OP_DEF(adda_w)
 {
 	CYCLE(4);
-	uint32 src = (int32)(int16)fea_all_16();
+	uint32 src = (int32)(int16)fea_all_2();
 	RegAX += src;
 }
 
@@ -3713,19 +3760,21 @@ OP_DEF(add_b_dn_ea)
 	} else if (n < 16) {
 		// ADDX.B -(Ay),-(Ax)
 		CYCLE2(9, 10);
-		uint32 srcea = internal_ea_anpd_8(RegIRY);
-		uint32 dstea = internal_ea_anpd_8(RegIRX);
-		uint32 src = read_8(srcea);
-		uint32 dst = read_8(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_1(RegIRY);
+		uint32 dstea = internal_ea_anpd_1(RegIRX);
+		uint32 src = read_1(srcea);
+		uint32 dst = read_1(dstea);
 		dst = ACC.addx_8(src, dst);
-		write_8(dstea, dst);
+		write_1(dstea, dst);
 	} else {
 		// ADD.B Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_8();
-		uint32 data = read_8(ea);
+		uint32 ea = cea_data_1();
+		uint32 data = read_1(ea);
 		data = ACC.add_8(RegDX & 0xff, data);
-		write_8(ea, data);
+		write_1(ea, data);
 	}
 }
 
@@ -3746,19 +3795,21 @@ OP_DEF(add_w_dn_ea)
 	} else if (n < 16) {
 		// ADDX.W -(Ay),-(Ax)
 		CYCLE2(9, 10);
-		uint32 srcea = internal_ea_anpd_16(RegIRY);
-		uint32 dstea = internal_ea_anpd_16(RegIRX);
-		uint32 src = read_16(srcea);
-		uint32 dst = read_16(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_2(RegIRY);
+		uint32 dstea = internal_ea_anpd_2(RegIRX);
+		uint32 src = read_2(srcea);
+		uint32 dst = read_2(dstea);
 		dst = ACC.addx_16(src, dst);
-		write_16(dstea, dst);
+		write_2(dstea, dst);
 	} else {
 		// ADD.W Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_16();
-		uint32 data = read_16(ea);
+		uint32 ea = cea_data_2();
+		uint32 data = read_2(ea);
 		data = ACC.add_16(RegDX & 0xffff, data);
-		write_16(ea, data);
+		write_2(ea, data);
 	}
 }
 
@@ -3778,19 +3829,21 @@ OP_DEF(add_l_dn_ea)
 	} else if (n < 16) {
 		// ADDX.L -(Ay),-(Ax)
 		CYCLE2(9, 10);
-		uint32 srcea = internal_ea_anpd_32(RegIRY);
-		uint32 dstea = internal_ea_anpd_32(RegIRX);
-		uint32 src = read_32(srcea);
-		uint32 dst = read_32(dstea);
+		save_reg_pd_if(RegIRY);
+		save_reg_pd_if(RegIRX);
+		uint32 srcea = internal_ea_anpd_4(RegIRY);
+		uint32 dstea = internal_ea_anpd_4(RegIRX);
+		uint32 src = read_4(srcea);
+		uint32 dst = read_4(dstea);
 		dst = ACC.addx_32(src, dst);
-		write_32(dstea, dst);
+		write_4(dstea, dst);
 	} else {
 		// ADD.L Dx,<ea>
 		CYCLE2(3, 4);
-		uint32 ea = cea_data_32();
-		uint32 data = read_32(ea);
+		uint32 ea = cea_data_4();
+		uint32 data = read_4(ea);
 		data = ACC.add_32(RegDX, data);
-		write_32(ea, data);
+		write_4(ea, data);
 	}
 }
 
@@ -3798,7 +3851,7 @@ OP_DEF(add_l_dn_ea)
 OP_DEF(adda_l)
 {
 	CYCLE(2);
-	uint32 src = fea_all_32();
+	uint32 src = fea_all_4();
 	RegAX += src;
 }
 
@@ -4031,10 +4084,10 @@ OP_DEF(asr_l_imm)
 OP_DEF(asr_w)
 {
 	CYCLE(4);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.asr_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_qqq100_000yyy	ASL.B #qqq,Dy
@@ -4263,77 +4316,77 @@ OP_DEF(asl_l_imm)
 OP_DEF(asl_w)
 {
 	CYCLE(6);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.asl_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_001011_mmmrrr	LSR.W <ea>
 OP_DEF(lsr_w)
 {
 	CYCLE(4);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.lsr_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_001111_mmmrrr	LSL.W <ea>
 OP_DEF(lsl_w)
 {
 	CYCLE(4);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.lsl_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_010011_mmmrrr	ROXR.W <ea>
 OP_DEF(roxr_w)
 {
 	CYCLE(4);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.roxr_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_010111_mmmrrr	ROXL.W <ea>
 OP_DEF(roxl_w)
 {
 	CYCLE(4);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.roxl_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_011011_mmmrrr	ROR.W <ea>
 OP_DEF(ror_w)
 {
 	CYCLE(6);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.ror_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_011111_mmmrrr	ROL.W <ea>
 OP_DEF(rol_w)
 {
 	CYCLE(6);
-	uint32 ea = cea_data_16();
-	uint32 data = read_16(ea);
+	uint32 ea = cea_data_2();
+	uint32 data = read_2(ea);
 	data = ACC.rol_16(data, 1);
-	write_16(ea, data);
+	write_2(ea, data);
 }
 
 // %1110_100011_mmmrrr	BFTST <ea>{#o:#w}
 OP_DEF(bftst)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 
 	acc_bf bf(this);
 	if (n < 8) {
@@ -4351,7 +4404,7 @@ OP_DEF(bftst)
 OP_DEF(bfextu)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint dn = ir2 >> 12;
 
 	acc_bf bf(this);
@@ -4373,7 +4426,7 @@ OP_DEF(bfextu)
 OP_DEF(bfchg)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 
 	acc_bf bf(this);
 	if (n < 8) {
@@ -4397,7 +4450,7 @@ OP_DEF(bfchg)
 OP_DEF(bfexts)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint dn = ir2 >> 12;
 
 	acc_bf bf(this);
@@ -4420,7 +4473,7 @@ OP_DEF(bfexts)
 OP_DEF(bfclr)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 
 	acc_bf bf(this);
 	if (n < 8) {
@@ -4444,7 +4497,7 @@ OP_DEF(bfclr)
 OP_DEF(bfffo)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint dn = ir2 >> 12;
 
 	acc_bf bf(this);
@@ -4469,7 +4522,7 @@ OP_DEF(bfffo)
 OP_DEF(bfset)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 
 	acc_bf bf(this);
 	if (n < 8) {
@@ -4493,7 +4546,7 @@ OP_DEF(bfset)
 OP_DEF(bfins)
 {
 	uint n = ir & 0x3f;
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	uint dn = ir2 >> 12;
 
 	acc_bf bf(this);
@@ -4517,7 +4570,7 @@ OP_DEF(bfins)
 // %1111_000nnn_nnnnnn	MMU_OP
 OP_DEF(mmuop)
 {
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	switch ((ir2 >> 8) & 0xff) {
 	 case (0x0800 >> 8):
 	 case (0x0900 >> 8):
@@ -4528,8 +4581,8 @@ OP_DEF(mmuop)
 	 {
 		CYCLE2(12, 14);
 		uint32 ea = cea_copro();
-		uint32 data = read_32(ea);
-		int n = (ir2 >> 10) & 1;
+		uint32 data = read_4(ea);
+		uint n = (ir2 >> 10) & 1;
 		SetTT(n, data);
 		if ((ir2 & 0x0100) == 0)
 			atc.flush();
@@ -4541,8 +4594,8 @@ OP_DEF(mmuop)
 	 {
 		CYCLE(8);
 		uint32 ea = cea_copro();
-		int n = (ir2 >> 10) & 1;
-		write_32(ea, GetTT(n));
+		uint n = (ir2 >> 10) & 1;
+		write_4(ea, GetTT(n));
 		break;
 	 }
 	 case (0x2000 >> 8):
@@ -4601,7 +4654,7 @@ putlog(0, "ploadr");
 		// 無効→無効が (14, 16) ってことだと思うんだけど。
 		CYCLE2(14, 16);
 		uint32 ea = cea_copro();
-		uint32 data = read_32(ea);
+		uint32 data = read_4(ea);
 		if (SetTC(data) == false) {
 			Exception(M68K::EXCEP_MMU_CONFIG);
 			break;
@@ -4615,7 +4668,7 @@ putlog(0, "ploadr");
 	 {
 		CYCLE2(4, 5);
 		uint32 ea = cea_copro();
-		write_32(ea, GetTC());
+		write_4(ea, GetTC());
 		break;
 	 }
 	 case (0x4800 >> 8):
@@ -4627,8 +4680,8 @@ putlog(0, "ploadr");
 		// それ以外が (28, 30) ってことかな。
 		CYCLE2(28, 30);
 		uint32 ea = cea_copro();
-		uint32 h = read_32(ea);
-		uint32 l = read_32(ea + 4);
+		uint32 h = read_4(ea);
+		uint32 l = read_4(ea + 4);
 		if (SetSRP(h, l) == false) {
 			Exception(M68K::EXCEP_MMU_CONFIG);
 			break;
@@ -4642,8 +4695,8 @@ putlog(0, "ploadr");
 	 {
 		CYCLE2(4, 5);
 		uint32 ea = cea_copro();
-		write_32(ea,     GetSRPh());
-		write_32(ea + 4, GetSRPl());
+		write_4(ea,     GetSRPh());
+		write_4(ea + 4, GetSRPl());
 		break;
 	 }
 	 case (0x4c00 >> 8):
@@ -4655,8 +4708,8 @@ putlog(0, "ploadr");
 		// それ以外が (28, 30) ってことかな。
 		CYCLE2(28, 30);
 		uint32 ea = cea_copro();
-		uint32 h = read_32(ea);
-		uint32 l = read_32(ea + 4);
+		uint32 h = read_4(ea);
+		uint32 l = read_4(ea + 4);
 		if (SetCRP(h, l) == false) {
 			Exception(M68K::EXCEP_MMU_CONFIG);
 			break;
@@ -4670,8 +4723,8 @@ putlog(0, "ploadr");
 	 {
 		CYCLE2(4, 5);
 		uint32 ea = cea_copro();
-		write_32(ea,     GetCRPh());
-		write_32(ea + 4, GetCRPl());
+		write_4(ea,     GetCRPh());
+		write_4(ea + 4, GetCRPl());
 		break;
 	 }
 	 case (0x6000 >> 8):
@@ -4679,7 +4732,7 @@ putlog(0, "ploadr");
 	 {
 		CYCLE(6);
 		uint32 ea = cea_copro();
-		uint16 data = read_16(ea);
+		uint16 data = read_2(ea);
 		SetMMUSR(data);
 		break;
 	 }
@@ -4688,7 +4741,7 @@ putlog(0, "ploadr");
 	 {
 		CYCLE2(4, 5);
 		uint32 ea = cea_copro();
-		write_16(ea, GetMMUSR());
+		write_2(ea, GetMMUSR());
 		break;
 	 }
 	 case (0x8000 >> 8):
@@ -4771,7 +4824,7 @@ OP_DEF(fpgen)
 
 	fpu_op_start();
 
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	switch (ir2 >> 13) {
 	 case 0:
 		fpu_op_fgen_reg();
@@ -4785,7 +4838,7 @@ OP_DEF(fpgen)
 	 case 3:
 	 {
 		// FMOVE reg,<ea> はサイズごとに分岐
-		int size = (ir2 >> 10) & 7;
+		uint size = (ir2 >> 10) & 7;
 		switch (size) {
 		 case SIZE_B:
 			fpu_op_fmove_b_mem();
@@ -4841,7 +4894,7 @@ OP_DEF(fxcc)
 
 	fpu_op_start();
 
-	ir2 = fetch_16();
+	ir2 = fetch_2();
 	switch (eamode(ir)) {
 	 case 1:
 		fpu_op_fdbcc();
@@ -4897,7 +4950,7 @@ OP_DEF(fbcc_l)
 	fpu_op_fbcc_l();
 }
 
-// %1111_001100_nnnnnn	FSAVE <ea>
+// %1111_001100_mmmrrr	FSAVE <ea>
 OP_DEF(fsave)
 {
 	if (has_fpu == 0) {
@@ -4910,7 +4963,7 @@ OP_DEF(fsave)
 	fpu_op_fsave();
 }
 
-// %1111_001101_nnnnnn	FRESTORE <ea>
+// %1111_001101_mmmrrr	FRESTORE <ea>
 OP_DEF(frestore)
 {
 	if (has_fpu == 0) {