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1.1 root 1: //
2: // nono
1.1.1.2 root 3: // Copyright (C) 2020 nono project
4: // Licensed under nono-license.txt
1.1 root 5: //
6:
7: #pragma once
8:
9: #include "header.h"
1.1.1.12 root 10:
11: class MPU88xx0Device;
1.1 root 12:
1.1.1.14! root 13: // 定数。
! 14: struct M88100
1.1 root 15: {
16: // PID(cr0)
17: static const uint32 PID_REV_MASK = 0x0000ff00; // 0 = MC88100
18: static const uint32 PID_VER_MASK = 0x000000fe;
19: static const uint32 PID_MASTER = 0x00000001;
20: // PSR(cr1)
21: static const uint32 PSR_SUPER = 0x80000000;
22: static const uint32 PSR_BO_LE = 0x40000000; // ByteOrder(Little)
23: static const uint32 PSR_SER = 0x20000000;
24: static const uint32 PSR_C = 0x10000000; // Carry
25: static const uint32 PSR_SFD1 = 0x00000008; // SFU1 Disable
26: static const uint32 PSR_MXM = 0x00000004; // MisalignedAccessEnable
27: static const uint32 PSR_IND = 0x00000002; // Interrupt Disable
28: static const uint32 PSR_SFRZ = 0x00000001; // Shadow Freeze
29:
30: // 例外処理で使用される S*IP
31: static const uint32 SIP_MASK = 0xfffffffcU;
32: static const uint32 SIP_V = 0x00000002;
33: static const uint32 SIP_E = 0x00000001;
34:
35: // DMTn、データ例外
36: static const uint32 DM_BO = 0x00008000;
37: static const uint32 DM_DAS = 0x00004000;
38: static const uint32 DM_DOUB1 = 0x00002000;
39: static const uint32 DM_LOCK = 0x00001000;
40: static const uint32 DM_DREG_MASK = 0x00000f80;
41: static const uint32 DM_SIGNED = 0x00000040;
42: static const uint32 DM_EN3 = 0x00000020;
43: static const uint32 DM_EN2 = 0x00000010;
44: static const uint32 DM_EN1 = 0x00000008;
45: static const uint32 DM_EN0 = 0x00000004;
46: static const uint32 DM_EN_MASK = (DM_EN0 | DM_EN1 | DM_EN2 | DM_EN3);
47: static const uint32 DM_WRITE = 0x00000002;
48: static const uint32 DM_VALID = 0x00000001;
49: // 内部識別フラグ
50: static const uint32 DM_SIZE_B = (1U << 16) | DM_EN3;
51: static const uint32 DM_SIZE_H = (1U << 17) | DM_EN3 | DM_EN2;
52: static const uint32 DM_SIZE_W = (1U << 18) | DM_EN_MASK;
53: static const uint32 DM_USR = (1U << 20);
54: static const uint32 DM_BU = DM_SIZE_B;
55: static const uint32 DM_B = DM_SIZE_B | DM_SIGNED;
56: static const uint32 DM_HU = DM_SIZE_H;
57: static const uint32 DM_H = DM_SIZE_H | DM_SIGNED;
58: static const uint32 DM_W = DM_SIZE_W;
59: static const uint32 DM_D1 = DM_SIZE_W | DM_DOUB1;
60: static const uint32 DM_D2 = DM_SIZE_W;
61:
1.1.1.11 root 62: // FPECR(fcr0)
63: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
64: // +---------------+---------------+---------------+-+-+-+-+-+-+-+-+
65: // | |I|U|P|O|D|U|O|I|
66: // | 0 |O|N|V|P|Z|F|V|N|
67: // +---------------+---------------+---------------+-+-+-+-+-+-+-+-+
68: static const uint32 FPECR_MASK = 0x000000ff; // 有効ビットマスク
69: static const uint32 FPECR_FIOV = 0x00000080; // FP Integer Overflow
70: static const uint32 FPECR_FUNIMP= 0x00000040; // FP Unimplemented
71: static const uint32 FPECR_FPRV = 0x00000020; // FP Privilege Violation
72: static const uint32 FPECR_FROP = 0x00000010; // FP Reserved Operand
73: static const uint32 FPECR_FDVZ = 0x00000008; // FP Divice-by-Zero
74: static const uint32 FPECR_FUNF = 0x00000004; // FP Underflow
75: static const uint32 FPECR_FOVF = 0x00000002; // FP Overflow
76: static const uint32 FPECR_FINX = 0x00000001; // FP Inexact
77:
78: // FPHS1(fcr1)
79: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
80: // +-+---------------------+---------------------------------------+
81: // |S| Exponent | High order 20 bits of Mantissa |
82: // +-+---------------------+---------------------------------------+
83:
84: // FPLS1(fcr2)
85: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
86: // +---------------------------------------------------------------+
87: // | Low order bits of Mantissa or Integer Operand |
88: // +---------------------------------------------------------------+
89:
90: // FPHS2(fcr3)
91: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
92: // +-+---------------------+---------------------------------------+
93: // |S| Exponent | High order 20 bits of Mantissa |
94: // +-+---------------------+---------------------------------------+
95:
96: // FPLS2(fcr4)
97: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
98: // +---------------------------------------------------------------+
99: // | Low order bits of Mantissa or Integer Operand |
100: // +---------------------------------------------------------------+
101:
102: // FPPT(fcr5)
103: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
104: // +---------------+---------------+---------+---+---+---+---------+
105: // | 0 | OPCODE |T1 |T2 |TD | DestReg |
106: // +---------------+---------------+---------+---+---+---+---------+
107: static const uint32 FPPT_MASK = 0x0000ffff; // 有効ビットマスク
108: static const uint32 FPPT_OPCODE = 0x0000f800; // Opcode
109: static const uint32 FPPT_T1 = 0x00000600; // Source1 Operand Size
110: static const uint32 FPPT_T2 = 0x00000180; // Source2 Operand Size
111: static const uint32 FPPT_TD = 0x00000060; // Destination Size
112: static const uint32 FPPT_DEST = 0x0000001f; // Destination Register No.
113:
114: // FPRH(fcr6)
115: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
116: // +-----+-+-+-+-+-+-----+---------+-------------+-----------------+
117: // |S|RM |G|R|S|A| 0 | High Order Bits of Mantissa |
118: // +-----+-+-+-+-+-+-----+---------+-------------+-----------------+
119: static const uint32 FPRH_MASK = 0xfe1fffff; // 有効ビットマスク
120: static const uint32 FPRH_SIGN = 0x80000000; // Result Sign
121: static const uint32 FPRH_RNDMODE= 0x60000000; // Rounding Mode for Res.
122: static const uint32 FPRH_GUARD = 0x10000000; // Guard Bit for Result
123: static const uint32 FPRH_ROUND = 0x08000000; // Round Bit for Result
124: static const uint32 FPRH_STICKY = 0x04000000; // Sticky Bit for Result
125: static const uint32 FPRH_ADDONE = 0x02000000; // Add One
126: static const uint32 FPRH_MANT = 0x001fffff; // Mantissa(High)
127: static const uint32 FPRH_1 = 0x00100000; // 隠し実数部の 1
128:
129: // FPRL(fcr7)
130: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
131: // +---------------------------------------------------------------+
132: // | Low Order Bits of Mantissa |
133: // +---------------------------------------------------------------+
134:
135: // FPIT(fcr8)
136: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
137: // +-----------------------+-------+---------+-+-+-+-+-+-+---------+
138: // | | | |D|E|E|E|E|E| |
139: // | RESEXP (12bits) | 0 | OPCODE |S|V|Z|U|O|N| DestReg |
140: // +-----------------------+-------+---------+-+-+-+-+-+-+---------+
141: static const uint32 FPIT_MASK = 0xfff0ffff; // 有効ビットマスク
142: static const uint32 FPIT_RESEXP = 0xfff00000; // Result Exponent
143: static const uint32 FPIT_OPCODE = 0x0000f800; // Opcode
144: static const uint32 FPIT_DESTSIZ= 0x00000400; // Destination Size
145: static const uint32 FPIT_EFINV = 0x00000200; // Enable Invalid Op.
146: static const uint32 FPIT_EFDVZ = 0x00000100; // Enable Divide-by-Zero
147: static const uint32 FPIT_EFUNF = 0x00000080; // Enable Underflow
148: static const uint32 FPIT_EFOVF = 0x00000040; // Enable Overflow
149: static const uint32 FPIT_EFINX = 0x00000020; // Enable Inexact
150: static const uint32 FPIT_DEST = 0x0000001f; // Destination Register No.
151:
152: // FPSR(fcr62)
153: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
154: // +---------------+---------------+---------------+-----+-+-+-+-+-+
155: // | |A|A|A|A|A|
156: // | 0 |V|D|U|O|I|
157: // +---------------+---------------+---------------+-----+-+-+-+-+-+
158: static const uint32 FPSR_MASK = 0x0000001f; // 有効ビットマスク
159: static const uint32 FPSR_AFINV = 0x00000010; // Acc. Invalid Op. Flag
160: static const uint32 FPSR_AFDVZ = 0x00000008; // Acc. Divide-by-Zero Flag
161: static const uint32 FPSR_AFUNF = 0x00000004; // Acc. Underflow Flag
162: static const uint32 FPSR_AFOVF = 0x00000002; // Acc. Overflow Flag
163: static const uint32 FPSR_AFINX = 0x00000001; // Acc. Inexact Flag
164:
165: // FPCR(fcr63)
166: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
167: // +---------------+---------------+---+-----------+-----+-+-+-+-+-+
168: // | | | |E|E|E|E|E|
169: // | 0 |RM | |V|D|U|O|I|
170: // +---------------+---------------+---+-----------+-----+-+-+-+-+-+
171: static const uint32 FPCR_MASK = 0x0000c01f; // 有効ビットマスク
172: static const uint32 FPCR_RM = 0x0000c000; // Rounding Mask
173: static const uint32 FPCR_EFINV = 0x00000010; // Enable Invalid Operation
174: static const uint32 FPCR_EFDVZ = 0x00000008; // Enable Divide-by-Zero
175: static const uint32 FPCR_EFUNF = 0x00000004; // Enable Underflow
176: static const uint32 FPCR_EFOVF = 0x00000002; // Enable Overflow
177: static const uint32 FPCR_EFINX = 0x00000001; // Enable Inexact
178:
1.1.1.14! root 179: // 例外
! 180: static const uint32 EXCEP_RESET = 0;
! 181: static const uint32 EXCEP_INTERRUPT = 1;
! 182: static const uint32 EXCEP_INST = 2;
! 183: static const uint32 EXCEP_DATA = 3;
! 184: static const uint32 EXCEP_MISALIGNED = 4;
! 185: static const uint32 EXCEP_UNIMPL_OP = 5;
! 186: static const uint32 EXCEP_PRIV = 6;
! 187: static const uint32 EXCEP_BOUNDS = 7;
! 188: static const uint32 EXCEP_INT_DIV = 8;
! 189: static const uint32 EXCEP_INT_OVF = 9;
! 190: static const uint32 EXCEP_ERROR = 10;
! 191:
! 192: static const uint32 EXCEP_SFU1_PRECISE = 114;
! 193: static const uint32 EXCEP_SFU1_IMPRECISE= 115;
! 194: static const uint32 EXCEP_SFU2_PRECISE = 116;
! 195: static const uint32 EXCEP_SFU3_PRECISE = 118;
! 196: static const uint32 EXCEP_SFU4_PRECISE = 120;
! 197: static const uint32 EXCEP_SFU5_PRECISE = 122;
! 198: static const uint32 EXCEP_SFU6_PRECISE = 124;
! 199: static const uint32 EXCEP_SFU7_PRECISE = 126;
! 200:
! 201: // 32bit 命令コードからディスパッチ用の 12bit に変換。
! 202: // ops と disasm で使うため。
! 203: static uint32 op32_to_12(uint32 op) {
! 204: return ((op >> 20) & 0x0fc0) | ((op >> 10) & 0x003f);
! 205: }
! 206: };
! 207:
! 208: // m88100 レジスタイメージを保持する構造体。
! 209: // この構造体はコピーや比較をするので、ポインタとかは置かないこと。
! 210: struct m88100reg
! 211: {
1.1 root 212: // 頻繁にアクセスしそうな変数はオフセットの若いほうに持ってきておく。
213:
214: // 実行中の命令
1.1.1.14! root 215: uint64 opX {};
1.1 root 216: // プリフェッチ命令
1.1.1.14! root 217: uint64 opF {};
1.1 root 218:
1.1.1.14! root 219: uint32 xip {};
! 220: uint32 nip {};
! 221: uint32 fip {};
1.1 root 222:
223: uint32 r[32] {};
224: union {
225: uint32 cr[21] {};
226: struct {
227: uint32 pid; // cr0
228: uint32 psr; // cr1
229: uint32 epsr; // cr2
230: uint32 ssbr; // cr3
231: uint32 sxip; // cr4
232: uint32 snip; // cr5
233: uint32 sfip; // cr6
234: uint32 vbr; // cr7
235: uint32 dmt0; // cr8
236: uint32 dmd0; // cr9
237: uint32 dma0; // cr10
238: uint32 dmt1; // cr11
239: uint32 dmd1; // cr12
240: uint32 dma1; // cr13
241: uint32 dmt2; // cr14
242: uint32 dmd2; // cr15
243: uint32 dma2; // cr16
244: uint32 sr[4]; // cr17,18,19,20
245: };
246: };
247: union {
248: uint32 fcr[11] {};
249: struct {
250: uint32 fpecr; // fcr0
251: uint32 fphs1; // fcr1
252: uint32 fpls1; // fcr2
253: uint32 fphs2; // fcr3
254: uint32 fpls2; // fcr4
255: uint32 fppt; // fcr5
256: uint32 fprh; // fcr6
257: uint32 fprl; // fcr7
258: uint32 fpit; // fcr8
259: uint32 fpsr; // fcr62 [9]
260: uint32 fpcr; // fcr63 [10]
261: };
262: };
263:
1.1.1.11 root 264: static const uint32 fcr_mask[11];
1.1 root 265: static const char * const sipname[3];
1.1.1.2 root 266: static const char * const dmt_en_str[16];
1.1 root 267: };
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