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Return to m88100.h CVS log | Up to [Isaki's NoNo m68k/m88k emulator] / nono / m88xx0 |
1.1 root 1: //
2: // nono
1.1.1.2 root 3: // Copyright (C) 2020 nono project
4: // Licensed under nono-license.txt
1.1 root 5: //
6:
7: #pragma once
8:
1.1.1.15! root 9: #include "nono.h"
1.1.1.12 root 10:
11: class MPU88xx0Device;
1.1 root 12:
1.1.1.14 root 13: // 定数。
14: struct M88100
1.1 root 15: {
16: // PID(cr0)
1.1.1.15! root 17: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
! 18: // +---------------+---------------+---------------+-------------+-+
! 19: // | 0 | REV | VER |M|
! 20: // +---------------+---------------+---------------+-------------+-+
1.1 root 21: static const uint32 PID_REV_MASK = 0x0000ff00; // 0 = MC88100
22: static const uint32 PID_VER_MASK = 0x000000fe;
23: static const uint32 PID_MASTER = 0x00000001;
1.1.1.15! root 24:
1.1 root 25: // PSR(cr1)
1.1.1.15! root 26: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
! 27: // +-+-+-+-+-------+---------------+---------------+-------+-+-+-+-+
! 28: // |S|B|S|C| |D|M|I|S|
! 29: // |U|O|E| | 0 |1|X|N|F|
! 30: // +-+-+-+-+-------+---------------+---------------+-------+-+-+-+-+
1.1 root 31: static const uint32 PSR_SUPER = 0x80000000;
32: static const uint32 PSR_BO_LE = 0x40000000; // ByteOrder(Little)
33: static const uint32 PSR_SER = 0x20000000;
34: static const uint32 PSR_C = 0x10000000; // Carry
35: static const uint32 PSR_SFD1 = 0x00000008; // SFU1 Disable
36: static const uint32 PSR_MXM = 0x00000004; // MisalignedAccessEnable
37: static const uint32 PSR_IND = 0x00000002; // Interrupt Disable
38: static const uint32 PSR_SFRZ = 0x00000001; // Shadow Freeze
39:
40: // 例外処理で使用される S*IP
1.1.1.15! root 41: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
! 42: // +---------------+---------------+---------------+-----------+-+-+
! 43: // | S*IP |V|E|
! 44: // +---------------+---------------+---------------+-----------+-+-+
1.1 root 45: static const uint32 SIP_MASK = 0xfffffffcU;
46: static const uint32 SIP_V = 0x00000002;
47: static const uint32 SIP_E = 0x00000001;
48:
49: // DMTn、データ例外
1.1.1.15! root 50: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
! 51: // +---------------+---------------+-+-+-+-+-------+-+-+-+-+-+-+-+-+
! 52: // | |B|D|D|L| |S|E|E|E|E|W|V|
! 53: // | 0 |O|A|B|K| DREG | |3|2|1|0|R| |
! 54: // +---------------+---------------+-+-+-+-+-------+-+-+-+-+-+-+-+-+
1.1 root 55: static const uint32 DM_BO = 0x00008000;
56: static const uint32 DM_DAS = 0x00004000;
57: static const uint32 DM_DOUB1 = 0x00002000;
58: static const uint32 DM_LOCK = 0x00001000;
59: static const uint32 DM_DREG_MASK = 0x00000f80;
60: static const uint32 DM_SIGNED = 0x00000040;
61: static const uint32 DM_EN3 = 0x00000020;
62: static const uint32 DM_EN2 = 0x00000010;
63: static const uint32 DM_EN1 = 0x00000008;
64: static const uint32 DM_EN0 = 0x00000004;
65: static const uint32 DM_EN_MASK = (DM_EN0 | DM_EN1 | DM_EN2 | DM_EN3);
66: static const uint32 DM_WRITE = 0x00000002;
67: static const uint32 DM_VALID = 0x00000001;
68: // 内部識別フラグ
69: static const uint32 DM_SIZE_B = (1U << 16) | DM_EN3;
70: static const uint32 DM_SIZE_H = (1U << 17) | DM_EN3 | DM_EN2;
71: static const uint32 DM_SIZE_W = (1U << 18) | DM_EN_MASK;
72: static const uint32 DM_USR = (1U << 20);
73: static const uint32 DM_BU = DM_SIZE_B;
74: static const uint32 DM_B = DM_SIZE_B | DM_SIGNED;
75: static const uint32 DM_HU = DM_SIZE_H;
76: static const uint32 DM_H = DM_SIZE_H | DM_SIGNED;
77: static const uint32 DM_W = DM_SIZE_W;
78: static const uint32 DM_D1 = DM_SIZE_W | DM_DOUB1;
79: static const uint32 DM_D2 = DM_SIZE_W;
80:
1.1.1.11 root 81: // FPECR(fcr0)
82: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
83: // +---------------+---------------+---------------+-+-+-+-+-+-+-+-+
84: // | |I|U|P|O|D|U|O|I|
85: // | 0 |O|N|V|P|Z|F|V|N|
86: // +---------------+---------------+---------------+-+-+-+-+-+-+-+-+
87: static const uint32 FPECR_MASK = 0x000000ff; // 有効ビットマスク
88: static const uint32 FPECR_FIOV = 0x00000080; // FP Integer Overflow
89: static const uint32 FPECR_FUNIMP= 0x00000040; // FP Unimplemented
90: static const uint32 FPECR_FPRV = 0x00000020; // FP Privilege Violation
91: static const uint32 FPECR_FROP = 0x00000010; // FP Reserved Operand
92: static const uint32 FPECR_FDVZ = 0x00000008; // FP Divice-by-Zero
93: static const uint32 FPECR_FUNF = 0x00000004; // FP Underflow
94: static const uint32 FPECR_FOVF = 0x00000002; // FP Overflow
95: static const uint32 FPECR_FINX = 0x00000001; // FP Inexact
96:
97: // FPHS1(fcr1)
98: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
99: // +-+---------------------+---------------------------------------+
100: // |S| Exponent | High order 20 bits of Mantissa |
101: // +-+---------------------+---------------------------------------+
102:
103: // FPLS1(fcr2)
104: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
105: // +---------------------------------------------------------------+
106: // | Low order bits of Mantissa or Integer Operand |
107: // +---------------------------------------------------------------+
108:
109: // FPHS2(fcr3)
110: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
111: // +-+---------------------+---------------------------------------+
112: // |S| Exponent | High order 20 bits of Mantissa |
113: // +-+---------------------+---------------------------------------+
114:
115: // FPLS2(fcr4)
116: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
117: // +---------------------------------------------------------------+
118: // | Low order bits of Mantissa or Integer Operand |
119: // +---------------------------------------------------------------+
120:
121: // FPPT(fcr5)
122: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
123: // +---------------+---------------+---------+---+---+---+---------+
124: // | 0 | OPCODE |T1 |T2 |TD | DestReg |
125: // +---------------+---------------+---------+---+---+---+---------+
126: static const uint32 FPPT_MASK = 0x0000ffff; // 有効ビットマスク
127: static const uint32 FPPT_OPCODE = 0x0000f800; // Opcode
128: static const uint32 FPPT_T1 = 0x00000600; // Source1 Operand Size
129: static const uint32 FPPT_T2 = 0x00000180; // Source2 Operand Size
130: static const uint32 FPPT_TD = 0x00000060; // Destination Size
131: static const uint32 FPPT_DEST = 0x0000001f; // Destination Register No.
132:
133: // FPRH(fcr6)
134: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
135: // +-----+-+-+-+-+-+-----+---------+-------------+-----------------+
136: // |S|RM |G|R|S|A| 0 | High Order Bits of Mantissa |
137: // +-----+-+-+-+-+-+-----+---------+-------------+-----------------+
138: static const uint32 FPRH_MASK = 0xfe1fffff; // 有効ビットマスク
139: static const uint32 FPRH_SIGN = 0x80000000; // Result Sign
140: static const uint32 FPRH_RNDMODE= 0x60000000; // Rounding Mode for Res.
141: static const uint32 FPRH_GUARD = 0x10000000; // Guard Bit for Result
142: static const uint32 FPRH_ROUND = 0x08000000; // Round Bit for Result
143: static const uint32 FPRH_STICKY = 0x04000000; // Sticky Bit for Result
144: static const uint32 FPRH_ADDONE = 0x02000000; // Add One
145: static const uint32 FPRH_MANT = 0x001fffff; // Mantissa(High)
146: static const uint32 FPRH_1 = 0x00100000; // 隠し実数部の 1
147:
148: // FPRL(fcr7)
149: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
150: // +---------------------------------------------------------------+
151: // | Low Order Bits of Mantissa |
152: // +---------------------------------------------------------------+
153:
154: // FPIT(fcr8)
155: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
156: // +-----------------------+-------+---------+-+-+-+-+-+-+---------+
157: // | | | |D|E|E|E|E|E| |
158: // | RESEXP (12bits) | 0 | OPCODE |S|V|Z|U|O|N| DestReg |
159: // +-----------------------+-------+---------+-+-+-+-+-+-+---------+
160: static const uint32 FPIT_MASK = 0xfff0ffff; // 有効ビットマスク
161: static const uint32 FPIT_RESEXP = 0xfff00000; // Result Exponent
162: static const uint32 FPIT_OPCODE = 0x0000f800; // Opcode
163: static const uint32 FPIT_DESTSIZ= 0x00000400; // Destination Size
164: static const uint32 FPIT_EFINV = 0x00000200; // Enable Invalid Op.
165: static const uint32 FPIT_EFDVZ = 0x00000100; // Enable Divide-by-Zero
166: static const uint32 FPIT_EFUNF = 0x00000080; // Enable Underflow
167: static const uint32 FPIT_EFOVF = 0x00000040; // Enable Overflow
168: static const uint32 FPIT_EFINX = 0x00000020; // Enable Inexact
169: static const uint32 FPIT_DEST = 0x0000001f; // Destination Register No.
170:
171: // FPSR(fcr62)
172: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
173: // +---------------+---------------+---------------+-----+-+-+-+-+-+
174: // | |A|A|A|A|A|
175: // | 0 |V|D|U|O|I|
176: // +---------------+---------------+---------------+-----+-+-+-+-+-+
177: static const uint32 FPSR_MASK = 0x0000001f; // 有効ビットマスク
178: static const uint32 FPSR_AFINV = 0x00000010; // Acc. Invalid Op. Flag
179: static const uint32 FPSR_AFDVZ = 0x00000008; // Acc. Divide-by-Zero Flag
180: static const uint32 FPSR_AFUNF = 0x00000004; // Acc. Underflow Flag
181: static const uint32 FPSR_AFOVF = 0x00000002; // Acc. Overflow Flag
182: static const uint32 FPSR_AFINX = 0x00000001; // Acc. Inexact Flag
183:
184: // FPCR(fcr63)
185: // 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
186: // +---------------+---------------+---+-----------+-----+-+-+-+-+-+
187: // | | | |E|E|E|E|E|
188: // | 0 |RM | |V|D|U|O|I|
189: // +---------------+---------------+---+-----------+-----+-+-+-+-+-+
190: static const uint32 FPCR_MASK = 0x0000c01f; // 有効ビットマスク
191: static const uint32 FPCR_RM = 0x0000c000; // Rounding Mask
192: static const uint32 FPCR_EFINV = 0x00000010; // Enable Invalid Operation
193: static const uint32 FPCR_EFDVZ = 0x00000008; // Enable Divide-by-Zero
194: static const uint32 FPCR_EFUNF = 0x00000004; // Enable Underflow
195: static const uint32 FPCR_EFOVF = 0x00000002; // Enable Overflow
196: static const uint32 FPCR_EFINX = 0x00000001; // Enable Inexact
197:
1.1.1.14 root 198: // 例外
199: static const uint32 EXCEP_RESET = 0;
200: static const uint32 EXCEP_INTERRUPT = 1;
201: static const uint32 EXCEP_INST = 2;
202: static const uint32 EXCEP_DATA = 3;
203: static const uint32 EXCEP_MISALIGNED = 4;
204: static const uint32 EXCEP_UNIMPL_OP = 5;
205: static const uint32 EXCEP_PRIV = 6;
206: static const uint32 EXCEP_BOUNDS = 7;
207: static const uint32 EXCEP_INT_DIV = 8;
208: static const uint32 EXCEP_INT_OVF = 9;
209: static const uint32 EXCEP_ERROR = 10;
210:
211: static const uint32 EXCEP_SFU1_PRECISE = 114;
212: static const uint32 EXCEP_SFU1_IMPRECISE= 115;
213: static const uint32 EXCEP_SFU2_PRECISE = 116;
214: static const uint32 EXCEP_SFU3_PRECISE = 118;
215: static const uint32 EXCEP_SFU4_PRECISE = 120;
216: static const uint32 EXCEP_SFU5_PRECISE = 122;
217: static const uint32 EXCEP_SFU6_PRECISE = 124;
218: static const uint32 EXCEP_SFU7_PRECISE = 126;
219:
220: // 32bit 命令コードからディスパッチ用の 12bit に変換。
221: // ops と disasm で使うため。
222: static uint32 op32_to_12(uint32 op) {
223: return ((op >> 20) & 0x0fc0) | ((op >> 10) & 0x003f);
224: }
225: };
226:
227: // m88100 レジスタイメージを保持する構造体。
228: // この構造体はコピーや比較をするので、ポインタとかは置かないこと。
229: struct m88100reg
230: {
1.1 root 231: // 頻繁にアクセスしそうな変数はオフセットの若いほうに持ってきておく。
232:
233: // 実行中の命令
1.1.1.14 root 234: uint64 opX {};
1.1 root 235: // プリフェッチ命令
1.1.1.14 root 236: uint64 opF {};
1.1 root 237:
1.1.1.14 root 238: uint32 xip {};
239: uint32 nip {};
240: uint32 fip {};
1.1 root 241:
242: uint32 r[32] {};
243: union {
244: uint32 cr[21] {};
245: struct {
246: uint32 pid; // cr0
247: uint32 psr; // cr1
248: uint32 epsr; // cr2
249: uint32 ssbr; // cr3
250: uint32 sxip; // cr4
251: uint32 snip; // cr5
252: uint32 sfip; // cr6
253: uint32 vbr; // cr7
254: uint32 dmt0; // cr8
255: uint32 dmd0; // cr9
256: uint32 dma0; // cr10
257: uint32 dmt1; // cr11
258: uint32 dmd1; // cr12
259: uint32 dma1; // cr13
260: uint32 dmt2; // cr14
261: uint32 dmd2; // cr15
262: uint32 dma2; // cr16
263: uint32 sr[4]; // cr17,18,19,20
264: };
265: };
266: union {
267: uint32 fcr[11] {};
268: struct {
269: uint32 fpecr; // fcr0
270: uint32 fphs1; // fcr1
271: uint32 fpls1; // fcr2
272: uint32 fphs2; // fcr3
273: uint32 fpls2; // fcr4
274: uint32 fppt; // fcr5
275: uint32 fprh; // fcr6
276: uint32 fprl; // fcr7
277: uint32 fpit; // fcr8
278: uint32 fpsr; // fcr62 [9]
279: uint32 fpcr; // fcr63 [10]
280: };
281: };
282:
1.1.1.11 root 283: static const uint32 fcr_mask[11];
1.1 root 284: static const char * const sipname[3];
1.1.1.2 root 285: static const char * const dmt_en_str[16];
1.1 root 286: };
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