--- nono/m88xx0/m88100ops.cpp	2026/04/29 17:04:41	1.1.1.4
+++ nono/m88xx0/m88100ops.cpp	2026/04/29 17:04:44	1.1.1.5
@@ -5,6 +5,8 @@
 //
 
 #include "m88100acc.h"
+#include <cfenv>
+#include <cmath>
 
 // 命令のフィールド取り出し
 #define FLD_D	m88100opf_D(opX)
@@ -30,8 +32,49 @@
 #define rS1	(r[FLD_S1])
 #define rS2	(r[FLD_S2])
 // ダブルワードの2ワード目
-#define rD2	(r[(FLD_D + 1) & 0x1f])
+#define FLD_D2	((FLD_D + 1) & 0x1f)
+#define rD2	(r[FLD_D2])
 
+// FP フィールド
+#define FP_T1	m88100opf_FP_T1(opX)
+#define FP_T2	m88100opf_FP_T2(opX)
+#define FP_TD	m88100opf_FP_TD(opX)
+
+// XXX: 暫定
+#include "fp.h"
+#define FP_GET(v, t, n)	\
+do {	\
+	if (t == 0) {	\
+		v = u2f(r[n]);	\
+	} else if (t == 1) {	\
+		if (n == 31) {	\
+			FPException(M88K_FPEXCEP_FUNIMP);	\
+			return;	\
+		}	\
+		v = u2d(((uint64)r[n] << 32) | r[n + 1]);	\
+	} else {	\
+		FPException(M88K_FPEXCEP_FROP);	\
+		return;	\
+	}	\
+} while (0)
+
+#define FP_SET(t, n, v)	\
+do {	\
+	if (t == 0) {	\
+		r[n] = f2u(v);	\
+	} else if (t == 1) {	\
+		if (n == 31) {	\
+			FPException(M88K_FPEXCEP_FUNIMP);	\
+			return;	\
+		}	\
+		uint64 tmp = d2u(v);	\
+		r[n] = tmp >> 32;	\
+		r[n + 1] = (uint32)tmp;	\
+	} else {	\
+		FPException(M88K_FPEXCEP_FROP);	\
+		return;	\
+	}	\
+} while (0)
 
 // ブランチ命令入り口
 inline void
@@ -39,7 +82,7 @@ m88kcpu::EnterBranch(uint32 toaddr)
 {
 	// ブランチヒストリに登録しつつ、
 	// ブランチヒストリからブランチ状況を取得
-	auto e = brhist.AddEntry(xip, toaddr, opX);
+	auto e = brhist.AddEntry(xip | (IsSuper() ? 1 : 0), toaddr, opX);
 	fip = toaddr;
 
 	// STOP 検出。
@@ -277,12 +320,12 @@ OP_DEF(xmem_bu_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(1);
 
-	total_cycle += 4;	// Table.7-3
+	AddCycle(4);	// Table.7-3
 
 	lastaddr = addr;
 	tmp = cmmu[1].xmem_8(addr, rD);
 	if ((int64)tmp < 0) {
-		XmemDataException(addr, rD, DM_BU | DM_LOCK);
+		XmemDataException(addr, DM_BU | DM_LOCK);
 		return;
 	}
 	if (FLD_D == 0)
@@ -299,12 +342,12 @@ OP_DEF(xmem_w_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(4);
 
-	total_cycle += 4;	// Table.7-3
+	AddCycle(4);	// Table.7-3
 
 	lastaddr = addr;
 	tmp = cmmu[1].xmem_32(addr, rD);
 	if ((int64)tmp < 0) {
-		XmemDataException(addr, rD, DM_W | DM_LOCK);
+		XmemDataException(addr, DM_W | DM_LOCK);
 		return;
 	}
 	if (FLD_D == 0)
@@ -321,12 +364,12 @@ OP_DEF(ld_hu_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(2);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 	data = cmmu[1].load_16(addr);
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_HU);
+		ReadDataException32(addr, DM_HU);
 		return;
 	}
 	if (FLD_D == 0)
@@ -343,12 +386,12 @@ OP_DEF(ld_bu_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(1);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 	data = cmmu[1].load_8(addr);
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_BU);
+		ReadDataException32(addr, DM_BU);
 		return;
 	}
 	if (FLD_D == 0)
@@ -365,18 +408,18 @@ OP_DEF(ld_d_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(8);
 
-	total_cycle += 4;	// Table.7-3
+	AddCycle(4);	// Table.7-3
 
 	lastaddr = addr;
 	data1 = cmmu[1].load_32(addr);
 	if ((int64)data1 < 0) {
-		ReadDataException(addr, DM_D1);
+		ReadDataException64(addr, DM_D1);
 		return;
 	}
 	addr += 4;
 	data2 = cmmu[1].load_32(addr);
 	if ((int64)data2 < 0) {
-		ReadDataException(addr, DM_D2);
+		ReadDataException64(addr, DM_D2);
 		return;
 	}
 
@@ -394,12 +437,12 @@ OP_DEF(ld_w_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(4);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 	data = cmmu[1].load_32(addr);
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_W);
+		ReadDataException32(addr, DM_W);
 		return;
 	}
 	if (FLD_D == 0)
@@ -416,12 +459,12 @@ OP_DEF(ld_h_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(2);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 	data = cmmu[1].load_16(addr);
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_H);
+		ReadDataException32(addr, DM_H);
 		return;
 	}
 	if (FLD_D == 0)
@@ -438,12 +481,12 @@ OP_DEF(ld_b_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(1);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 	data = cmmu[1].load_8(addr);
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_B);
+		ReadDataException32(addr, DM_B);
 		return;
 	}
 	if (FLD_D == 0)
@@ -460,18 +503,18 @@ OP_DEF(st_d_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(8);
 
-	total_cycle += 1 + 4;	// Table.7-3
+	AddCycle(1 + 4);	// Table.7-3
 
 	lastaddr = addr;
 	rv = cmmu[1].store_32(addr, rD);
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_D1);
+		WriteDataException64(addr, DM_D1);
 		return;
 	}
 	addr += 4;
 	rv = cmmu[1].store_32(addr, rD2);
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD2, DM_D2);
+		WriteDataException64(addr, DM_D2);
 		return;
 	}
 }
@@ -485,12 +528,12 @@ OP_DEF(st_w_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(4);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 	rv = cmmu[1].store_32(addr, rD);
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_W);
+		WriteDataException32(addr, DM_W);
 		return;
 	}
 }
@@ -504,12 +547,12 @@ OP_DEF(st_h_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(2);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
-	rv = cmmu[1].store_16(addr, rD);
+	rv = cmmu[1].store_16(addr, rD & 0xffff);
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_H);
+		WriteDataException32(addr, DM_H);
 		return;
 	}
 }
@@ -523,12 +566,12 @@ OP_DEF(st_b_imm)
 	addr = rS1 + IMM16;
 	LDST_ALIGN(1);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
-	rv = cmmu[1].store_8(addr, rD);
+	rv = cmmu[1].store_8(addr, rD & 0xff);
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_B);
+		WriteDataException32(addr, DM_B);
 		return;
 	}
 }
@@ -653,7 +696,7 @@ OP_DEF(divu_imm)
 		return;
 	}
 
-	total_cycle += 38;	// Table.7-6 (ただしざっくり)
+	AddCycle(38);	// Table.7-6 (ただしざっくり)
 
 	if (IMM16 == 0) {
 		Exception(M88K_EXCEP_INT_DIV);
@@ -672,7 +715,7 @@ OP_DEF(mul_imm)
 		return;
 	}
 
-	total_cycle += 4;	// Table.7-6 (ただしざっくり)
+	AddCycle(4);	// Table.7-6 (ただしざっくり)
 
 	if (FLD_D == 0)
 		return;
@@ -715,7 +758,7 @@ OP_DEF(div_imm)
 		return;
 	}
 
-	total_cycle += 38;	// Table.7-6 (ただしざっくり)
+	AddCycle(38);	// Table.7-6 (ただしざっくり)
 
 	if ((int32)rS1 < 0 || IMM16 == 0) {
 		Exception(M88K_EXCEP_INT_DIV);
@@ -889,61 +932,168 @@ OP_DEF(fxcr)
 // 100001_DDDDDSSSSS_00000n_nnnnnsssss
 OP_DEF(fmul)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s1;
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s1, FP_T1, FLD_S1);
+	FP_GET(s2, FP_T2, FLD_S2);
+	FP_SET(FP_TD, FLD_D, s1 * s2);
 }
 
 // 100001_DDDDD00000_001000_000nnsssss
 OP_DEF(flt)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_SET(FP_TD, FLD_D, (double)rS2);
 }
 
+
 // 100001_DDDDDSSSSS_00101n_nnnnnsssss
 OP_DEF(fadd)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s1;
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s1, FP_T1, FLD_S1);
+	FP_GET(s2, FP_T2, FLD_S2);
+	FP_SET(FP_TD, FLD_D, s1 + s2);
 }
 
 // 100001_DDDDDSSSSS_00110n_nnnnnsssss
 OP_DEF(fsub)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s1;
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s1, FP_T1, FLD_S1);
+	FP_GET(s2, FP_T2, FLD_S2);
+	FP_SET(FP_TD, FLD_D, s1 - s2);
 }
 
 // 100001_DDDDDSSSSS_00111n_nnnnnsssss
 OP_DEF(fcmp)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s1;
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s1, FP_T1, FLD_S1);
+	FP_GET(s2, FP_T2, FLD_S2);
+	rD = acc_fcmp(s1, s2);
 }
 
 // 100001_DDDDD00000_010010_0nn00sssss
 OP_DEF(int)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s2, FP_T2, FLD_S2);
+
+	int mode = (fpcr >> 14) & 3;
+	switch (mode) {
+	 case 0:
+		std::fesetround(FE_TONEAREST);
+		rD = (uint32)(int32)std::nearbyint(s2);
+		break;
+	 case 1:
+		rD = (uint32)(int32)std::trunc(s2);
+		break;
+	 case 2:
+		rD = (uint32)(int32)std::floor(s2);
+		break;
+	 case 3:
+		rD = (uint32)(int32)std::ceil(s2);
+		break;
+	}
 }
 
 // 100001_DDDDD00000_010100_0nn00sssss
 OP_DEF(nint)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s2, FP_T2, FLD_S2);
+	std::fesetround(FE_TONEAREST);
+	rD = (uint32)(int32)std::nearbyint(s2);
 }
 
 // 100001_DDDDD00000_010110_0nn00sssss
 OP_DEF(trnc)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s2, FP_T2, FLD_S2);
+printf("trunc(%f) => %f\n", s2, std::trunc(s2));
+	rD = (uint32)(int32)std::trunc(s2);
 }
 
 // 100001_DDDDDSSSSS_01110n_nnnnnsssss
 OP_DEF(fdiv)
 {
-	OP_FUNC(unimpl);
+	// 暫定
+	double s1;
+	double s2;
+
+	if (FLD_D == 0) {
+		FPException(M88K_FPEXCEP_FUNIMP);
+		return;
+	}
+
+	FP_GET(s1, FP_T1, FLD_S1);
+	FP_GET(s2, FP_T2, FLD_S2);
+	FP_SET(FP_TD, FLD_D, s1 / s2);
 }
 
 // 110000_nnnnnnnnnn_nnnnnn_nnnnnnnnnn
 OP_DEF(br)
 {
-	total_cycle += 1;	// Table.7-5
+	AddCycle(1);	// Table.7-5
 	EnterBranch(xip + D26);
 	ExitBranch();
 }
@@ -951,7 +1101,7 @@ OP_DEF(br)
 // 110001_nnnnnnnnnn_nnnnnn_nnnnnnnnnn
 OP_DEF(br_n)
 {
-	total_cycle += 0;	// Table.7-5
+	AddCycle(0);	// Table.7-5
 	EnterBranch(xip + D26);
 	ExitDelayBranch();
 }
@@ -959,7 +1109,7 @@ OP_DEF(br_n)
 // 110010_nnnnnnnnnn_nnnnnn_nnnnnnnnnn
 OP_DEF(bsr)
 {
-	total_cycle += 1;	// Table.7-5
+	AddCycle(1);	// Table.7-5
 	EnterBranch(xip + D26);
 	r[1] = nip;
 	ExitBranch();
@@ -968,7 +1118,7 @@ OP_DEF(bsr)
 // 110011_nnnnnnnnnn_nnnnnn_nnnnnnnnnn
 OP_DEF(bsr_n)
 {
-	total_cycle += 0;	// Table.7-5
+	AddCycle(0);	// Table.7-5
 	EnterBranch(xip + D26);
 	r[1] = nip + 4;
 	ExitDelayBranch();
@@ -978,7 +1128,7 @@ OP_DEF(bsr_n)
 OP_DEF(bb0)
 {
 	if ((rS1 & (1 << B5)) == 0) {
-		total_cycle += 1;	// Table.7-5
+		AddCycle(1);	// Table.7-5
 		EnterBranch(xip + D16);
 		ExitBranch();
 	}
@@ -997,7 +1147,7 @@ OP_DEF(bb0_n)
 OP_DEF(bb1)
 {
 	if ((rS1 & (1 << B5)) != 0) {
-		total_cycle += 1;	// Table.7-5
+		AddCycle(1);	// Table.7-5
 		EnterBranch(xip + D16);
 		ExitBranch();
 	}
@@ -1016,7 +1166,7 @@ OP_DEF(bb1_n)
 OP_DEF(bcnd)
 {
 	if (acc_cnd(rS1) & M5) {
-		total_cycle += 1;	// Table.7-5
+		AddCycle(1);	// Table.7-5
 		EnterBranch(xip + D16);
 		ExitBranch();
 	}
@@ -1144,7 +1294,7 @@ OP_DEF(xmem_bu)
 
 	LDST_USR_SCALE_ALIGN(1);
 
-	total_cycle += 4;	// Table.7-3
+	AddCycle(4);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1153,7 +1303,7 @@ OP_DEF(xmem_bu)
 	tmp = cmmu[1].xmem_8(addr, rD);
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 	if ((int64)tmp < 0) {
-		XmemDataException(addr, rD, DM_BU | DM_LOCK | usr);
+		XmemDataException(addr, DM_BU | DM_LOCK | usr);
 		return;
 	}
 	if (FLD_D == 0)
@@ -1170,7 +1320,7 @@ OP_DEF(xmem_w)
 
 	LDST_USR_SCALE_ALIGN(4);
 
-	total_cycle += 4;	// Table.7-3
+	AddCycle(4);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1179,7 +1329,7 @@ OP_DEF(xmem_w)
 	tmp = cmmu[1].xmem_32(addr, rD);
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 	if ((int64)tmp < 0) {
-		XmemDataException(addr, rD, DM_W | DM_LOCK | usr);
+		XmemDataException(addr, DM_W | DM_LOCK | usr);
 		return;
 	}
 
@@ -1197,7 +1347,7 @@ OP_DEF(ld_hu)
 
 	LDST_USR_SCALE_ALIGN(2);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1206,7 +1356,7 @@ OP_DEF(ld_hu)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_HU | usr);
+		ReadDataException32(addr, DM_HU | usr);
 		return;
 	}
 	if (FLD_D == 0)
@@ -1223,7 +1373,7 @@ OP_DEF(ld_bu)
 
 	LDST_USR_SCALE_ALIGN(1);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1232,7 +1382,7 @@ OP_DEF(ld_bu)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_BU | usr);
+		ReadDataException32(addr, DM_BU | usr);
 		return;
 	}
 	if (FLD_D == 0)
@@ -1249,7 +1399,7 @@ OP_DEF(ld_d)
 
 	LDST_USR_SCALE_ALIGN(8);
 
-	total_cycle += 4;	// Table.7-3
+	AddCycle(4);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1259,7 +1409,7 @@ OP_DEF(ld_d)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data1 < 0) {
-		ReadDataException(addr, DM_D1 | usr);
+		ReadDataException64(addr, DM_D1 | usr);
 		return;
 	}
 	addr += 4;
@@ -1269,7 +1419,7 @@ OP_DEF(ld_d)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data2 < 0) {
-		ReadDataException(addr, DM_D2 | usr);
+		ReadDataException64(addr, DM_D2 | usr);
 		return;
 	}
 	rD  = data1;
@@ -1286,7 +1436,7 @@ OP_DEF(ld_w)
 
 	LDST_USR_SCALE_ALIGN(4);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1295,7 +1445,7 @@ OP_DEF(ld_w)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_W | usr);
+		ReadDataException32(addr, DM_W | usr);
 		return;
 	}
 	if (FLD_D == 0)
@@ -1312,7 +1462,7 @@ OP_DEF(ld_h)
 
 	LDST_USR_SCALE_ALIGN(2);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1321,7 +1471,7 @@ OP_DEF(ld_h)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_H | usr);
+		ReadDataException32(addr, DM_H | usr);
 		return;
 	}
 	if (FLD_D == 0)
@@ -1338,7 +1488,7 @@ OP_DEF(ld_b)
 
 	LDST_USR_SCALE_ALIGN(1);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1347,7 +1497,7 @@ OP_DEF(ld_b)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)data < 0) {
-		ReadDataException(addr, DM_B | usr);
+		ReadDataException32(addr, DM_B | usr);
 		return;
 	}
 	if (FLD_D == 0)
@@ -1364,7 +1514,7 @@ OP_DEF(st_d)
 
 	LDST_USR_SCALE_ALIGN(8);
 
-	total_cycle += 1 + 4;	// Table.7-3
+	AddCycle(1 + 4);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1373,7 +1523,7 @@ OP_DEF(st_d)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_D1 | usr);
+		WriteDataException64(addr, DM_D1 | usr);
 		return;
 	}
 
@@ -1384,7 +1534,7 @@ OP_DEF(st_d)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD2, DM_D2 | usr);
+		WriteDataException64(addr, DM_D2 | usr);
 		return;
 	}
 }
@@ -1398,7 +1548,7 @@ OP_DEF(st_w)
 
 	LDST_USR_SCALE_ALIGN(4);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
@@ -1407,7 +1557,7 @@ OP_DEF(st_w)
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_W | usr);
+		WriteDataException32(addr, DM_W | usr);
 		return;
 	}
 }
@@ -1421,16 +1571,16 @@ OP_DEF(st_h)
 
 	LDST_USR_SCALE_ALIGN(2);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
 	if (__predict_false(usr)) cmmu[1].SetSuper(false);
-	rv = cmmu[1].store_16(addr, rD);
+	rv = cmmu[1].store_16(addr, rD & 0xffff);
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_H | usr);
+		WriteDataException32(addr, DM_H | usr);
 		return;
 	}
 }
@@ -1444,16 +1594,16 @@ OP_DEF(st_b)
 
 	LDST_USR_SCALE_ALIGN(1);
 
-	total_cycle += 3;	// Table.7-3
+	AddCycle(3);	// Table.7-3
 
 	lastaddr = addr;
 
 	if (__predict_false(usr)) cmmu[1].SetSuper(false);
-	rv = cmmu[1].store_8(addr, rD);
+	rv = cmmu[1].store_8(addr, rD & 0xff);
 	if (__predict_false(usr)) cmmu[1].SetSuper(true);
 
 	if ((int64)rv < 0) {
-		WriteDataException(addr, rD, DM_B | usr);
+		WriteDataException32(addr, DM_B | usr);
 		return;
 	}
 }
@@ -1604,7 +1754,7 @@ OP_DEF(divu)
 		return;
 	}
 
-	total_cycle += 38;	// Table.7-6 (ただしざっくり)
+	AddCycle(38);	// Table.7-6 (ただしざっくり)
 
 	if (rS2 == 0) {
 		Exception(M88K_EXCEP_INT_DIV);
@@ -1623,7 +1773,7 @@ OP_DEF(mul)
 		return;
 	}
 
-	total_cycle += 4;	// Table.7-6 (ただしざっくり)
+	AddCycle(4);	// Table.7-6 (ただしざっくり)
 
 	if (FLD_D == 0)
 		return;
@@ -1686,7 +1836,7 @@ OP_DEF(div)
 		return;
 	}
 
-	total_cycle += 38;	// Table.7-6 (ただしざっくり)
+	AddCycle(38);	// Table.7-6 (ただしざっくり)
 
 	if ((int32)rS1 < 0 || (int32)rS2 <= 0) {
 		Exception(M88K_EXCEP_INT_DIV);
@@ -1779,7 +1929,7 @@ OP_DEF(rot_2)
 // 111101_zzzzzzzzzz_110000_00000sssss
 OP_DEF(jmp)
 {
-	total_cycle += 1;	// Table.7-5
+	AddCycle(1);	// Table.7-5
 	EnterBranch(rS2);
 	ExitBranch();
 }
@@ -1787,7 +1937,7 @@ OP_DEF(jmp)
 // 111101_zzzzzzzzzz_110001_00000sssss
 OP_DEF(jmp_n)
 {
-	total_cycle += 0;	// Table.7-5
+	AddCycle(0);	// Table.7-5
 	EnterBranch(rS2);
 	ExitDelayBranch();
 }
@@ -1795,7 +1945,7 @@ OP_DEF(jmp_n)
 // 111101_zzzzzzzzzz_110010_00000sssss
 OP_DEF(jsr)
 {
-	total_cycle += 1;	// Table.7-5
+	AddCycle(1);	// Table.7-5
 	EnterBranch(rS2);
 	r[1] = nip;
 	ExitBranch();
@@ -1804,7 +1954,7 @@ OP_DEF(jsr)
 // 111101_zzzzzzzzzz_110011_00000sssss
 OP_DEF(jsr_n)
 {
-	total_cycle += 0;	// Table.7-5
+	AddCycle(0);	// Table.7-5
 	EnterBranch(rS2);
 	r[1] = nip + 4;
 	ExitDelayBranch();
@@ -1856,7 +2006,7 @@ OP_DEF(ff0)
 // 111101_zzzzzzzzzz_111111_0000000000
 OP_DEF(rte)
 {
-	total_cycle += 2;	// Table.7-5
+	AddCycle(2);	// Table.7-5
 
 	SetPSR(epsr);