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Up to [Isaki's NoNo m68k/m88k emulator] / nono / m88xx0|
Return to testdis.cpp CVS log | Up to [Isaki's NoNo m68k/m88k emulator] / nono / m88xx0 |
1.1 root 1: //
2: // nono
3: // Copyright (C) 2020 nono project
4: // Licensed under nono-license.txt
5: //
6:
7: #include "m88100disasm.h"
8: #include "mystring.h"
9:
10: struct {
11: uint32 inst;
12: std::string expected;
13: } table[] = {
14: { 0x02328765, "xmem.bu r17,r18,#0x8765" },
15: { 0x06328765, "xmem r17,r18,#0x8765" },
16: { 0x0a328765, "ld.hu r17,r18,#0x8765" },
17: { 0x0e328765, "ld.bu r17,r18,#0x8765" },
18: { 0x12328765, "ld.d r17,r18,#0x8765" },
19: { 0x16328765, "ld r17,r18,#0x8765" },
20: { 0x1a328765, "ld.h r17,r18,#0x8765" },
21: { 0x1e328765, "ld.b r17,r18,#0x8765" },
22: { 0x22328765, "st.d r17,r18,#0x8765" },
23: { 0x26328765, "st r17,r18,#0x8765" },
24: { 0x2a328765, "st.h r17,r18,#0x8765" },
25: { 0x2e328765, "st.b r17,r18,#0x8765" },
26: { 0x32328765, "lda.d r17,r18,#0x8765" },
27: { 0x36328765, "lda r17,r18,#0x8765" },
28: { 0x3a328765, "lda.h r17,r18,#0x8765" },
29: { 0x3e328765, "lda.b r17,r18,#0x8765" },
30:
31: { 0x42328765, "and r17,r18,#0x8765" },
32: { 0x46328765, "and.u r17,r18,#0x8765" },
33: { 0x4a328765, "mask r17,r18,#0x8765" },
34: { 0x4e328765, "mask.u r17,r18,#0x8765" },
35: { 0x52328765, "xor r17,r18,#0x8765" },
36: { 0x56328765, "xor.u r17,r18,#0x8765" },
37: { 0x5a328765, "or r17,r18,#0x8765" },
38: { 0x5e328765, "or.u r17,r18,#0x8765" },
39:
40: { 0x62328765, "addu r17,r18,#0x8765" },
41: { 0x66328765, "subu r17,r18,#0x8765" },
42: { 0x6a328765, "divu r17,r18,#0x8765" },
43: { 0x6e328765, "mul r17,r18,#0x8765" },
44: { 0x72328765, "add r17,r18,#0x8765" },
45: { 0x76328765, "sub r17,r18,#0x8765" },
46: { 0x7a328765, "div r17,r18,#0x8765" },
47: { 0x7e328765, "cmp r17,r18,#0x8765" },
48:
49: { 0x82204260, "ldcr r17,sr2" },
50: { 0x82204fe0, "fldcr r17,fpcr" },
51: { 0x80118271, "stcr r17,sr2" },
52: { 0x80118ff1, "fstcr r17,fpcr" },
53: { 0x8232c272, "xcr r17,r18,sr2" },
54: { 0x8232cff2, "fxcr r17,r18,fpcr" },
55:
56: { 0x86320001, "fmul.sss r17,r18,r1" },
57: { 0x86202001, "flt.ss r17,r1" },
58: { 0x86322801, "fadd.sss r17,r18,r1" },
59: { 0x86323001, "fsub.sss r17,r18,r1" },
60: { 0x86323801, "fcmp.sss r17,r18,r1" },
61: { 0x86204801, "int.ss r17,r1" },
62: { 0x86205001, "nint.ss r17,r1" },
63: { 0x86205801, "trnc.ss r17,r1" },
64: { 0x86327001, "fdiv.sss r17,r18,r1" },
65: // fmul のサイズ
66: { 0x86320021, "fmul.dss r17,r18,r1" },
67: { 0x86320081, "fmul.ssd r17,r18,r1" },
68: { 0x863200a1, "fmul.dsd r17,r18,r1" },
69: { 0x86320201, "fmul.sds r17,r18,r1" },
70: { 0x86320221, "fmul.dds r17,r18,r1" },
71: { 0x86320281, "fmul.sdd r17,r18,r1" },
72: { 0x863202a1, "fmul.ddd r17,r18,r1" },
73:
74: { 0xc3ffffff, "br 0x000000fc" },
75: { 0xc7ffffff, "br.n 0x000000fc" },
76: { 0xcbffffff, "bsr 0x000000fc" },
77: { 0xcfffffff, "bsr.n 0x000000fc" },
78: { 0xd232ffff, "bb0 #17,r18,0x000000fc" },
79: { 0xd632ffff, "bb0.n #17,r18,0x000000fc" },
80: { 0xda32ffff, "bb1 #17,r18,0x000000fc" },
81: { 0xde32ffff, "bb1.n #17,r18,0x000000fc" },
82: { 0xe852ffff, "bcnd eq0,r18,0x000000fc" },
83: { 0xec52ffff, "bcnd.n eq0,r18,0x000000fc" },
84: // bcnd の M5
85: { 0xe9b2ffff, "bcnd ne0,r18,0x000000fc" },
86: { 0xe832ffff, "bcnd gt0,r18,0x000000fc" },
87: { 0xe992ffff, "bcnd lt0,r18,0x000000fc" },
88: { 0xe872ffff, "bcnd ge0,r18,0x000000fc" },
89: { 0xe9d2ffff, "bcnd le0,r18,0x000000fc" },
90:
91: { 0xf2328274, "clr r17,r18,19<20>" },
92: { 0xf2328a74, "set r17,r18,19<20>" },
93: { 0xf2329274, "ext r17,r18,19<20>" },
94: { 0xf2329a74, "extu r17,r18,19<20>" },
95: { 0xf232a274, "mak r17,r18,19<20>" },
96: { 0xf232a814, "rot r17,r18,<20>" },
97:
98: { 0xf232d101, "tb0 #17,r18,#0x101" },
99: { 0xf232d901, "tb1 #17,r18,#0x101" },
100: { 0xf052e901, "tcnd eq0,r18,#0x101" },
101:
102: { 0xf6320001, "xmem.bu r17,r18,r1" },
103: { 0xf6320401, "xmem r17,r18,r1" },
104: { 0xf6320801, "ld.hu r17,r18,r1" },
105: { 0xf6320c01, "ld.bu r17,r18,r1" },
106: { 0xf6321001, "ld.d r17,r18,r1" },
107: { 0xf6321401, "ld r17,r18,r1" },
108: { 0xf6321801, "ld.h r17,r18,r1" },
109: { 0xf6321c01, "ld.b r17,r18,r1" },
110: { 0xf6322001, "st.d r17,r18,r1" },
111: { 0xf6322401, "st r17,r18,r1" },
112: { 0xf6322801, "st.h r17,r18,r1" },
113: { 0xf6322c01, "st.b r17,r18,r1" },
114: // 全種について全引数パターンはつらいので ld だけで引数を変える
115: { 0xf6321000, "ld.d r17,r18,r0" },
116: { 0xf6321200, "ld.d r17,r18[r0]" },
117: { 0xf6201001, "ld.d r17,r0, r1" },
118: { 0xf6321001, "ld.d r17,r18,r1" },
119: { 0xf6201201, "ld.d r17,r0[r1]" },
120: { 0xf6321201, "ld.d r17,r18[r1]" },
121: // .usr も一部代表だけ
122: { 0xf6321101, "ld.d.usr r17,r18,r1" },
123: { 0xf6321401, "ld r17,r18,r1" },
124: { 0xf6321501, "ld.usr r17,r18,r1" },
125: // lda
126: { 0xf6323001, "lda.d r17,r18,r1" },
127: { 0xf6323401, "lda r17,r18,r1" },
128: { 0xf6323801, "lda.h r17,r18,r1" },
129: { 0xf6323c01, "lda.b r17,r18,r1" },
130:
131: { 0xf6324001, "and r17,r18,r1" },
132: { 0xf6324401, "and.c r17,r18,r1" },
133: { 0xf6325001, "xor r17,r18,r1" },
134: { 0xf6325401, "xor.c r17,r18,r1" },
135: { 0xf6325801, "or r17,r18,r1" },
136: { 0xf6325c01, "or.c r17,r18,r1" },
137: { 0xf6326001, "addu r17,r18,r1" },
138: { 0xf6326101, "addu.co r17,r18,r1" },
139: { 0xf6326201, "addu.ci r17,r18,r1" },
140: { 0xf6326301, "addu.cio r17,r18,r1" },
141: { 0xf6326401, "subu r17,r18,r1" },
142: { 0xf6326801, "divu r17,r18,r1" },
143: { 0xf6326401, "subu r17,r18,r1" },
144: { 0xf6326801, "divu r17,r18,r1" },
145: { 0xf6326c01, "mul r17,r18,r1" },
146: { 0xf6327001, "add r17,r18,r1" },
147: { 0xf6327401, "sub r17,r18,r1" },
148: { 0xf6327801, "div r17,r18,r1" },
149: { 0xf6327c01, "cmp r17,r18,r1" },
150:
151: { 0xf6328001, "clr r17,r18,r1" },
152: { 0xf6328801, "set r17,r18,r1" },
153: { 0xf6329001, "ext r17,r18,r1" },
154: { 0xf6329801, "extu r17,r18,r1" },
155: { 0xf632a001, "mak r17,r18,r1" },
156: { 0xf632a801, "rot r17,r18,r1" },
157:
158: { 0xf400c011, "jmp r17" },
159: { 0xf400c411, "jmp.n r17" },
160: { 0xf400c811, "jsr r17" },
161: { 0xf400cc11, "jsr.n r17" },
162:
163: { 0xf620e801, "ff1 r17,r1" },
164: { 0xf620ec01, "ff0 r17,r1" },
165:
166: { 0xf400fc00, "rte" },
167: { 0xf411f801, "tbnd r17,r1" },
168: { 0xf8118765, "tbnd r17,#0x8765" },
169: };
170:
171: static uint8 ram[1024];
172: static int failed;
173:
174: uint64
175: vm_phys_peek_8(uint32 addr)
176: {
177: assertmsg(addr < sizeof(ram), "addr=0x%x", addr);
178:
179: // XXX endian
180: return ram[addr ^ 1];
181: }
182:
183: // リンカを通すためのダミー
184: Disasm::~Disasm() { }
185: DebuggerMD::~DebuggerMD() { }
186:
187: int
188: main(int ac, char *av[])
189: {
190: saddr_t saddr;
191:
192: // DebuggerMD (の継承クラス)を用意するのは芋づる式に大変なので、
193: // 中でアクセスする変数だけ強引に用意する。
194: DebuggerMD *md = (DebuggerMD *)malloc(sizeof(DebuggerMD));
195: md->inst_bytes = 4;
196:
197: for (int i = 0; i < countof(table); i++) {
198: std::string expected = table[i].expected;
199: uint32 inst = table[i].inst;
200:
201: // エラー表示用
202: std::string inst_str = string_format("%08x", inst);
203:
204: // 全体を初期化
205: memset(ram, 0xdd, sizeof(ram));
206: // 100番地に命令列を書き込む
207: *(uint16 *)(ram + 0x100) = inst >> 16;
208: *(uint16 *)(ram + 0x102) = inst & 0xffff;
209: // 検査
210: saddr = 0x100;
211: DebuggerMemoryStream mem(md, saddr, MemoryMode::Physical);
212: m88100disasm dis(mem);
213: dis.Exec();
214: // 照合
215: if (dis.text != expected) {
216: printf(">%s expects \"%s\" but \"%s\"\n", inst_str.c_str(),
217: expected.c_str(), dis.text.c_str());
218: failed++;
219: continue;
220: }
221: uint32 expected_len = 4;
222: if (dis.bin.size() != expected_len) {
223: printf(">%s expects len=$%x but $%x\n", inst_str.c_str(),
224: expected_len, (uint)dis.bin.size());
225: failed++;
226: continue;
227: }
228: }
229:
230: int total = countof(table);
231: printf("%d tests, %d success", total, total - failed);
232: if (failed > 0) {
233: printf(", %d failed", failed);
234: }
235: printf("\n");
236: return 0;
237: }
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