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Annotation of nono/vm/bus.cpp, revision 1.1.1.1

1.1       root        1: //
                      2: // nono
                      3: // Copyright (C) 2017 [email protected]
                      4: //
                      5: 
                      6: #include "bus.h"
                      7: #include "ram.h"
                      8: 
                      9: IODevice *devtable[256];
                     10: 
                     11: //
                     12: // 物理バスアクセス?
                     13: // addr はそれぞれアラインされていること
                     14: //
                     15: 
                     16: uint64
                     17: m68030_phys_read_8(uint32 addr)
                     18: {
                     19:        uint64 data;
                     20: 
                     21:        if (addr < ram_size) {
                     22:                data = ram[HLB(addr)];
                     23:        } else {
                     24:                IODevice *dev = ::devtable[addr >> 24];
                     25:                data = dev->Read8(addr);
                     26:        }
                     27:        return data;
                     28: }
                     29: 
                     30: uint64
                     31: m68030_phys_read_16(uint32 addr)
                     32: {
                     33:        uint64 data;
                     34: 
                     35: if ((addr & 1))PANIC("unaligned access $%08x", addr);
                     36:        if (addr < ram_size) {
                     37:                data = *(uint16 *)&ram[HLW(addr)];
                     38:        } else {
                     39:                IODevice *dev = ::devtable[addr >> 24];
                     40:                data = dev->Read16(addr);
                     41:        }
                     42:        return data;
                     43: }
                     44: 
                     45: uint64
                     46: m68030_phys_read_32(uint32 addr)
                     47: {
                     48:        uint64 data;
                     49: 
                     50: if ((addr & 3))PANIC("unaligned access $%08x", addr);
                     51: 
                     52:        if (addr < ram_size) {
                     53:                data = *(uint32 *)&ram[addr];
                     54:        } else {
                     55:                IODevice *dev = ::devtable[addr >> 24];
                     56:                data = dev->Read32(addr);
                     57:        }
                     58:        return data;
                     59: }
                     60: 
                     61: uint64
                     62: m68030_phys_write_8(uint32 addr, uint32 data)
                     63: {
                     64:        if (addr < ram_size) {
                     65:                ram[HLB(addr)] = data;
                     66:                return 0;
                     67:        } else {
                     68:                IODevice *dev = ::devtable[addr >> 24];
                     69:                return dev->Write8(addr, data);
                     70:        }
                     71: }
                     72: 
                     73: uint64
                     74: m68030_phys_write_16(uint32 addr, uint32 data)
                     75: {
                     76: if ((addr & 1))PANIC("unaligned access $%08x", addr);
                     77:        if (addr < ram_size) {
                     78:                *(uint16 *)&ram[HLW(addr)] = data;
                     79:                return 0;
                     80:        } else {
                     81:                IODevice *dev = ::devtable[addr >> 24];
                     82:                return dev->Write16(addr, data);
                     83:        }
                     84: }
                     85: 
                     86: uint64
                     87: m68030_phys_write_32(uint32 addr, uint32 data)
                     88: {
                     89: if ((addr & 3))PANIC("unaligned access $%08x", addr);
                     90:        if (addr < ram_size) {
                     91:                *(uint32 *)&ram[addr] = data;
                     92:                return 0;
                     93:        } else {
                     94:                IODevice *dev = ::devtable[addr >> 24];
                     95:                return dev->Write32(addr, data);
                     96:        }
                     97: }
                     98: 
                     99: uint64
                    100: m68030_phys_peek_8(uint32 addr)
                    101: {
                    102:        uint64 data;
                    103: 
                    104:        if (addr < ram_size) {
                    105:                data = ram[HLB(addr)];
                    106:        } else {
                    107:                IODevice *dev = ::devtable[addr >> 24];
                    108:                data = dev->Peek8(addr);
                    109:        }
                    110:        return data;
                    111: }

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