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1.1 root 1: //
2: // nono
3: // Copyright (C) 2017 [email protected]
4: //
5:
6: #pragma once
7:
8: #include "device.h"
1.1.1.2 ! root 9: #include "scheduler.h"
1.1 root 10:
11: struct DMAC
12: {
1.1.1.2 ! root 13: static const uint32 CSR = 0x00; // .B
! 14: static const uint32 CER = 0x01; // .B
! 15: static const uint32 DCR = 0x04; // .B
! 16: static const uint32 OCR = 0x05; // .B
! 17: static const uint32 SCR = 0x06; // .B
! 18: static const uint32 CCR = 0x07; // .B
! 19: static const uint32 MTC = 0x0a; // .W
! 20: static const uint32 MAR = 0x0c; // .L
! 21: static const uint32 DAR = 0x14; // .L
! 22: static const uint32 BTC = 0x1a; // .W
! 23: static const uint32 BAR = 0x1c; // .L
! 24: static const uint32 NIV = 0x25; // .B
! 25: static const uint32 EIV = 0x27; // .B
! 26: static const uint32 MFC = 0x29; // .B
! 27: static const uint32 CPR = 0x2d; // .B
! 28: static const uint32 DFC = 0x31; // .B
! 29: static const uint32 BFC = 0x39; // .B
! 30: static const uint32 GCR = 0x3f; // .B (ch#3のみ)
! 31:
! 32: // | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
! 33: // CSR | COC | BTC | NDT | ERR | ACT | --- | PCT | PCS |
! 34: //
! 35: static const uint32 CSR_COC = 0x80; // Channel Operation Complete
! 36: static const uint32 CSR_BTC = 0x40; // Block Transfer Complete
! 37: static const uint32 CSR_NDT = 0x20; // Normal Device Termination
! 38: static const uint32 CSR_ERR = 0x10; // Error Bit
! 39: static const uint32 CSR_ACT = 0x08; // Channel Active
! 40: static const uint32 CSR_PCT = 0x02; // PCL Transition
! 41: static const uint32 CSR_PCS = 0x01; // PCL Input Line State
! 42:
! 43: // CER
! 44: static const uint32 CER_NO_ERROR = 0x00; // No Error
! 45: static const uint32 CER_CONFIG = 0x01; // Configuration Error
! 46: static const uint32 CER_OPER_TIMING = 0x02; // Operation Timing Error
! 47: static const uint32 CER_ADDR_MAR = 0x05; // Address error in MAR
! 48: static const uint32 CER_ADDR_DAR = 0x06; // Address error in DAR
! 49: static const uint32 CER_ADDR_BAR = 0x07; // Address error in BAR
! 50: static const uint32 CER_BUS_MAR = 0x09; // Bus error in MAR
! 51: static const uint32 CER_BUS_DAR = 0x0a; // Bus error in DAR
! 52: static const uint32 CER_BUS_BAR = 0x0b; // Bus error in BAR
! 53: static const uint32 CER_COUNT_MTC = 0x0d; // Count error in MTC
! 54: static const uint32 CER_COUNT_BTC = 0x0f; // Count error in BTC
! 55: static const uint32 CER_EXT_ABORT = 0x10; // External Abort
! 56: static const uint32 CER_SOFT_ABORT = 0x11; // Software Abort
! 57:
! 58: // | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
! 59: // DCR | XRM | DTYP | DPS | --- | PCL |
! 60: static const uint32 DCR_XRM_BURST = 0; // Burst Transfer
! 61: static const uint32 DCR_XRM_CYCLE_WO_HOLD = 2; // Cycle Steal without Hold
! 62: static const uint32 DCR_XRM_CYCLE_WITH_HOLD = 3;// Cycle Steal with Hold
! 63: static const uint32 DCR_DTYP_68000 = 0; // 68000 devices
! 64: static const uint32 DCR_DTYP_6800 = 1; // 6800 devices
! 65: static const uint32 DCR_DTYP_ACK = 2; // Devices with ACK
! 66: static const uint32 DCR_DTYP_ACK_REDY = 3; // Devices with ACK+READY
! 67: static const uint32 DCR_DPS_8BIT = 0; // 8bit port
! 68: static const uint32 DCR_DPS_16BIT = 1; // 16bit port
! 69: static const uint32 DCR_PCL_STATUS = 0; // Status Input
! 70: static const uint32 DCR_PCL_STATUS_INTR = 1; // Status Input with Interrupt
! 71: static const uint32 DCR_PCL_PULSE = 2; // Start Pulse
! 72: static const uint32 DCR_PCL_ABORT = 3; // Abort Input
! 73:
! 74: // | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
! 75: // OCR | DIR | --- | SIZE | CHAIN | REQG |
! 76: //
! 77: static const uint32 OCR_DIR_MtoD = 0; // Memory to Device
! 78: static const uint32 OCR_DIR_DtoM = 1; // Device to Memory
! 79: static const uint32 OCR_SIZE_8BIT = 0; // 8bit
! 80: static const uint32 OCR_SIZE_16BIT = 1; // 16bit
! 81: static const uint32 OCR_SIZE_32BIT = 2; // 32bit
! 82: static const uint32 OCR_SIZE_8BIT_UP = 3; // 8bit (Non-Pack Operation)
! 83: static const uint32 OCR_CHAIN_NOCHAIN = 0; // Chain operation is disabled
! 84: static const uint32 OCR_CHAIN_ARRAY = 2; // Array Chaining
! 85: static const uint32 OCR_CHAIN_LINK = 3; // Linked Array Chaining
! 86: static const uint32 OCR_REQG_AUTO_LIM = 0; // Auto Request (Limited)
! 87: static const uint32 OCR_REQG_AUTO_MAX = 1; // AUto Request (Max)
! 88: static const uint32 OCR_REQG_EXTERNAL = 2; // External Request
! 89: static const uint32 OCR_REQG_AUTOFIRST = 3; // Auto first then ext.
! 90:
! 91: // | b7 | b6 | b5 | b4 | b3 | b2 | b1 | b0 |
! 92: // SCR | --- --- --- --- | MAC | DAC |
! 93: static const uint32 SCR_NO_COUNT = 0; // Does not count
! 94: static const uint32 SCR_COUNT_UP = 1; // Count up
! 95: static const uint32 SCR_COUNT_DOWN = 2; // Count down
! 96:
! 97: // CCR
! 98: static const uint32 CCR_STR = 0x80; // Start Operation
! 99: static const uint32 CCR_CNT = 0x40; // Continue Operation
! 100: static const uint32 CCR_HLT = 0x20; // Halt Operation
! 101: static const uint32 CCR_SAB = 0x10; // Software Abort
! 102: static const uint32 CCR_INT = 0x08; // Interrupt Enable
1.1 root 103:
104: // 各チャンネル
1.1.1.2 ! root 105: struct Channel {
! 106: // 二次変数など
! 107: int ch; // チャンネル番号
! 108: const char *desc; // チャンネルの用途(モニタ表示用)
! 109: DMACDevice *parent;
! 110:
! 111: // レジスタ
! 112:
! 113: // CSR
! 114: uint8 csr; // COC,BTC,NDT,ERR を保持
! 115: bool active; // ACT
! 116: bool pcl; // PCL の状態 (High が true)
! 117: bool prev_pcl; // 前回の PCL の状態 (High が true)
! 118:
1.1 root 119: uint8 cer;
120: uint8 dcr;
1.1.1.2 ! root 121: uint32 GetXRM() const { return (dcr >> 6); }
! 122: uint32 GetDTYP() const { return (dcr >> 4) & 3; }
! 123: uint32 GetDPS() const { return (dcr >> 3) & 1; }
! 124: uint32 GetPCL() const { return (dcr & 3); }
! 125:
1.1 root 126: uint8 ocr;
1.1.1.2 ! root 127: uint32 GetDIR() const { return (ocr >> 7); }
! 128: uint32 GetSIZE() const { return (ocr >> 4) & 3; }
! 129: uint32 GetCHAIN() const { return (ocr >> 2) & 3; }
! 130: uint32 GetREQG() const { return (ocr & 3); }
! 131:
! 132: // 転送種別 (DPS と SIZE から決まる)
! 133: uint32 xfertype;
! 134:
1.1 root 135: uint8 scr;
1.1.1.2 ! root 136: uint32 GetMAC() const { return (scr >> 2) & 3; }
! 137: uint32 GetDAC() const { return (scr & 3); }
! 138:
1.1 root 139: uint8 ccr;
1.1.1.2 ! root 140: bool int_enable; // INT: 割り込み許可なら true
! 141:
1.1 root 142: uint16 mtc;
143: uint32 mar;
144: uint32 dar;
145: uint16 btc;
146: uint32 bar;
147: uint8 niv;
148: uint8 eiv;
149: uint8 mfc;
150: uint8 cpr;
151: uint8 dfc;
152: uint8 bfc;
1.1.1.2 ! root 153:
! 154: uint8 PeekCSR() const;
! 155: void WriteCSR(uint32 data);
! 156: uint8 PeekCCR() const;
! 157: void WriteCCR(uint32 data);
! 158:
! 159: // 転送開始
! 160: void StartTransfer();
! 161: // 割り込み
! 162: void SetINT(uint32 val);
1.1 root 163: } chan[4];
164:
165: // 全体
166: uint8 gcr;
167: };
168:
169: class DMACDevice
170: : public IODevice
171: {
172: typedef IODevice inherited;
173:
174: static const int baseaddr = 0xe84000;
175:
176: public:
177: DMACDevice();
178: virtual ~DMACDevice();
179:
180: virtual uint64 Read8(uint32 addr);
181: virtual uint64 Write8(uint32 addr, uint32 data);
182: virtual uint64 Peek8(uint32 addr);
183:
1.1.1.2 ! root 184: virtual bool MonitorUpdate();
! 185:
! 186: // 転送
! 187: void AbortTransfer(DMAC::Channel *chan);
! 188: void Transfer(int arg);
! 189: int64 TransferM8toD8(DMAC::Channel *chan);
! 190: int64 TransferD8toM8(DMAC::Channel *chan);
! 191:
1.1 root 192: private:
1.1.1.2 ! root 193: void MonitorReg4(int x, int y, uint32 reg, const char * const *names);
1.1 root 194:
195: struct DMAC dmac {};
1.1.1.2 ! root 196: Event event[4] {};
! 197:
! 198: static const char * const errnames[];
1.1 root 199: };
1.1.1.2 ! root 200:
! 201: extern std::unique_ptr<DMACDevice> gDMAC;
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