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1.1 root 1: //
2: // nono
3: // Copyright (C) 2023 nono project
4: // Licensed under nono-license.txt
5: //
6:
7: //
8: // X68030 勝手に拡張メモリ
9: //
10: // 拡張メモリは TS-6BE16 互換か 060turbo 互換のいずれか。
11: // TS-6BE16 互換だと $0100'0000 〜 $01ff'ffff の 16MB。
12: // 060turbo 互換だと $1000'0000 〜 $17ff'ffff の 128MB、
13: // $1000'0000 〜 $1fff'ffff の 256MB。
1.1.1.3 root 14: // $1000'0000 〜 $2fff'ffff の 512MB。(独自拡張)
1.1 root 15: //
16:
17: // 拡張 RAM はロングワード単位でホストバイトオーダ配置なので、
18: // バイトアクセス、ワードアクセス時は HLB(), HLW() マクロを使用のこと。
19:
20: #include "extram.h"
21: #include "config.h"
22:
23: // コンストラクタ
24: ExtRAMDevice::ExtRAMDevice()
25: : inherited(OBJ_EXTRAM)
26: {
27: }
28:
29: // デストラクタ
30: ExtRAMDevice::~ExtRAMDevice()
31: {
32: }
33:
34: // 初期化
35: bool
36: ExtRAMDevice::Init()
37: {
38: const ConfigItem& item = gConfig->Find("extram-size");
39: uint32 extram_size_MB = item.AsInt();
1.1.1.4 root 40: if (extram_size_MB == 0) {
1.1 root 41: return true;
42: }
43: switch (extram_size_MB) {
44: case 16:
45: ram_addr = 0x01'000000;
46: break;
47: case 128:
48: case 256:
1.1.1.3 root 49: case 384:
50: case 512:
1.1 root 51: ram_addr = 0x10'000000;
52: break;
53: default:
1.1.1.3 root 54: item.Err("Valid size are 16, 128, 256, 384 or 512 for now");
1.1 root 55: return false;
56: }
57:
58: ram_size = extram_size_MB * 1024 * 1024;
1.1.1.3 root 59: ram.reset(new(std::nothrow) uint8[ram_size]);
60: if ((bool)ram == false) {
61: errno = ENOMEM;
62: warn("ExtRAM(%u bytes)", ram_size);
63: return false;
64: }
1.1 root 65:
66: return true;
67: }
68:
69: // 電源オン/リセット
70: void
71: ExtRAMDevice::ResetHard(bool poweron)
72: {
73: if (poweron) {
74: // ノイズで埋めたいがとりあえず。
75: memset(&ram[0], 0, ram_size);
76: }
77: }
78:
79: inline uint32
80: ExtRAMDevice::Decoder(uint32 addr) const
81: {
82: return (addr - ram_addr);
83: }
84:
1.1.1.3 root 85: busdata
1.1.1.4 root 86: ExtRAMDevice::Read(busaddr addr)
1.1 root 87: {
1.1.1.4 root 88: uint32 offset = Decoder(addr.Addr());
89: busdata data;
1.1 root 90:
1.1.1.4 root 91: data = *(uint32 *)&ram[offset & ~3U];
92: putlog(4, "$%08x -> $%08x", addr.Addr(), data.Data());
93: data |= BusData::Size4;
1.1 root 94: return data;
95: }
96:
1.1.1.3 root 97: busdata
1.1.1.4 root 98: ExtRAMDevice::Write(busaddr addr, uint32 data)
1.1 root 99: {
1.1.1.4 root 100: uint32 paddr = Decoder(addr.Addr());
101: uint32 reqsize = addr.GetSize();
102: uint32 datasize = std::min(4 - (paddr & 3U), reqsize);
103:
104: if (datasize == 4) {
105: *(uint32 *)&ram[paddr] = data;
106: putlog(3, "$%08x <- $%08x", addr.Addr(), data);
107: } else {
108: data >>= (reqsize - datasize) * 8;
109: putlog(3, "$%08x <- $%0*x", addr.Addr(), datasize * 2, data);
110: for (int i = datasize - 1; i >= 0; i--) {
111: ram[HLB(paddr + i)] = data;
112: data >>= 8;
113: }
114: }
1.1 root 115:
1.1.1.4 root 116: busdata r = BusData::Size4;
117: return r;
1.1 root 118: }
119:
1.1.1.3 root 120: busdata
1.1.1.4 root 121: ExtRAMDevice::Peek1(uint32 addr)
1.1 root 122: {
123: uint32 offset = Decoder(addr);
124: return ram[HLB(offset)];
125: }
126:
1.1.1.3 root 127: bool
1.1.1.4 root 128: ExtRAMDevice::Poke1(uint32 addr, uint32 data)
1.1 root 129: {
130: if ((int32)data >= 0) {
131: uint32 offset = Decoder(addr);
132: ram[HLB(offset)] = data;
133: }
1.1.1.3 root 134: return true;
1.1 root 135: }
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