--- nono/vm/lance.cpp	2026/04/29 17:05:24	1.1.1.15
+++ nono/vm/lance.cpp	2026/04/29 17:05:28	1.1.1.16
@@ -24,10 +24,6 @@ LanceDevice::LanceDevice()
 	AddAlias("Lance");
 	AddAlias("Ethernet");
 
-	// func, time は都度設定する
-	rx_event.Regist("Lance RX");
-	tx_event.Regist("Lance TX");
-
 	monitor.func = ToMonitorCallback(&LanceDevice::MonitorUpdate);
 	monitor.SetSize(80, 34);
 	monitor.Regist(ID_MONITOR_LANCE);
@@ -53,6 +49,12 @@ LanceDevice::Init()
 	scheduler->ConnectMessage(MessageID::HOSTNET_RX(0), this,
 		ToMessageCallback(&LanceDevice::RxMessage));
 
+	// func, time は都度設定する
+	rx_event.SetName("Lance RX");
+	tx_event.SetName("Lance TX");
+	scheduler->RegistEvent(rx_event);
+	scheduler->RegistEvent(tx_event);
+
 	return true;
 }
 
@@ -65,7 +67,7 @@ LanceDevice::ResetHard(bool poweron)
 }
 
 busdata
-LanceDevice::Read(uint32 offset)
+LanceDevice::ReadPort(uint32 offset)
 {
 	busdata data;
 
@@ -75,20 +77,21 @@ LanceDevice::Read(uint32 offset)
 		break;
 	 case 1:	// RAP
 		data = reg.rap;
-		putlog(2, "RAP -> %d", reg.rap);
+		putlog(2, "RAP -> %u", reg.rap);
 		break;
 	 default:
-		VMPANIC("corrupted offset=%d", offset);
+		VMPANIC("corrupted offset=%u", offset);
 		data = 0xffff;
 		break;
 	}
 
 	// XXX wait?
+	data |= BusData::Size2;
 	return data;
 }
 
 busdata
-LanceDevice::Write(uint32 offset, uint32 data)
+LanceDevice::WritePort(uint32 offset, uint32 data)
 {
 	switch (offset) {
 	 case 0:	// RDP
@@ -98,16 +101,17 @@ LanceDevice::Write(uint32 offset, uint32
 		reg.rap = data & 3;
 		break;
 	 default:
-		VMPANIC("corrupted offset=%d", offset);
+		VMPANIC("corrupted offset=%u", offset);
 		break;
 	}
 
+	busdata r = BusData::Size2;
 	// XXX wait?
-	return 0;
+	return r;
 }
 
 busdata
-LanceDevice::Peek(uint32 offset)
+LanceDevice::PeekPort(uint32 offset)
 {
 	switch (offset) {
 	 case 0:	// RDP
@@ -209,13 +213,13 @@ LADRF:$fedcba98'76543210  TDRP:
 
 	// RDRP
 	uint32 rdrp = initblock[8] | (initblock[9] << 16);
-	screen.Print(31, y, "RDRP:$%08x (RDRA=$%06x entries=%d)",
+	screen.Print(31, y, "RDRP:$%08x (RDRA=$%06x entries=%u)",
 		rdrp, rmd_base, rmd_num);
 	y++;
 
 	// TDRP
 	uint32 tdrp = initblock[10] | (initblock[11] << 16);
-	screen.Print(31, y, "TDRP:$%08x (TDRA=$%06x entries=%d)",
+	screen.Print(31, y, "TDRP:$%08x (TDRA=$%06x entries=%u)",
 		tdrp, tmd_base, tmd_num);
 	y++;
 	y++;
@@ -232,7 +236,8 @@ LADRF:$fedcba98'76543210  TDRP:
 			rmd[j] = PeekMem(rmd_addr + j * 2);
 		}
 		x = 6;
-		screen.Print(x, y, "Current %02x", rmd_cur); x += 11;
+		screen.Print(x, y, "Current %02x", rmd_cur);
+		x += 11;
 		MonitorBit(rmd[1], AM7990::RMD1_OWN,  rmd1_names[0]);
 		MonitorBit(rmd[1], AM7990::RMD1_ERR,  rmd1_names[1]);
 		// 発生し得ないので省略    RMD1_FRAM  rmd1_names[2]
@@ -303,7 +308,8 @@ LADRF:$fedcba98'76543210  TDRP:
 		}
 		// MORE, ONE, DEF と LCOL, LCAR, RTRY, TDR は発生し得ないので省略
 		x = 6;
-		screen.Print(x, y, "Current %02x ", tmd_cur); x += 11;
+		screen.Print(x, y, "Current %02x ", tmd_cur);
+		x += 11;
 		MonitorBit(tmd[1], AM7990::TMD1_OWN,  tmd1_names[0]);
 		MonitorBit(tmd[1], AM7990::TMD1_ERR,  tmd1_names[1]);
 		MonitorBit(tmd[1], AM7990::TMD1_STP,  tmd1_names[6]);
@@ -347,7 +353,7 @@ LADRF:$fedcba98'76543210  TDRP:
 				(-(int16)tmd[2]) & 0xfff);
 
 			// 画面内に収まらない場合は折り返し。
-			// 収まる場合はこのまま rmd_num を超えればループを抜ける。
+			// 収まる場合はこのまま tmd_num を超えればループを抜ける。
 			ts++;
 			if (tmd_num > 24 && ts >= tmd_num) {
 				ts = 0;
@@ -387,33 +393,33 @@ LanceDevice::ReadData()
 	 case 1:
 		if (reg.IsSTOP()) {
 			data = reg.iadr & 0xffff;
-			putlog(2, "CSR%d -> $%04x", reg.rap, data);
+			putlog(2, "CSR%u -> $%04x", reg.rap, data);
 		} else {
 			data = 0xcccc & AM7990::CSR1_MASK;
-			putlog(2, "CSR%d -> $%04x (indefinate read)", reg.rap, data);
+			putlog(2, "CSR%u -> $%04x (indefinate read)", reg.rap, data);
 		}
 		break;
 	 case 2:
 		if (reg.IsSTOP()) {
 			data = reg.iadr >> 16;
-			putlog(2, "CSR%d -> $%04x", reg.rap, data);
+			putlog(2, "CSR%u -> $%04x", reg.rap, data);
 		} else {
 			data = 0xcccc & AM7990::CSR2_MASK;
-			putlog(2, "CSR%d -> $%04x (indefinate read)", reg.rap, data);
+			putlog(2, "CSR%u -> $%04x (indefinate read)", reg.rap, data);
 		}
 		break;
 	 case 3:
 		if (reg.IsSTOP()) {
 			data = reg.csr3;
 			const std::string name = CSR3ToString(data);
-			putlog(2, "CSR%d -> $%04x<%s>", reg.rap, data, name.c_str());
+			putlog(2, "CSR%u -> $%04x<%s>", reg.rap, data, name.c_str());
 		} else {
 			data = 0xcccc & AM7990::CSR3_MASK;
-			putlog(2, "CSR%d -> $%04x (indefinate read)", reg.rap, data);
+			putlog(2, "CSR%u -> $%04x (indefinate read)", reg.rap, data);
 		}
 		break;
 	 default:
-		VMPANIC("corrupted reg.rap=%d", reg.rap);
+		VMPANIC("corrupted reg.rap=%u", reg.rap);
 		data = 0xffff;
 		break;
 	}
@@ -526,7 +532,7 @@ LanceDevice::WriteData(uint32 data)
 		break;
 
 	 default:
-		VMPANIC("corrupted reg.rap=%d", reg.rap);
+		VMPANIC("corrupted reg.rap=%u", reg.rap);
 	}
 }
 
@@ -544,40 +550,33 @@ LanceDevice::WriteData(uint32 data)
 // メモリアクセスは常にこの構成で、CSR3.BSWP はこの1ワードを SILO(FIFO) に
 // 書き込む/から読み出す順序を入れ替えるもの。
 
-// メモリから1ワード読み込む。paddr はワードアラインしていること。
-uint64
-LanceDevice::ReadMem(uint32 paddr)
+// メモリから1ワード読み込む。addr はワードアラインしていること。
+uint32
+LanceDevice::ReadMem(uint32 addr)
 {
-	uint64 data;
-
-	assertmsg((paddr & 1) == 0, "paddr=$%x", paddr);
+	assertmsg((addr & 1) == 0, "addr=$%x", addr);
 
 	// XXX 所要クロックを考察すること
-	data = subram->Read16(paddr);
-	return data;
+	busdata data = subram->Read2(addr);
+	return data.Data();
 }
 
-// メモリに1ワード書き込む。paddr はワードアラインしていること。
-uint64
-LanceDevice::WriteMem(uint32 paddr, uint32 data)
+// メモリに1ワード書き込む。addr はワードアラインしていること。
+void
+LanceDevice::WriteMem(uint32 addr, uint32 data)
 {
-	assertmsg((paddr & 1) == 0, "paddr=$%x", paddr);
+	assertmsg((addr & 1) == 0, "addr=$%x", addr);
 
 	// XXX 所要クロックを考察すること
-	subram->Write16(paddr, data);
-	return 0;
+	subram->Write2(addr, data);
 }
 
 // メモリ (3ポートSRAM) から1ワードピークする。バスエラーは起きない。
-uint64
-LanceDevice::PeekMem(uint32 paddr)
+uint32
+LanceDevice::PeekMem(uint32 addr) const
 {
-	uint64 data;
-
-	data  = subram->Peek8(paddr) << 8;
-	data |= subram->Peek8(paddr + 1);
-
-	return data;
+	busdata data = subram->Peek2(addr);
+	return data.Data();
 }
 
 // INIT ビットによるチップ初期化。
@@ -596,7 +595,7 @@ LanceDevice::ChipInit()
 	}
 	if (0) {
 		for (int i = 0; i < countof(initblock); i++) {
-			putlog(2, "initblock[%d] = $%04x", i, initblock[i]);
+			putlog(2, "initblock[%u] = $%04x", i, initblock[i]);
 		}
 	}
 
@@ -950,7 +949,7 @@ LanceDevice::ChangePhase(TXPhase new_pha
 		tx_event.func = ToEventCallback(&LanceDevice::TXNext);
 		break;
 	 default:
-		assertmsg(false, "phase %d", (int)new_phase);
+		assertmsg(false, "phase %u", (uint)new_phase);
 	}
 	scheduler->RestartEvent(tx_event);
 }
@@ -997,7 +996,7 @@ LanceDevice::RXIdle(Event& ev)
 {
 	rx_phase = RXPhase::IDLE;
 
-	putlog(3, "%s[%d]", __func__, rmd_cur);
+	putlog(3, "%s[%u]", __func__, rmd_cur);
 
 	// RMD1 を読み込む
 	if ((int32)rmd1_ahead >= 0) {
@@ -1042,7 +1041,7 @@ LanceDevice::RXCopy()
 {
 	rx_phase = RXPhase::COPY;
 
-	putlog(1, "%s[%d]", __func__, rmd_cur);
+	putlog(1, "%s[%u]", __func__, rmd_cur);
 
 	// RMD0, RMD2 は受信することが確定してから読み出す
 	uint32 rmd_addr = rmd_base + rmd_cur * 8;
@@ -1056,11 +1055,11 @@ LanceDevice::RXCopy()
 	int32 bcnt = -(int32)(int16)rmd2;
 
 	if (bcnt < rx_packet.length) {
-		putlog(1, "will be remain: %d < %d", bcnt, rx_packet.length);
+		putlog(1, "will be remain: %d < %u", bcnt, rx_packet.length);
 	}
 
 	uint8 *src = &rx_packet[0];
-	int remsize = rx_packet.length;
+	uint remsize = rx_packet.length;
 
 	if (bcnt > remsize) {
 		bcnt = remsize;
@@ -1118,7 +1117,7 @@ LanceDevice::RXCopy()
 		WriteMem(rmd_addr + 6, (dst - bufdst) & 0xfff);
 	} else {
 		rmd1 &= ~AM7990::RMD1_ENP;
-		putlog(1, "copy remain %d", remsize);
+		putlog(1, "copy remain %u", remsize);
 
 		// 前詰めにコピーする
 		memmove(&rx_packet[0], src, remsize);
@@ -1141,7 +1140,7 @@ LanceDevice::RXNext(Event& ev)
 {
 	rx_phase = RXPhase::NEXT;
 
-	putlog(1, "%s[%d]", __func__, rmd_cur);
+	putlog(1, "%s[%u]", __func__, rmd_cur);
 
 	bool is_chained = false;
 
@@ -1226,7 +1225,7 @@ LanceDevice::ChangePhase(RXPhase new_pha
 		rx_event.func = ToEventCallback(&LanceDevice::RXNext);
 		break;
 	 default:
-		assertmsg(false, "phase %d", (int)new_phase);
+		assertmsg(false, "phase %u", (uint)new_phase);
 	}
 	scheduler->RestartEvent(rx_event);
 }