Annotation of ntddk/inc/alpharef.h, revision 1.1.1.1

1.1       root        1: /*++
                      2: 
                      3: Copyright (c) 1993  Digital Equipment Corporation
                      4: 
                      5: Module Name:
                      6: 
                      7:     alpharef.h
                      8: 
                      9: Abstract:
                     10: 
                     11:     This module defines the reference hardware definitions for Alpha AXP 
                     12:     platforms.  Any platform that adheres to these interfaces will be 
                     13:     capable of running all of the common drivers.
                     14: 
                     15: Author:
                     16: 
                     17:     Joe Notarangelo 15-Feb-1993
                     18: 
                     19: Revision History:
                     20: 
                     21:     John DeRosa [DEC]  2-July-1993
                     22: 
                     23:     Added firmware vendor call definitions that are generic to all Alpha
                     24:     platforms.
                     25: 
                     26: --*/
                     27: 
                     28: #ifndef _ALPHAREF_
                     29: #define _ALPHAREF_
                     30: 
                     31: 
                     32: //
                     33: // Define interesting device addresses.
                     34: //
                     35: 
                     36: #define KEYBOARD_PHYSICAL_BASE 0x60
                     37: 
                     38: //
                     39: // Define DMA device channels.
                     40: //
                     41: 
                     42: #define SCSI_CHANNEL 0x0                // SCSI DMA channel number
                     43: #define FLOPPY_CHANNEL 0x2              // Floppy DMA channel
                     44: #define SOUND_CHANNEL_A 0x2             // Sound DMA channel A
                     45: #define SOUND_CHANNEL_B 0x3             // Sound DMA channel B
                     46: 
                     47: 
                     48: //
                     49: // Define default thread and process quantum values.
                     50: //
                     51: 
                     52: 
                     53: #define PROCESS_QUANTUM 2           // Process quantum in thread quantums
                     54: #define THREAD_QUANTUM 2            // Thread quantum in ticks
                     55: 
                     56: //
                     57: // Define the default quantum decrement values.
                     58: //
                     59: 
                     60: #define CLOCK_QUANTUM_DECREMENT 1   // Decrement value at clock interrupt
                     61: #define MUTEX_QUANTUM_DECREMENT 1   // Decrement value at mutex release
                     62: #define WAIT_QUANTUM_DECREMENT 1    // Decrement value at wait operation
                     63: 
                     64: //
                     65: // Define the interrupt request levels.
                     66: //
                     67: 
                     68: #define FLOPPY_LEVEL     6             // The floppy 
                     69: #define CLOCK_LEVEL       5             // Interval clock level
                     70: #define PROFILE_LEVEL     3             // Profiling level
                     71: #define EISA_DEVICE_LEVEL 3             // EISA bus interrupt level
                     72: #define ISA_DEVICE_LEVEL  3             // ISA bus interrupt level
                     73: #define DEVICE_LEVEL      3             // Generic device interrupt level
                     74: #define DEVICE_LOW_LEVEL  3             // I/O device interrupt level low
                     75: #define DEVICE_HIGH_LEVEL 4             // I/O device interrupt level high
                     76: #define IPI_LEVEL         6             // Inter-processor interrupt level
                     77: #define POWER_LEVEL       7             // Powerfail level
                     78: #define EISA_NMI_LEVEL    POWER_LEVEL   // Eisa NMI failures
                     79: #define CLOCK2_LEVEL CLOCK_LEVEL        //
                     80: 
                     81: //
                     82: // Define EISA device interrupt vectors.
                     83: //
                     84: 
                     85: #define EISA_VECTORS 48
                     86: 
                     87: //
                     88: // Define the EISA interrupt request levels.  Levels 1,8 and 13 are not
                     89: // defined.  Level 0 is also the timer.  Level 2 is not assignable because
                     90: // it receives the vector from the second PIC bank.
                     91: //
                     92: 
                     93: #define EISA_IRQL0_VECTOR (0 + EISA_VECTORS) // Eisa interrupt request level 0
                     94: 
                     95: #define EISA_IRQL3_VECTOR (3 + EISA_VECTORS)
                     96: #define EISA_IRQL4_VECTOR (4 + EISA_VECTORS)
                     97: #define EISA_IRQL5_VECTOR (5 + EISA_VECTORS)
                     98: #define EISA_IRQL6_VECTOR (6 + EISA_VECTORS)
                     99: #define EISA_IRQL7_VECTOR (7 + EISA_VECTORS)
                    100: #define EISA_IRQL9_VECTOR (9 + EISA_VECTORS)
                    101: #define EISA_IRQL10_VECTOR (10 + EISA_VECTOR)
                    102: #define EISA_IRQL11_VECTOR (11 + EISA_VECTORS)
                    103: #define EISA_IRQL12_VECTOR (12 + EISA_VECTORS)
                    104: #define EISA_IRQL14_VECTOR (14 + EISA_VECTORS)
                    105: #define EISA_IRQL15_VECTOR (15 + EISA_VECTORS)
                    106: 
                    107: #define MAXIMUM_EISA_VECTOR (16 + EISA_VECTORS) // maximum EISA vector
                    108: 
                    109: //
                    110: // The parallel port is at IRQL1 by default.
                    111: //
                    112: 
                    113: #define PARALLEL_VECTOR (1 + EISA_VECTORS) // Parallel device interrupt vector
                    114: 
                    115: //
                    116: // Define ISA device interrupt vectors.
                    117: //
                    118: 
                    119: #define ISA_VECTORS 48
                    120: 
                    121: #define KEYBOARD_VECTOR 1
                    122: #define MOUSE_VECTOR 12
                    123: 
                    124: //
                    125: // Define the EISA interrupt request levels.  Levels 1,8 and 13 are not
                    126: // defined.  Level 0 is also the timer.  Level 2 is not assignable because
                    127: // it receives the vector from the second PIC bank.
                    128: //
                    129: 
                    130: #define ISA_IRQL0_VECTOR (0 + ISA_VECTORS)
                    131: 
                    132: #define ISA_IRQL3_VECTOR (3 + ISA_VECTORS)
                    133: #define ISA_IRQL4_VECTOR (4 + ISA_VECTORS)
                    134: #define ISA_IRQL5_VECTOR (5 + ISA_VECTORS)
                    135: #define ISA_IRQL6_VECTOR (6 + ISA_VECTORS)
                    136: #define ISA_IRQL7_VECTOR (7 + ISA_VECTORS)
                    137: #define ISA_IRQL9_VECTOR (9 + ISA_VECTORS)
                    138: #define ISA_IRQL10_VECTOR (10 + ISA_VECTORS)
                    139: #define ISA_IRQL11_VECTOR (11 + ISA_VECTORS)
                    140: #define ISA_IRQL12_VECTOR (12 + ISA_VECTORS)
                    141: #define ISA_IRQL14_VECTOR (14 + ISA_VECTORS)
                    142: #define ISA_IRQL15_VECTOR (15 + ISA_VECTORS)
                    143: 
                    144: #define MAXIMUM_ISA_VECTOR (16 + ISA_VECTORS) // maximum ISA vector
                    145: 
                    146: //
                    147: // Define I/O device interrupt level.
                    148: //
                    149: 
                    150: 
                    151: //
                    152: // Define device interrupt vectors.
                    153: //
                    154: 
                    155: #define DEVICE_VECTORS 0               // starting builtin device vector
                    156: 
                    157: #define SERIAL_VECTOR (4 + DEVICE_VECTORS)    // Serial device 1 interrupt vector
                    158: #define CLOCK_VECTOR (5 + DEVICE_VECTORS)     // Clock interrupt vector
                    159: #define PC0_VECTOR   (6 + DEVICE_VECTORS)     // Performance counter 0
                    160: #define EISA_NMI_VECTOR (7 + DEVICE_VECTORS)  // NMI vector
                    161: #define PC1_VECTOR   (8 + DEVICE_VECTORS)     // Performance counter 1
                    162: #define PIC_VECTOR   (10 + DEVICE_VECTORS)    // Programmable Interrupt Ctrler
                    163: #define ERROR_VECTOR (12 + DEVICE_VECTORS)    // Error interrupt vector
                    164: #define HALT_VECTOR  (14 + DEVICE_VECTORS)    // Halt Button interrupt vector
                    165: #define UNUSED_VECTOR (16 + DEVICE_VECTORS)   // Highest possible builtin vector
                    166: 
                    167: #define MAXIMUM_BUILTIN_VECTOR UNUSED_VECTOR // maximum builtin vector
                    168: 
                    169: //
                    170: // Define profile intervals.
                    171: //
                    172: 
                    173: #define DEFAULT_PROFILE_COUNT 0x40000000 // ~= 20 seconds @50mhz
                    174: #define DEFAULT_PROFILE_INTERVAL (10 * 500) // 500 microseconds
                    175: #define MAXIMUM_PROFILE_INTERVAL (10 * 1000 * 1000) // 1 second
                    176: #define MINIMUM_PROFILE_INTERVAL (10 * 40) // 40 microseconds
                    177: 
                    178: //
                    179: // Define the QVA selector bits which indicate an address is a 
                    180: // "QVA" - quasi-virtual address.
                    181: //
                    182: 
                    183: #define QVA_ENABLE 0xA0000000     
                    184: 
                    185: 
                    186: //
                    187: // Alpha-generic firmware vendor calls.
                    188: //
                    189: 
                    190: #ifndef _LANGUAGE_ASSEMBLY
                    191: //
                    192: // Structure used to return system and processor information.
                    193: //
                    194: 
                    195: typedef struct _EXTENDED_SYSTEM_INFORMATION {
                    196:     ULONG   ProcessorId;
                    197:     ULONG   ProcessorRevision;
                    198:     ULONG   ProcessorPageSize;
                    199:     ULONG   NumberOfPhysicalAddressBits;
                    200:     ULONG   MaximumAddressSpaceNumber;
                    201:     ULONG   ProcessorCycleCounterPeriod;
                    202:     ULONG   SystemRevision;
                    203:     UCHAR   SystemSerialNumber[16];
                    204:     UCHAR   FirmwareVersion[16];
                    205: } EXTENDED_SYSTEM_INFORMATION, *PEXTENDED_SYSTEM_INFORMATION;
                    206: 
                    207: //
                    208: // Define the firmware vendor specific entry point numbers that are
                    209: // common to all Alpha AXP platforms.  fw\alpha\fwp.h has private
                    210: // definitions that are machine-specific.
                    211: //
                    212: 
                    213: typedef enum _VENDOR_GENERIC_ENTRY {
                    214:     AllocatePoolRoutine,
                    215:     StallExecutionRoutine,
                    216:     PrintRoutine,
                    217:     ReturnExtendedSystemInformationRoutine,
                    218:     VendorGenericMaximumRoutine
                    219:     } VENDOR_GENERIC_ENTRY;
                    220: 
                    221: //
                    222: // Define vendor specific routine types.
                    223: //
                    224: 
                    225: typedef
                    226: PVOID
                    227: (*PVEN_ALLOCATE_POOL_ROUTINE) (
                    228:     IN ULONG NumberOfBytes
                    229:     );
                    230: 
                    231: typedef
                    232: VOID
                    233: (*PVEN_STALL_EXECUTION_ROUTINE) (
                    234:     IN ULONG Microseconds
                    235:     );
                    236: 
                    237: typedef
                    238: ULONG
                    239: (*PVEN_PRINT_ROUTINE) (
                    240:     IN PCHAR Format,
                    241:     ...
                    242:     );
                    243: 
                    244: typedef
                    245: VOID
                    246: (*PVEN_RETURN_EXTENDED_SYSTEM_INFORMATION_ROUTINE) (
                    247:     OUT PEXTENDED_SYSTEM_INFORMATION SystemInfo
                    248:     );
                    249: 
                    250: //
                    251: // Define vendor specific prototypes.
                    252: //
                    253: 
                    254: PVOID
                    255: FwAllocatePool (
                    256:     IN ULONG NumberOfBytes
                    257:     );
                    258: 
                    259: VOID
                    260: FwStallExecution (
                    261:     IN ULONG Microseconds
                    262:     );
                    263: 
                    264: ULONG
                    265: FwPrint (
                    266:     IN PCHAR Format,
                    267:     ...
                    268:     );
                    269: 
                    270: VOID
                    271: FwReturnExtendedSystemInformation (
                    272:     OUT PEXTENDED_SYSTEM_INFORMATION SystemInfo
                    273:     );
                    274:     
                    275: 
                    276: //
                    277: // Define vendor specific functions.
                    278: //
                    279: 
                    280: #define VenAllocatePool(NumberOfBytes) \
                    281:     ((PVEN_ALLOCATE_MEMORY_ROUTINE)(SYSTEM_BLOCK->VendorVector[AllocatePoolRoutine])) \
                    282:         ((NumberOfBytes))
                    283: 
                    284: #define VenStallExecution(Microseconds) \
                    285:     ((PVEN_STALL_EXECUTION_ROUTINE)(SYSTEM_BLOCK->VendorVector[StallExecutionRoutine])) \
                    286:         ((Microseconds))
                    287: 
                    288: #define VenPrint(x) \
                    289:     ((PVEN_PRINT_ROUTINE)(SYSTEM_BLOCK->VendorVector[PrintRoutine])) \
                    290:         ((x))
                    291: 
                    292: #define VenPrint1(x,y) \
                    293:     ((PVEN_PRINT_ROUTINE)(SYSTEM_BLOCK->VendorVector[PrintRoutine])) \
                    294:         ((x), (y))
                    295: 
                    296: #define VenPrint2(x,y,z) \
                    297:     ((PVEN_PRINT_ROUTINE)(SYSTEM_BLOCK->VendorVector[PrintRoutine])) \
                    298:         ((x), (y), (z))
                    299: 
                    300: #define VenReturnExtendedSystemInformation(x) \
                    301:     ((PVEN_RETURN_EXTENDED_SYSTEM_INFORMATION_ROUTINE)(SYSTEM_BLOCK->VendorVector[ReturnExtendedSystemInformationRoutine]))(x)
                    302: 
                    303: #endif // _LANGUAGE_ASSEMBLY not defined
                    304: #endif // _ALPHAREF_
                    305: 
                    306: 
                    307: 
                    308: 
                    309: 
                    310: 
                    311: 
                    312: 
                    313: 
                    314: 
                    315: 
                    316: 

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