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1.1 root 1: /*++
2:
3: Copyright (c) 1993 - Colorado Memory Systems, Inc.
4: All Rights Reserved
5:
6: Module Name:
7:
8: drvtask.h
9:
10: Abstract:
11:
12: Revision History:
13:
14:
15: --*/
16:
17: /***********************************************************************/
18: /* Task manager defines */
19: /***********************************************************************/
20:
21: /* used in mt_driver_waiting */
22: #define IDLE 0
23:
24: /* used in IRQ_struct.irq_flags */
25: #define FIRST 0x80 /* IRQ format (See IBM PS/2 interrupt sharing documentation) */
26:
27: /***********************************************************************/
28: /* Task manager globals */
29: /***********************************************************************/
30:
31: /* hardware info (retrieved from config) */
32:
33: /* Timing values for mt_Sleep */
34:
35:
36: typedef enum _QIC_TIME {
37: t0010us = 10l,
38: t0012us = 12l,
39: mt_wt2ticks = 31l,
40: mt_wt090ms = 90l,
41: mt_wt200ms = 200l,
42: mt_wt260ms = 260l,
43: mt_wt500ms = 500l,
44: mt_wt001s = 1000l,
45: mt_wt003s = 3000l,
46: mt_wt004s = 4000l,
47: mt_wt005s = 5000l,
48: mt_wt007s = 7000l,
49: mt_wt010s = 10000l,
50: mt_wt016s = 16000l,
51: mt_wt035s = 35000l,
52: mt_wt045s = 45000l,
53: mt_wt050s = 50000l,
54: mt_wt060s = 60000l,
55: mt_wt065s = 65000l,
56: mt_wt085s = 85000l,
57: mt_wt090s = 90000l,
58: mt_wt100s = 100000l,
59: mt_wt105s = 105000l,
60: mt_wt130s = 130000l,
61: mt_wt150s = 150000l,
62: mt_wt180s = 180000l,
63: mt_wt200s = 200000l,
64: mt_wt228s = 228000l,
65: mt_wt250s = 250000l,
66: mt_wt260s = 260000l,
67: mt_wt300s = 300000l,
68: mt_wt350s = 350000l,
69: mt_wt455s = 455000l,
70: mt_wt460s = 460000l,
71: mt_wt475s = 475000l,
72: mt_wt700s = 700000l,
73: mt_wt910s = 910000l,
74: mt_wttrks = 5000l
75: } QIC_TIME, *PQIC_TIME;
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