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1.1 root 1: ;---------------------------Module-Header------------------------------;
2: ; Module Name: vgaregs.asm
3: ;
4: ; Copyright (c) 1992 Microsoft Corporation
5: ;-----------------------------------------------------------------------;
6: ;-----------------------------------------------------------------------;
7: ; VOID vInitRegs(void)
8: ;
9: ; Sets the VGA's data control registers to their default states.
10: ;
11: ;-----------------------------------------------------------------------;
12:
13: .386
14:
15: .model small,c
16:
17: assume cs:FLAT,ds:FLAT,es:FLAT,ss:FLAT
18: assume fs:nothing,gs:nothing
19:
20: .xlist
21: include stdcall.inc ;calling convention cmacros
22: include i386\strucs.inc
23: include i386\driver.inc
24: include i386\egavga.inc
25:
26: .list
27:
28: .code
29:
30: cProc vInitRegs,4,< \
31: uses esi edi ebx, \
32: ppdev: ptr PDEV >
33:
34: mov esi,ppdev
35:
36: ; Initialize sequencer to its defaults (all planes enabled, index
37: ; pointing to Map Mask).
38:
39: mov dx,VGA_BASE + SEQ_ADDR
40: mov ax,(MM_ALL shl 8) + SEQ_MAP_MASK
41: out dx,ax
42:
43: ; Initialize graphics controller to its defaults (set/reset disabled for
44: ; all planes, no rotation & ALU function == replace, write mode 0 & read
45: ; mode 0, color compare ignoring all planes (read mode 1 reads always
46: ; return 0ffh, handy for ANDing), and the bit mask == 0ffh, gating all
47: ; bytes from the CPU.
48:
49: mov dl,GRAF_ADDR
50: mov ax,(0 shl 8) + GRAF_ENAB_SR
51: out dx,ax
52:
53: mov ax,(DR_SET shl 8) + GRAF_DATA_ROT
54: out dx,ax
55:
56: ; Default to read mode 0, write mode 0:
57:
58: mov edx,VGA_BASE + GRAF_ADDR
59: mov ah,byte ptr [esi].pdev_ulrm0_wmX[0]
60: mov al,GRAF_MODE
61: out dx,ax ;write mode 0, read mode 0
62:
63: mov ax,(0 shl 8) + GRAF_CDC
64: out dx,ax
65:
66: mov ax,(0FFh shl 8) + GRAF_BIT_MASK
67: out dx,ax
68:
69: cRet vInitRegs
70:
71:
72: endProc vInitRegs
73:
74: end
75:
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