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1.1 ! root 1: /*++ ! 2: ! 3: Copyright (c) 1992 Microsoft Corporation ! 4: ! 5: Module Name: ! 6: ! 7: Mode542x.h ! 8: ! 9: Abstract: ! 10: ! 11: This module contains all the global data used by the Cirrus Logic ! 12: CL-542x driver. ! 13: ! 14: Environment: ! 15: ! 16: Kernel mode ! 17: ! 18: Revision History: ! 19: ! 20: --*/ ! 21: ! 22: // ! 23: // The next set of tables are for the CL542x ! 24: // Note: all resolutions supported ! 25: // ! 26: ! 27: // ! 28: // 640x480 16-color mode (BIOS mode 12) set command string for CL 542x. ! 29: // ! 30: ! 31: USHORT CL542x_640x480[] = { ! 32: OWM, // begin setmode ! 33: SEQ_ADDRESS_PORT, ! 34: 2, // count ! 35: 0x1206, // enable extensions ! 36: 0x0012, ! 37: ! 38: #ifndef INT10_MODE_SET ! 39: OWM, // begin setmode ! 40: SEQ_ADDRESS_PORT, ! 41: 15, // count ! 42: 0x100, // start sync reset ! 43: 0x0101,0x0f02,0x0003,0x0604, // program up sequencer ! 44: 0x0007,0x0008,0x4A0B,0x5B0C, ! 45: 0x450D,0x000E,0x2B1B, ! 46: 0x2F1C,0x301D,0x001E, ! 47: ! 48: OB, // point sequencer index to ff ! 49: SEQ_ADDRESS_PORT, ! 50: 0x0F, ! 51: ! 52: METAOUT+MASKOUT, // masked out. ! 53: SEQ_DATA_PORT, ! 54: 0xDF,0x00, // and mask, xor mask ! 55: ! 56: OB, // misc. register ! 57: MISC_OUTPUT_REG_WRITE_PORT, ! 58: 0xe3, ! 59: ! 60: OW, // text/graphics bit ! 61: GRAPH_ADDRESS_PORT, ! 62: 0x506, ! 63: ! 64: OW, // end sync reset ! 65: SEQ_ADDRESS_PORT, ! 66: 0x300, ! 67: ! 68: OW, // unprotect crtc 0-7 ! 69: CRTC_ADDRESS_PORT_COLOR, ! 70: 0x2011, ! 71: ! 72: METAOUT+INDXOUT, // program crtc registers ! 73: CRTC_ADDRESS_PORT_COLOR, ! 74: 28,0, // count, startindex ! 75: 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, ! 76: 0x0b, 0x3e, 0x00, 0x40, 0x00, 0x00, ! 77: 0x00, 0x00, 0x00, 0x00, 0xea, 0x8c, ! 78: 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3, ! 79: 0xff, 0x00, 0x00, 0x00, ! 80: ! 81: METAOUT+INDXOUT, // program gdc registers ! 82: GRAPH_ADDRESS_PORT, ! 83: 9,0, // count, startindex ! 84: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ! 85: 0x05, 0x0F, 0xFF, ! 86: ! 87: IB, // prepare atc for writing ! 88: INPUT_STATUS_1_COLOR, ! 89: ! 90: METAOUT+ATCOUT, // program atc registers ! 91: ATT_ADDRESS_PORT, ! 92: 21,0, // count, startindex ! 93: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 94: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 95: 0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, ! 96: 0x0F, 0x00, 0x00, ! 97: ! 98: OB, // turn video on. ! 99: ATT_ADDRESS_PORT, ! 100: 0x20, ! 101: ! 102: OB, ! 103: DAC_PIXEL_MASK_PORT, ! 104: 0xFF, ! 105: ! 106: #endif ! 107: OWM, ! 108: GRAPH_ADDRESS_PORT, ! 109: 3, ! 110: 0x0009, 0x000a, 0x000b, // no banking in 640x480 mode ! 111: ! 112: EOD ! 113: }; ! 114: ! 115: // ! 116: // 800x600 16-color (60Hz refresh) mode set command string for CL 542x. ! 117: // ! 118: ! 119: USHORT CL542x_800x600[] = { ! 120: OWM, // begin setmode ! 121: SEQ_ADDRESS_PORT, ! 122: 2, // count ! 123: 0x1206, // enable extensions ! 124: 0x0012, ! 125: ! 126: #ifndef INT10_MODE_SET ! 127: OWM, // begin setmode ! 128: SEQ_ADDRESS_PORT, ! 129: 15, // count ! 130: 0x100, // start sync reset ! 131: 0x0101,0x0f02,0x0003,0x0604, // program up sequencer ! 132: 0x0007,0x0008,0x4A0B,0x5B0C, ! 133: 0x450D,0x7E0E,0x2B1B, ! 134: 0x2F1C,0x301D,0x331E, ! 135: ! 136: OB, // point sequencer index to ff ! 137: SEQ_ADDRESS_PORT, ! 138: 0x0F, ! 139: ! 140: METAOUT+MASKOUT, // masked out. ! 141: SEQ_DATA_PORT, ! 142: 0xDF,0x00, // and mask, xor mask ! 143: ! 144: OB, // misc. register ! 145: MISC_OUTPUT_REG_WRITE_PORT, ! 146: 0x2F, ! 147: ! 148: OW, // text/graphics bit ! 149: GRAPH_ADDRESS_PORT, ! 150: 0x506, ! 151: ! 152: OW, // end sync reset ! 153: SEQ_ADDRESS_PORT, ! 154: 0x300, ! 155: ! 156: OW, // unprotect crtc 0-7 ! 157: CRTC_ADDRESS_PORT_COLOR, ! 158: 0x2011, ! 159: ! 160: METAOUT+INDXOUT, // program crtc registers ! 161: CRTC_ADDRESS_PORT_COLOR, ! 162: 28,0, // count, startindex ! 163: 0x7b, 0x63, 0x64, 0x9e, 0x69, 0x92, // NANAO 9070 ! 164: 0x6F, 0xf0, 0x00, 0x60, 0x00, 0x00, ! 165: 0x00, 0x00, 0x00, 0x00, 0x58, 0x8a, ! 166: 0x57, 0x32, 0x00, 0x58, 0x6f, 0xE3, ! 167: 0xff, 0x00, 0x00, 0x22, ! 168: ! 169: METAOUT+INDXOUT, // program gdc registers ! 170: GRAPH_ADDRESS_PORT, ! 171: 9,0, // count, startindex ! 172: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ! 173: 0x05, 0x0F, 0xFF, ! 174: ! 175: IB, // prepare atc for writing ! 176: INPUT_STATUS_1_COLOR, ! 177: ! 178: METAOUT+ATCOUT, // program atc registers ! 179: ATT_ADDRESS_PORT, ! 180: 21,0, // count, startindex ! 181: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 182: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 183: 0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, ! 184: 0x0F, 0x00, 0x00, ! 185: ! 186: OB, // turn video on. ! 187: ATT_ADDRESS_PORT, ! 188: 0x20, ! 189: ! 190: OB, ! 191: DAC_PIXEL_MASK_PORT, ! 192: 0xFF, ! 193: ! 194: #endif ! 195: OWM, ! 196: GRAPH_ADDRESS_PORT, ! 197: 3, ! 198: 0x0009, 0x000a, 0x000b, // no banking in 800x600 mode ! 199: ! 200: EOD ! 201: }; ! 202: ! 203: // ! 204: // 1024x768 16-color (60Hz refresh) mode set command string for CL 542x. ! 205: // ! 206: ! 207: USHORT CL542x_1024x768[] = { ! 208: OWM, // begin setmode ! 209: SEQ_ADDRESS_PORT, ! 210: 2, // count ! 211: 0x1206, // enable extensions ! 212: 0x0012, ! 213: ! 214: #ifndef INT10_MODE_SET ! 215: OWM, // begin setmode ! 216: SEQ_ADDRESS_PORT, ! 217: 15, // count ! 218: 0x100, // start sync reset ! 219: 0x0101,0x0f02,0x0003,0x0604, // program up sequencer ! 220: 0x0007,0x0008,0x4A0B,0x5B0C, ! 221: 0x450D,0x3B0E,0x2B1B, ! 222: 0x2F1C,0x301D,0x1A1E, ! 223: ! 224: OB, // point sequencer index to ff ! 225: SEQ_ADDRESS_PORT, ! 226: 0x0f, ! 227: ! 228: METAOUT+MASKOUT, // masked out. ! 229: SEQ_DATA_PORT, ! 230: 0x9f,0x40, // and mask, xor mask ! 231: ! 232: OB, // misc. register ! 233: MISC_OUTPUT_REG_WRITE_PORT, ! 234: 0xEF, ! 235: ! 236: OW, // text/graphics bit ! 237: GRAPH_ADDRESS_PORT, ! 238: 0x506, ! 239: ! 240: OW, // end sync reset ! 241: SEQ_ADDRESS_PORT, ! 242: 0x300, ! 243: ! 244: OW, // unprotect crtc 0-7 ! 245: CRTC_ADDRESS_PORT_COLOR, ! 246: 0x2011, ! 247: ! 248: METAOUT+INDXOUT, // program crtc registers ! 249: CRTC_ADDRESS_PORT_COLOR, ! 250: 28,0, // count, startindex ! 251: 0xa3, 0x7f, 0x80, 0x86, 0x85, 0x96, // SONY GDM-1952 ! 252: 0x24, 0xfd, 0x00, 0x60, 0x00, 0x00, ! 253: 0x00, 0x00, 0x00, 0x00, 0x02, 0x88, ! 254: 0xff, 0x40, 0x00, 0x00, 0x24, 0xE3, ! 255: 0xFF, 0x4A, 0x00, 0x22, ! 256: ! 257: METAOUT+INDXOUT, // program gdc registers ! 258: GRAPH_ADDRESS_PORT, ! 259: 9,0, // count, startindex ! 260: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ! 261: 0x05, 0x0F, 0xFF, ! 262: ! 263: ! 264: IB, // prepare atc for writing ! 265: INPUT_STATUS_1_COLOR, ! 266: ! 267: METAOUT+ATCOUT, // program atc registers ! 268: ATT_ADDRESS_PORT, ! 269: 21,0, // count, startindex ! 270: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 271: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 272: 0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, ! 273: 0x0F, 0x00, 0x00, ! 274: ! 275: OB, // turn video on. ! 276: ATT_ADDRESS_PORT, ! 277: 0x20, ! 278: ! 279: #endif ! 280: ! 281: OWM, ! 282: GRAPH_ADDRESS_PORT, ! 283: 3, ! 284: #if ONE_64K_BANK ! 285: 0x0009, 0x000a, 0x000b, ! 286: #endif ! 287: #if TWO_32K_BANKS ! 288: 0x0009, 0x000a, 0x010b, ! 289: #endif ! 290: ! 291: OB, ! 292: DAC_PIXEL_MASK_PORT, ! 293: 0xFF, ! 294: ! 295: EOD ! 296: }; ! 297: ! 298: //----------------------------- ! 299: // standard VGA text modes here ! 300: // 80x25 at 640x350 ! 301: // ! 302: //----------------------------- ! 303: ! 304: // ! 305: // 80x25 text mode set command string for CL 542x. ! 306: // (720x400 pixel resolution; 9x16 character cell.) ! 307: // ! 308: ! 309: USHORT CL542x_80x25Text[] = { ! 310: OWM, // begin setmode ! 311: SEQ_ADDRESS_PORT, ! 312: 2, // count ! 313: 0x1206, // enable extensions ! 314: 0x0012, ! 315: ! 316: #ifndef INT10_MODE_SET ! 317: OWM, // begin setmode ! 318: SEQ_ADDRESS_PORT, ! 319: 12, // count ! 320: 0x100, // start sync reset ! 321: 0x0001,0x0302,0x0003,0x0204, // program up sequencer ! 322: 0x0007,0x000E,0x0010, ! 323: 0x0011,0x0013,0x0016, ! 324: 0x001E, ! 325: ! 326: OB, // point sequencer index to ff ! 327: SEQ_ADDRESS_PORT, ! 328: 0x0F, ! 329: ! 330: METAOUT+MASKOUT, // masked out. ! 331: SEQ_DATA_PORT, ! 332: 0xDF,0x00, // and mask, xor mask ! 333: ! 334: OB, // misc. regiseter ! 335: MISC_OUTPUT_REG_WRITE_PORT, ! 336: 0x67, ! 337: ! 338: OW, // text/graphics bit ! 339: GRAPH_ADDRESS_PORT, ! 340: 0xe06, ! 341: ! 342: OW, // end sync reset ! 343: SEQ_ADDRESS_PORT, ! 344: 0x300, ! 345: ! 346: OW, // unprotect crtc 0-7 ! 347: CRTC_ADDRESS_PORT_COLOR, ! 348: 0x0e11, ! 349: ! 350: METAOUT+INDXOUT, // program crtc registers ! 351: CRTC_ADDRESS_PORT_COLOR, ! 352: 28,0, // count, startindex ! 353: 0x5F, 0x4F, 0x50, 0x82, 0x55, 0x81, ! 354: 0xBF, 0x1F, 0x00, 0x4F, 0x0D, 0x0E, ! 355: 0x00, 0x00, 0x00, 0x00, 0x9C, 0x8E, ! 356: 0x8F, 0x28, 0x1F, 0x96, 0xB9, 0xA3, ! 357: 0xFF, 0x00, 0x00, 0x00, ! 358: ! 359: METAOUT+INDXOUT, // program gdc registers ! 360: GRAPH_ADDRESS_PORT, ! 361: 9,0, // count, startindex ! 362: 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, ! 363: 0x0e, 0x00, 0xFF, ! 364: ! 365: IB, // prepare atc for writing ! 366: INPUT_STATUS_1_COLOR, ! 367: ! 368: METAOUT+ATCOUT, // program atc registers ! 369: ATT_ADDRESS_PORT, ! 370: 21,0, // count, startindex ! 371: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 372: 0x14, 0x07, 0x38, 0x39, 0x3A, 0x3B, ! 373: 0x3C, 0x3D, 0x3E, 0x3F, 0x04, 0x00, ! 374: 0x0F, 0x08, 0x00, ! 375: ! 376: OB, ! 377: DAC_PIXEL_MASK_PORT, ! 378: 0xFF, ! 379: ! 380: IB, // prepare to write to Hidden DAC reg ! 381: DAC_PIXEL_MASK_PORT, ! 382: IB, // by reading this register four times ! 383: DAC_PIXEL_MASK_PORT, ! 384: IB, ! 385: DAC_PIXEL_MASK_PORT, ! 386: IB, ! 387: DAC_PIXEL_MASK_PORT, ! 388: OB, ! 389: DAC_PIXEL_MASK_PORT, // clear the hidden DAC register ! 390: 0x00, ! 391: ! 392: OB, // turn video on. ! 393: ATT_ADDRESS_PORT, ! 394: 0x20, ! 395: ! 396: OW, ! 397: SEQ_ADDRESS_PORT, 0x0006, // turn off the extension registers ! 398: ! 399: #endif ! 400: OWM, ! 401: GRAPH_ADDRESS_PORT, ! 402: 3, ! 403: 0x0009, 0x000a, 0x000b, // no banking in text mode ! 404: ! 405: EOD ! 406: }; ! 407: ! 408: // ! 409: // 80x25 text mode set command string for CL 542x. ! 410: // (640x350 pixel resolution; 8x14 character cell.) ! 411: // ! 412: ! 413: USHORT CL542x_80x25_14_Text[] = { ! 414: OWM, // begin setmode ! 415: SEQ_ADDRESS_PORT, ! 416: 2, // count ! 417: 0x1206, // enable extensions ! 418: 0x0012, ! 419: ! 420: #ifndef INT10_MODE_SET ! 421: OWM, // begin setmode ! 422: SEQ_ADDRESS_PORT, ! 423: 12, // count ! 424: 0x100, // start sync reset ! 425: 0x0101,0x0302,0x0003,0x0204, // program up sequencer ! 426: 0x0007,0x000E,0x0010, ! 427: 0x0011,0x0013,0x0016, ! 428: 0x001E, ! 429: ! 430: OB, // point sequencer index to ff ! 431: SEQ_ADDRESS_PORT, ! 432: 0x0F, ! 433: ! 434: METAOUT+MASKOUT, // masked out. ! 435: SEQ_DATA_PORT, ! 436: 0xDF,0x00, // and mask, xor mask ! 437: ! 438: OB, // misc. regiseter ! 439: MISC_OUTPUT_REG_WRITE_PORT, ! 440: 0xa3, ! 441: ! 442: OW, // text/graphics bit ! 443: GRAPH_ADDRESS_PORT, ! 444: 0xe06, ! 445: ! 446: OW, // end sync reset ! 447: SEQ_ADDRESS_PORT, ! 448: 0x300, ! 449: ! 450: OW, // unprotect crtc 0-7 ! 451: CRTC_ADDRESS_PORT_COLOR, ! 452: 0x0511, ! 453: ! 454: METAOUT+INDXOUT, // program crtc registers ! 455: CRTC_ADDRESS_PORT_COLOR, ! 456: 28,0, // count, startindex ! 457: 0x5F, 0x4F, 0x50, 0x82, 0x55, 0x81, 0xBF, 0x1F, ! 458: 0x00, 0x4D, 0x0B, 0x0C, 0x00, 0x00, 0x00, 0x00, ! 459: 0x83, 0x85, 0x5D, 0x28, 0x1F, 0x63, 0xBA, 0xA3, ! 460: 0xFF,0x00, 0x00, 0x00, ! 461: ! 462: METAOUT+INDXOUT, // program gdc registers ! 463: GRAPH_ADDRESS_PORT, ! 464: 9,0, // count, startindex ! 465: 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, ! 466: 0x0e, 0x00, 0xFF, ! 467: ! 468: IB, // prepare atc for writing ! 469: INPUT_STATUS_1_COLOR, ! 470: ! 471: METAOUT+ATCOUT, // program atc registers ! 472: ATT_ADDRESS_PORT, ! 473: 21,0, // count, startindex ! 474: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 475: 0x14, 0x07, 0x38, 0x39, 0x3A, 0x3B, ! 476: 0x3C, 0x3D, 0x3E, 0x3F, 0x08, 0x00, ! 477: 0x0F, 0x00, 0x00, ! 478: ! 479: OB, // turn video on. ! 480: ATT_ADDRESS_PORT, ! 481: 0x20, ! 482: ! 483: OB, ! 484: DAC_PIXEL_MASK_PORT, ! 485: 0xFF, ! 486: ! 487: IB, // prepare to write to Hidden DAC reg ! 488: DAC_PIXEL_MASK_PORT, ! 489: IB, // by reading this register four times ! 490: DAC_PIXEL_MASK_PORT, ! 491: IB, ! 492: DAC_PIXEL_MASK_PORT, ! 493: IB, ! 494: DAC_PIXEL_MASK_PORT, ! 495: OB, ! 496: DAC_PIXEL_MASK_PORT, // clear the hidden DAC register ! 497: 0x00, ! 498: ! 499: OW, ! 500: SEQ_ADDRESS_PORT, ! 501: 0x0006, // turn off the extension registers ! 502: ! 503: #endif ! 504: OWM, ! 505: GRAPH_ADDRESS_PORT, ! 506: 3, ! 507: 0x0009, 0x000a, 0x000b, // no banking in text mode ! 508: ! 509: EOD ! 510: }; ! 511: ! 512: // ! 513: // 1280x1024 16-color mode (BIOS mode 0x6C) set command string for CL 542x. ! 514: // ! 515: ! 516: USHORT CL542x_1280x1024_I[] = { ! 517: OWM, // begin setmode ! 518: SEQ_ADDRESS_PORT, ! 519: 2, // count ! 520: 0x1206, // enable extensions ! 521: 0x0012, ! 522: ! 523: #ifndef INT10_MODE_SET ! 524: OWM, // begin setmode ! 525: SEQ_ADDRESS_PORT, ! 526: 15, // count ! 527: 0x100, // start sync reset ! 528: 0x0101,0x0f02,0x0003,0x0604, // program up sequencer ! 529: 0x0007,0x0008,0x4A0B,0x5B0C, ! 530: 0x450D,0x6E0E,0x2B1B, ! 531: 0x2F1C,0x301D,0x2A1E, ! 532: ! 533: OB, // point sequencer index to ff ! 534: SEQ_ADDRESS_PORT, ! 535: 0x0F, ! 536: ! 537: METAOUT+MASKOUT, // masked out. ! 538: SEQ_DATA_PORT, ! 539: 0xDF,0x00, // and mask, xor mask ! 540: ! 541: OB, // misc. register ! 542: MISC_OUTPUT_REG_WRITE_PORT, ! 543: 0xEF, ! 544: ! 545: OW, // text/graphics bit ! 546: GRAPH_ADDRESS_PORT, ! 547: 0x506, ! 548: ! 549: OW, // end sync reset ! 550: SEQ_ADDRESS_PORT, ! 551: 0x300, ! 552: ! 553: OW, // unprotect crtc 0-7 ! 554: CRTC_ADDRESS_PORT_COLOR, ! 555: 0x2011, ! 556: ! 557: METAOUT+INDXOUT, // program crtc registers ! 558: CRTC_ADDRESS_PORT_COLOR, ! 559: 28,0, // count, startindex ! 560: 0xBD, 0x9f, 0xA0, 0x80, 0xA4, 0x19, ! 561: 0x2A, 0xB2, 0x00, 0x60, 0x00, 0x00, ! 562: 0x00, 0x00, 0x00, 0x00, 0x0B, 0x80, ! 563: 0xFF, 0x50, 0x00, 0x00, 0x2A, 0xE3, ! 564: 0xFF, 0x60, 0x01, 0x22, ! 565: ! 566: METAOUT+INDXOUT, // program gdc registers ! 567: GRAPH_ADDRESS_PORT, ! 568: 9,0, // count, startindex ! 569: 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, ! 570: 0x05, 0x0F, 0xFF, ! 571: ! 572: IB, // prepare atc for writing ! 573: INPUT_STATUS_1_COLOR, ! 574: ! 575: METAOUT+ATCOUT, // program atc registers ! 576: ATT_ADDRESS_PORT, ! 577: 21,0, // count, startindex ! 578: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 579: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 580: 0x0C, 0x0D, 0x0E, 0x0F, 0x01, 0x00, ! 581: 0x0F, 0x00, 0x00, ! 582: ! 583: OB, // turn video on. ! 584: ATT_ADDRESS_PORT, ! 585: 0x20, ! 586: ! 587: OB, ! 588: DAC_PIXEL_MASK_PORT, ! 589: 0xFF, ! 590: ! 591: #endif ! 592: OWM, ! 593: GRAPH_ADDRESS_PORT, ! 594: 3, ! 595: #if ONE_64K_BANK ! 596: 0x0009, 0x000a, 0x000b, ! 597: #endif ! 598: #if TWO_32K_BANKS ! 599: 0x0009, 0x000a, 0x010b, ! 600: #endif ! 601: ! 602: EOD ! 603: }; ! 604: ! 605: // ! 606: // 640x480 256-color mode (BIOS mode 0x5F) set command string for CL 542x. ! 607: // ! 608: ! 609: USHORT CL542x_640x480_256[] = { ! 610: OWM, // begin setmode ! 611: SEQ_ADDRESS_PORT, ! 612: 2, // count ! 613: 0x1206, // enable extensions ! 614: 0x0012, ! 615: ! 616: #ifndef INT10_MODE_SET ! 617: OWM, // begin setmode ! 618: SEQ_ADDRESS_PORT, ! 619: 15, // count ! 620: 0x100, // start sync reset ! 621: 0x0101,0x0F02,0x0003,0x0E04, // program up sequencer ! 622: 0x0107,0x0008,0x4A0B,0x5B0C, ! 623: 0x450D,0x7E0E,0x2B1B, ! 624: 0x2F1C,0x301D,0x331E, ! 625: ! 626: OB, // point sequencer index to ff ! 627: SEQ_ADDRESS_PORT, ! 628: 0x0F, ! 629: ! 630: METAOUT+MASKOUT, // masked out. ! 631: SEQ_DATA_PORT, ! 632: 0xDF,0x20, // and mask, xor mask ! 633: ! 634: OB, // misc. register ! 635: MISC_OUTPUT_REG_WRITE_PORT, ! 636: 0xe3, ! 637: ! 638: OW, // text/graphics bit ! 639: GRAPH_ADDRESS_PORT, ! 640: 0x506, ! 641: ! 642: OW, // end sync reset ! 643: SEQ_ADDRESS_PORT, ! 644: 0x300, ! 645: ! 646: OW, // unprotect crtc 0-7 ! 647: CRTC_ADDRESS_PORT_COLOR, ! 648: 0x2011, ! 649: ! 650: METAOUT+INDXOUT, // program crtc registers ! 651: CRTC_ADDRESS_PORT_COLOR, ! 652: 28,0, // count, startindex ! 653: 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, ! 654: 0x0b, 0x3e, 0x00, 0x40, 0x00, 0x00, ! 655: 0x00, 0x00, 0x00, 0x00, 0xea, 0x8c, ! 656: 0xdf, 0x50, 0x00, 0xe7, 0x04, 0xe3, ! 657: 0xff, 0x00, 0x00, 0x22, ! 658: ! 659: METAOUT+INDXOUT, // program gdc registers ! 660: GRAPH_ADDRESS_PORT, ! 661: 9,0, // count, startindex ! 662: 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, ! 663: 0x05, 0x0F, 0xFF, ! 664: ! 665: IB, // prepare atc for writing ! 666: INPUT_STATUS_1_COLOR, ! 667: ! 668: METAOUT+ATCOUT, // program atc registers ! 669: ATT_ADDRESS_PORT, ! 670: 21,0, // count, startindex ! 671: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 672: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 673: 0x0C, 0x0D, 0x0E, 0x0F, 0x41, 0x00, ! 674: 0x0F, 0x00, 0x00, ! 675: ! 676: OB, // turn video on. ! 677: ATT_ADDRESS_PORT, ! 678: 0x20, ! 679: ! 680: OB, ! 681: DAC_PIXEL_MASK_PORT, ! 682: 0xFF, ! 683: ! 684: #endif ! 685: OWM, ! 686: GRAPH_ADDRESS_PORT, ! 687: 3, ! 688: #if ONE_64K_BANK ! 689: 0x0009, 0x000a, 0x000b, ! 690: #endif ! 691: #if TWO_32K_BANKS ! 692: 0x0009, 0x000a, 0x010b, ! 693: #endif ! 694: ! 695: EOD ! 696: }; ! 697: ! 698: // ! 699: // 800x600 256-color mode (BIOS mode 0x5C) set command string for CL 542x. ! 700: // ! 701: ! 702: USHORT CL542x_800x600_256[] = { ! 703: OWM, // begin setmode ! 704: SEQ_ADDRESS_PORT, ! 705: 2, // count ! 706: 0x1206, // enable extensions ! 707: 0x0012, ! 708: ! 709: #ifndef INT10_MODE_SET ! 710: OWM, // begin setmode ! 711: SEQ_ADDRESS_PORT, ! 712: 15, // count ! 713: 0x100, // start sync reset ! 714: 0x0101,0x0F02,0x0003,0x0E04, // program up sequencer ! 715: 0x0107,0x0008,0x4A0B,0x5B0C, ! 716: 0x450D,0x640E,0x2B1B, ! 717: 0x2F1C,0x301D,0x3A1E, ! 718: ! 719: OB, // point sequencer index to ff ! 720: SEQ_ADDRESS_PORT, ! 721: 0x0F, ! 722: ! 723: METAOUT+MASKOUT, // masked out. ! 724: SEQ_DATA_PORT, ! 725: 0xDF,0x20, // and mask, xor mask ! 726: ! 727: OB, // misc. register ! 728: MISC_OUTPUT_REG_WRITE_PORT, ! 729: 0x2F, ! 730: ! 731: OW, // text/graphics bit ! 732: GRAPH_ADDRESS_PORT, ! 733: 0x506, ! 734: ! 735: OW, // end sync reset ! 736: SEQ_ADDRESS_PORT, ! 737: 0x300, ! 738: ! 739: OW, // unprotect crtc 0-7 ! 740: CRTC_ADDRESS_PORT_COLOR, ! 741: 0x2011, ! 742: ! 743: METAOUT+INDXOUT, // program crtc registers ! 744: CRTC_ADDRESS_PORT_COLOR, ! 745: 28,0, // count, startindex ! 746: 0x7D, 0x63, 0x64, 0x80, 0x6D, 0x1C, ! 747: 0x98, 0xF0, 0x00, 0x60, 0x00, 0x00, ! 748: 0x00, 0x00, 0x00, 0x00, 0x7B, 0x80, ! 749: 0x57, 0x64, 0x00, 0x5F, 0x91, 0xe3, ! 750: 0xff, 0x00, 0x00, 0x22, ! 751: ! 752: METAOUT+INDXOUT, // program gdc registers ! 753: GRAPH_ADDRESS_PORT, ! 754: 9,0, // count, startindex ! 755: 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, ! 756: 0x05, 0x0F, 0xFF, ! 757: ! 758: IB, // prepare atc for writing ! 759: INPUT_STATUS_1_COLOR, ! 760: ! 761: METAOUT+ATCOUT, // program atc registers ! 762: ATT_ADDRESS_PORT, ! 763: 21,0, // count, startindex ! 764: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 765: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 766: 0x0C, 0x0D, 0x0E, 0x0F, 0x41, 0x00, ! 767: 0x0F, 0x00, 0x00, ! 768: ! 769: OB, // turn video on. ! 770: ATT_ADDRESS_PORT, ! 771: 0x20, ! 772: ! 773: OB, ! 774: DAC_PIXEL_MASK_PORT, ! 775: 0xFF, ! 776: #endif ! 777: ! 778: OWM, ! 779: GRAPH_ADDRESS_PORT, ! 780: 3, ! 781: #if ONE_64K_BANK ! 782: 0x0009, 0x000a, 0x000b, ! 783: #endif ! 784: #if TWO_32K_BANKS ! 785: 0x0009, 0x000a, 0x010b, ! 786: #endif ! 787: ! 788: EOD ! 789: }; ! 790: ! 791: // ! 792: // 1024x768 256-color mode (BIOS mode 0x60) set command string for CL 542x. ! 793: // ! 794: ! 795: USHORT CL542x_1024x768_256[] = { ! 796: OWM, // begin setmode ! 797: SEQ_ADDRESS_PORT, ! 798: 2, // count ! 799: 0x1206, // enable extensions ! 800: 0x0012, ! 801: ! 802: #ifndef INT10_MODE_SET ! 803: OWM, // begin setmode ! 804: SEQ_ADDRESS_PORT, ! 805: 15, // count ! 806: 0x100, // start sync reset ! 807: 0x0101,0x0F02,0x0003,0x0E04, // program up sequencer ! 808: 0x0107,0x0008,0x4A0B,0x5B0C, ! 809: 0x450D,0x3B0E,0x2B1B, ! 810: 0x2F1C,0x301D,0x1A1E, ! 811: ! 812: OB, // point sequencer index to ff ! 813: SEQ_ADDRESS_PORT, ! 814: 0x0F, ! 815: ! 816: METAOUT+MASKOUT, // masked out. ! 817: SEQ_DATA_PORT, ! 818: 0xDF,0x20, // and mask, xor mask ! 819: ! 820: OB, // misc. register ! 821: MISC_OUTPUT_REG_WRITE_PORT, ! 822: 0xEF, ! 823: ! 824: OW, // text/graphics bit ! 825: GRAPH_ADDRESS_PORT, ! 826: 0x506, ! 827: ! 828: OW, // end sync reset ! 829: SEQ_ADDRESS_PORT, ! 830: 0x300, ! 831: ! 832: OW, // unprotect crtc 0-7 ! 833: CRTC_ADDRESS_PORT_COLOR, ! 834: 0x2011, ! 835: ! 836: METAOUT+INDXOUT, // program crtc registers ! 837: CRTC_ADDRESS_PORT_COLOR, ! 838: 28,0, // count, startindex ! 839: 0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, ! 840: 0x24, 0xFD, 0x00, 0x60, 0x00, 0x00, ! 841: 0x00, 0x00, 0x00, 0x00, 0x02, 0x88, ! 842: 0xFF, 0x80, 0x00, 0x00, 0x24, 0xe3, ! 843: 0xff, 0x4A, 0x00, 0x22, ! 844: ! 845: METAOUT+INDXOUT, // program gdc registers ! 846: GRAPH_ADDRESS_PORT, ! 847: 9,0, // count, startindex ! 848: 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, ! 849: 0x05, 0x0F, 0xFF, ! 850: ! 851: IB, // prepare atc for writing ! 852: INPUT_STATUS_1_COLOR, ! 853: ! 854: METAOUT+ATCOUT, // program atc registers ! 855: ATT_ADDRESS_PORT, ! 856: 21,0, // count, startindex ! 857: 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, ! 858: 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, ! 859: 0x0C, 0x0D, 0x0E, 0x0F, 0x41, 0x00, ! 860: 0x0F, 0x00, 0x00, ! 861: ! 862: OB, // turn video on. ! 863: ATT_ADDRESS_PORT, ! 864: 0x20, ! 865: ! 866: OB, ! 867: DAC_PIXEL_MASK_PORT, ! 868: 0xFF, ! 869: ! 870: #endif ! 871: OWM, ! 872: GRAPH_ADDRESS_PORT, ! 873: 3, ! 874: #if ONE_64K_BANK ! 875: 0x0009, 0x000a, 0x000b, ! 876: #endif ! 877: #if TWO_32K_BANKS ! 878: 0x0009, 0x000a, 0x010b, ! 879: #endif ! 880: ! 881: EOD ! 882: }; ! 883: ! 884:
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