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Annotation of ntddk/src/video/miniport/et4000/et4000.h, revision 1.1

1.1     ! root        1: /*++
        !             2: 
        !             3: Copyright (c) 1992  Microsoft Corporation
        !             4: 
        !             5: Module Name:
        !             6: 
        !             7:     et4000.h
        !             8: 
        !             9: Abstract:
        !            10: 
        !            11:     This module contains the definitions for the code that implements the
        !            12:     tseng et4000 device driver.
        !            13: 
        !            14: Environment:
        !            15: 
        !            16:     Kernel mode
        !            17: 
        !            18: Revision History:
        !            19: 
        !            20: 
        !            21: --*/
        !            22: 
        !            23: #ifndef NO_INT10_MODE_SET
        !            24: #define INT10_MODE_SET 1
        !            25: #endif
        !            26: 
        !            27: //
        !            28: // Do full save and restore.
        !            29: //
        !            30: 
        !            31: #define EXTENDED_REGISTER_SAVE_RESTORE 1
        !            32: 
        !            33: //
        !            34: // BIOS Variables
        !            35: //
        !            36: 
        !            37: #define BIOS_INFO_1 0x488
        !            38: #define PRODESIGNER_BIOS_INFO 0x4E8
        !            39: 
        !            40: //
        !            41: // Define type of ET4000 boards
        !            42: //
        !            43: 
        !            44: typedef enum _BOARD_TYPE {
        !            45:     SPEEDSTARPLUS = 1,
        !            46:     SPEEDSTAR24,
        !            47:     SPEEDSTAR,
        !            48:     PRODESIGNERIIS,
        !            49:     TSENG3000,
        !            50:     TSENG4000,
        !            51:     TSENG4000W32,    
        !            52:     OTHER
        !            53: } BOARD_TYPE;
        !            54: 
        !            55: 
        !            56: //
        !            57: // Base address of VGA memory range.  Also used as base address of VGA
        !            58: // memory when loading a font, which is done with the VGA mapped at A0000.
        !            59: //
        !            60: 
        !            61: #define MEM_VGA      0xA0000
        !            62: #define MEM_VGA_SIZE 0x20000
        !            63: 
        !            64: //
        !            65: // Port definitions for filling the ACCSES_RANGES structure in the miniport
        !            66: // information, defines the range of I/O ports the VGA spans.
        !            67: // There is a break in the IO ports - a few ports are used for the parallel
        !            68: // port. Those cannot be defined in the ACCESS_RANGE, but are still mapped
        !            69: // so all VGA ports are in one address range.
        !            70: //
        !            71: 
        !            72: #define VGA_BASE_IO_PORT      0x000003B0
        !            73: #define VGA_START_BREAK_PORT  0x000003BB
        !            74: #define VGA_END_BREAK_PORT    0x000003C0
        !            75: #define VGA_MAX_IO_PORT       0x000003DF
        !            76: 
        !            77: 
        !            78: //
        !            79: // VGA register definitions
        !            80: //
        !            81:                                             // ports in monochrome mode
        !            82: #define CRTC_ADDRESS_PORT_MONO      0x0004  // CRT Controller Address and
        !            83: #define CRTC_DATA_PORT_MONO         0x0005  // Data registers in mono mode
        !            84: #define MODE_CONTROL_PORT_MONO      0x0008  // Tseng Mode Control port, used
        !            85:                                             //  here only for unlocking the
        !            86:                                             //  key so we can get at extended
        !            87:                                             //  registers
        !            88: #define FEAT_CTRL_WRITE_PORT_MONO   0x000A  // Feature Control write port
        !            89:                                             // in mono mode
        !            90: #define INPUT_STATUS_1_MONO         0x000A  // Input Status 1 register read
        !            91:                                             // port in mono mode
        !            92: #define ATT_INITIALIZE_PORT_MONO    INPUT_STATUS_1_MONO
        !            93:                                             // Register to read to reset
        !            94:                                             // Attribute Controller index/data
        !            95:                                             // toggle in mono mode
        !            96: #define HERCULES_COMPATIBILITY_PORT 0x00F   // used to unlock Tseng key to
        !            97:                                             //  get at extended ports
        !            98: 
        !            99: #define ATT_ADDRESS_PORT            0x0010  // Attribute Controller Address and
        !           100: #define ATT_DATA_WRITE_PORT         0x0010  // Data registers share one port
        !           101:                                             // for writes, but only Address is
        !           102:                                             // readable at 0x010
        !           103: #define ATT_DATA_READ_PORT          0x0011  // Attribute Controller Data reg is
        !           104:                                             // readable here
        !           105: #define MISC_OUTPUT_REG_WRITE_PORT  0x0012  // Miscellaneous Output reg write
        !           106:                                             // port
        !           107: #define INPUT_STATUS_0_PORT         0x0012  // Input Status 0 register read
        !           108:                                             // port
        !           109: #define VIDEO_SUBSYSTEM_ENABLE_PORT 0x0013  // Bit 0 enables/disables the
        !           110:                                             // entire VGA subsystem
        !           111: #define SEQ_ADDRESS_PORT            0x0014  // Sequence Controller Address and
        !           112: #define SEQ_DATA_PORT               0x0015  // Data registers
        !           113: #define DAC_PIXEL_MASK_PORT         0x0016  // DAC pixel mask reg
        !           114: #define DAC_ADDRESS_READ_PORT       0x0017  // DAC register read index reg,
        !           115:                                             // write-only
        !           116: #define DAC_STATE_PORT              0x0017  // DAC state (read/write),
        !           117:                                             // read-only
        !           118: #define DAC_ADDRESS_WRITE_PORT      0x0018  // DAC register write index reg
        !           119: #define DAC_DATA_REG_PORT           0x0019  // DAC data transfer reg
        !           120: #define FEAT_CTRL_READ_PORT         0x001A  // Feature Control read port
        !           121: #define MISC_OUTPUT_REG_READ_PORT   0x001C  // Miscellaneous Output reg read
        !           122:                                             // port
        !           123: #define SEGMENT_SELECT_PORT         0x001D  // Tseng banking control register
        !           124: #define SEGMENT_SELECT_HIGH         0x001B  // Tseng W32 SegSel extension
        !           125: #define GRAPH_ADDRESS_PORT          0x001E  // Graphics Controller Address
        !           126: #define GRAPH_DATA_PORT             0x001F  // and Data registers
        !           127: 
        !           128:                                             // ports in color mode
        !           129: #define CRTC_ADDRESS_PORT_COLOR     0x0024  // CRT Controller Address and
        !           130: #define CRTC_DATA_PORT_COLOR        0x0025  // Data registers in color mode
        !           131: #define MODE_CONTROL_PORT_COLOR     0x0028  // Tseng Mode Control port, used
        !           132:                                             //  here only for unlocking the
        !           133:                                             //  key so we can get at extended
        !           134:                                             //  registers
        !           135: #define FEAT_CTRL_WRITE_PORT_COLOR  0x002A  // Feature Control write port
        !           136: #define INPUT_STATUS_1_COLOR        0x002A  // Input Status 1 register read
        !           137:                                             // port in color mode
        !           138: #define ATT_INITIALIZE_PORT_COLOR   INPUT_STATUS_1_COLOR
        !           139:                                             // Register to read to reset
        !           140:                                             // Attribute Controller index/data
        !           141:                                             // toggle in color mode
        !           142: //
        !           143: // Offsets in HardwareStateHeader->PortValue[] of save areas for non-indexed
        !           144: // VGA registers.
        !           145: //
        !           146: 
        !           147: #define CRTC_ADDRESS_MONO_OFFSET      0x04
        !           148: #define FEAT_CTRL_WRITE_MONO_OFFSET   0x0A
        !           149: #define ATT_ADDRESS_OFFSET            0x10
        !           150: #define MISC_OUTPUT_REG_WRITE_OFFSET  0x12
        !           151: #define VIDEO_SUBSYSTEM_ENABLE_OFFSET 0x13
        !           152: #define SEQ_ADDRESS_OFFSET            0x14
        !           153: #define DAC_PIXEL_MASK_OFFSET         0x16
        !           154: #define DAC_STATE_OFFSET              0x17
        !           155: #define DAC_ADDRESS_WRITE_OFFSET      0x18
        !           156: #define GRAPH_ADDRESS_OFFSET          0x1E
        !           157: #define CRTC_ADDRESS_COLOR_OFFSET     0x24
        !           158: #define FEAT_CTRL_WRITE_COLOR_OFFSET  0x2A
        !           159:                                                                                                                   // toggle in color mode
        !           160: //
        !           161: // VGA indexed register indexes.
        !           162: //
        !           163: 
        !           164: #define IND_CURSOR_START        0x0A    // index in CRTC of the Cursor Start
        !           165: #define IND_CURSOR_END          0x0B    //  and End registers
        !           166: #define IND_CURSOR_HIGH_LOC     0x0E    // index in CRTC of the Cursor Location
        !           167: #define IND_CURSOR_LOW_LOC      0x0F    //  High and Low Registers
        !           168: #define IND_VSYNC_END           0x11    // index in CRTC of the Vertical Sync
        !           169:                                         //  End register, which has the bit
        !           170:                                         //  that protects/unprotects CRTC
        !           171:                                         //  index registers 0-7
        !           172: #define IND_SET_RESET_ENABLE    0x01    // index of Set/Reset Enable reg in GC
        !           173: #define IND_DATA_ROTATE         0x03    // index of Data Rotate reg in GC
        !           174: #define IND_READ_MAP            0x04    // index of Read Map reg in Graph Ctlr
        !           175: #define IND_GRAPH_MODE          0x05    // index of Mode reg in Graph Ctlr
        !           176: #define IND_GRAPH_MISC          0x06    // index of Misc reg in Graph Ctlr
        !           177: #define IND_BIT_MASK            0x08    // index of Bit Mask reg in Graph Ctlr
        !           178: #define IND_SYNC_RESET          0x00    // index of Sync Reset reg in Seq
        !           179: #define IND_MAP_MASK            0x02    // index of Map Mask in Sequencer
        !           180: #define IND_MEMORY_MODE         0x04    // index of Memory Mode reg in Seq
        !           181: #define IND_STATE_CONTROL       0x06    // index of TS State Control reg in Seq
        !           182: #define IND_TS_AUX_MODE         0x07    // index of TS Aux Mode reg in Seq
        !           183: #define IND_CRTC_PROTECT        0x11    // index of reg containing regs 0-7 in
        !           184:                                         //  CRTC
        !           185: #define IND_RAS_CAS_CONFIG      0x32    // index of RAS/CAS Config reg in CRTC
        !           186: #define IND_EXT_START_ADDR      0x33    // index of Extended Start Address reg
        !           187:                                         //  in CRTC
        !           188: #define IND_CRTC_COMPAT         0x34    // index of CRTC Compatibility reg
        !           189:                                         //  in CRTC
        !           190: #define IND_OFLOW_HIGH          0x35    // index of Overflow High reg in CRTC
        !           191: #define IND_VID_SYS_CONFIG_1    0x36    // index of Video System Configuration
        !           192: #define IND_VID_SYS_CONFIG_2    0x37    //  1 & 2 registers in CRTC
        !           193: #define IND_ATC_MISC            0x16    // index of Miscellaneous reg in ATC
        !           194: 
        !           195: #define START_SYNC_RESET_VALUE  0x01    // value for Sync Reset reg to start
        !           196:                                         //  synchronous reset
        !           197: #define END_SYNC_RESET_VALUE    0x03    // value for Sync Reset reg to end
        !           198:                                         //  synchronous reset
        !           199: 
        !           200: #define UNLOCK_KEY_1            0x03    // value to output to Herc Compat
        !           201:                                         //  register as first step in unlocking
        !           202:                                         //  key so Tseng registers can be set
        !           203: #define UNLOCK_KEY_2            0xA0    // value to output to Mode Control Port
        !           204:                                         //  register as 2nd step in unlocking
        !           205:                                         //  key so Tseng registers can be set
        !           206: #define LOCK_KEY_1              0x00    // value to output to Herc Compat
        !           207:                                         //  register as first step in locking
        !           208:                                         //  key so Tseng registers can't be set
        !           209: #define LOCK_KEY_2              0x00    // value to output to Mode Control Port
        !           210:                                         //  register as 2nd step in locking
        !           211:                                         //  key so Tseng registers can't be set
        !           212: #define HERCULES_COMPATIBILITY_DEFAULT 0x00
        !           213:                                         // value to output to Herc Compat
        !           214:                                         //  register to put back to MDA
        !           215:                                         //  compatibility
        !           216: 
        !           217: #define MODE_CONTROL_PORT_COLOR_DEFAULT 0x00
        !           218: #define MODE_CONTROL_PORT_MONO_DEFAULT 0x00
        !           219:                                         // values to output to CGA and MDA mode
        !           220:                                         //  registers to put to default state
        !           221:                                         //  (video disabled).
        !           222: 
        !           223: //
        !           224: // Values for Attribute Controller Index register to turn video off
        !           225: // and on, by setting bit 5 to 0 (off) or 1 (on).
        !           226: //
        !           227: 
        !           228: #define VIDEO_DISABLE 0
        !           229: #define VIDEO_ENABLE  0x20
        !           230: 
        !           231: // Masks to keep only the significant bits of the Graphics Controller and
        !           232: // Sequencer Address registers. Masking is necessary because some VGAs, such
        !           233: // as S3-based ones, don't return unused bits set to 0, and some SVGAs use
        !           234: // these bits if extensions are enabled.
        !           235: //
        !           236: 
        !           237: #define GRAPH_ADDR_MASK 0x0F
        !           238: #define SEQ_ADDR_MASK   0x07
        !           239: 
        !           240: //
        !           241: // Mask used to toggle Chain4 bit in the Sequencer's Memory Mode register.
        !           242: //
        !           243: 
        !           244: #define CHAIN4_MASK 0x08
        !           245: 
        !           246: //
        !           247: // Value written to the Read Map register when identifying the existence of
        !           248: // a VGA in VgaInitialize. This value must be different from the final test
        !           249: // value written to the Bit Mask in that routine.
        !           250: //
        !           251: 
        !           252: #define READ_MAP_TEST_SETTING 0x03
        !           253: 
        !           254: //
        !           255: // Default text mode setting for various registers, used to restore their
        !           256: // states if VGA detection fails after they've been modified.
        !           257: //
        !           258: 
        !           259: #define MEMORY_MODE_TEXT_DEFAULT 0x02
        !           260: #define BIT_MASK_DEFAULT 0xFF
        !           261: #define READ_MAP_DEFAULT 0x00
        !           262: 
        !           263: //
        !           264: // Palette-related info.
        !           265: //
        !           266: 
        !           267: //
        !           268: // Highest valid DAC color register index.
        !           269: //
        !           270: 
        !           271: #define VIDEO_MAX_COLOR_REGISTER  0xFF
        !           272: 
        !           273: //
        !           274: // Highest valid palette register index
        !           275: //
        !           276: 
        !           277: #define VIDEO_MAX_PALETTE_REGISTER 0x0F
        !           278: 
        !           279: 
        !           280: //
        !           281: // Indices for type of memory mapping; used in ModesVGA[], must match
        !           282: // MemoryMap[].
        !           283: //
        !           284: 
        !           285: typedef enum _VIDEO_MEMORY_MAP {
        !           286:     MemMap_Mono,
        !           287:     MemMap_CGA,
        !           288:     MemMap_VGA
        !           289: } VIDEO_MEMORY_MAP, *PVIDEO_MEMORY_MAP;
        !           290: 
        !           291: //
        !           292: // For a mode, the type of banking supported. Controls the information
        !           293: // returned in VIDEO_BANK_SELECT. PlanarHCBanking includes NormalBanking.
        !           294: //
        !           295: 
        !           296: typedef enum _BANK_TYPE {
        !           297:     NoBanking = 0,
        !           298:     NormalBanking,
        !           299:     PlanarHCBanking
        !           300: } BANK_TYPE, *PBANK_TYPE;
        !           301: 
        !           302: 
        !           303: //
        !           304: // Structure used to describe each video mode in ModesVGA[].
        !           305: //
        !           306: 
        !           307: typedef struct {
        !           308:     USHORT  fbType; // color or monochrome, text or graphics, via
        !           309:                     //  VIDEO_MODE_COLOR and VIDEO_MODE_GRAPHICS
        !           310:     USHORT  numPlanes;    // # of video memory planes
        !           311:     USHORT  bitsPerPlane; // # of bits of color in each plane
        !           312:     SHORT   col;    // # of text columns across screen with default font
        !           313: 
        !           314:     SHORT   row;    // # of text rows down screen with default font
        !           315:     USHORT  hres;   // # of pixels across screen
        !           316:     USHORT  vres;   // # of scan lines down screen
        !           317:     USHORT  wbytes; // # of bytes from start of one scan line to start of next
        !           318:     ULONG   sbytes; // total size of addressable display memory in bytes
        !           319:     ULONG   Frequency;  // Vertical Frequency
        !           320:     ULONG   Interlaced; // Determines if the mode is interlaced or not
        !           321:     BANK_TYPE banktype; // NoBanking, NormalBanking, PlanarHCBanking
        !           322:     VIDEO_MEMORY_MAP   MemMap; // index from VIDEO_MEMORY_MAP of memory
        !           323:                                //  mapping used by this mode
        !           324:     BOOLEAN ValidMode;  // Determines which modes are valid.    
        !           325: #ifdef INT10_MODE_SET
        !           326:     ULONG   Int10ModeNumber;   // Mode number via Int 10
        !           327: #endif
        !           328:     PUSHORT CmdStrings;   // pointer to array of register-setting commands
        !           329: } VIDEOMODE, *PVIDEOMODE;
        !           330: 
        !           331: 
        !           332: //
        !           333: // Mode into which to put the VGA before starting a VDM, so it's a plain
        !           334: // vanilla VGA.  (This is the mode's index in ModesVGA[], currently standard
        !           335: // 80x25 text mode.)
        !           336: //
        !           337: 
        !           338: #define DEFAULT_MODE 0
        !           339: 
        !           340: 
        !           341: //
        !           342: // Info used by the Validator functions and save/restore code.
        !           343: // Structure used to trap register accesses that must be done atomically.
        !           344: //
        !           345: 
        !           346: 
        !           347: //
        !           348: // Number of each type of indexed register in a standard VGA, used by
        !           349: // validator and state save/restore functions.
        !           350: //
        !           351: // Note: VDMs currently only support basic VGAs only.
        !           352: //
        !           353: 
        !           354: #define VGA_NUM_SEQUENCER_PORTS     5
        !           355: #define VGA_NUM_CRTC_PORTS         25
        !           356: #define VGA_NUM_GRAPH_CONT_PORTS    9
        !           357: #define VGA_NUM_ATTRIB_CONT_PORTS  21
        !           358: #define VGA_NUM_DAC_ENTRIES       256
        !           359: 
        !           360: #ifdef EXTENDED_REGISTER_SAVE_RESTORE
        !           361: 
        !           362: //
        !           363: // Indices to start save/restore in extension registers:
        !           364: // For both chip types
        !           365: 
        !           366: #define ET4000_SEQUENCER_EXT_START     0x06
        !           367: #define ET4000_SEQUENCER_EXT_END       0x07
        !           368: 
        !           369: #define ET4000_CRTC_EXT_START          0x31
        !           370: #define ET4000_CRTC_EXT_END            0x37
        !           371: #define ET4000_CRTC_1_EXT_START        0x3F
        !           372: #define ET4000_CRTC_1_EXT_END          0x3F
        !           373: 
        !           374: #define ET4000_ATTRIB_EXT_START        0x16
        !           375: #define ET4000_ATTRIB_EXT_END          0x16
        !           376: 
        !           377: //
        !           378: // Number of extended regs for both chip types.
        !           379: //
        !           380: 
        !           381: #define ET4000_NUM_SEQUENCER_EXT_PORTS (ET4000_SEQUENCER_EXT_END - ET4000_SEQUENCER_EXT_START + 1)
        !           382: #define ET4000_NUM_CRTC_EXT_PORTS      (ET4000_CRTC_EXT_END - ET4000_CRTC_EXT_START + 1) + \
        !           383:                                        (ET4000_CRTC_1_EXT_END - ET4000_CRTC_1_EXT_START + 1)
        !           384: #define ET4000_NUM_ATTRIB_EXT_PORTS    (ET4000_ATTRIB_EXT_END - ET4000_ATTRIB_EXT_START + 1)
        !           385: 
        !           386: //
        !           387: // set values for save/restore area based on largest value for a chipset.
        !           388: //
        !           389: 
        !           390: #define EXT_NUM_GRAPH_CONT_PORTS    0
        !           391: #define EXT_NUM_SEQUENCER_PORTS     ET4000_NUM_SEQUENCER_EXT_PORTS
        !           392: #define EXT_NUM_CRTC_PORTS          ET4000_NUM_CRTC_EXT_PORTS
        !           393: #define EXT_NUM_ATTRIB_CONT_PORTS   ET4000_NUM_ATTRIB_EXT_PORTS
        !           394: #define EXT_NUM_DAC_ENTRIES         0
        !           395: 
        !           396: #else 
        !           397: 
        !           398: #define EXT_NUM_GRAPH_CONT_PORTS    0
        !           399: #define EXT_NUM_SEQUENCER_PORTS     0
        !           400: #define EXT_NUM_CRTC_PORTS          0
        !           401: #define EXT_NUM_ATTRIB_CONT_PORTS   0
        !           402: #define EXT_NUM_DAC_ENTRIES         0
        !           403: 
        !           404: #endif        
        !           405: 
        !           406: 
        !           407: #define VGA_MAX_VALIDATOR_DATA       100
        !           408: 
        !           409: #define VGA_VALIDATOR_UCHAR_ACCESS   1
        !           410: #define VGA_VALIDATOR_USHORT_ACCESS  2
        !           411: #define VGA_VALIDATOR_ULONG_ACCESS   3
        !           412: 
        !           413: typedef struct _VGA_VALIDATOR_DATA {
        !           414:    ULONG Port;
        !           415:    UCHAR AccessType;
        !           416:    ULONG Data;
        !           417: } VGA_VALIDATOR_DATA, *PVGA_VALIDATOR_DATA;
        !           418: 
        !           419: //
        !           420: // Number of bytes to save in each plane.
        !           421: //
        !           422: 
        !           423: #define VGA_PLANE_SIZE 0x10000
        !           424: 
        !           425: //
        !           426: // These constants determine the offsets within the
        !           427: // VIDEO_HARDWARE_STATE_HEADER structure that are used to save and
        !           428: // restore the VGA's state.
        !           429: //
        !           430: 
        !           431: #define VGA_HARDWARE_STATE_SIZE sizeof(VIDEO_HARDWARE_STATE_HEADER)
        !           432: 
        !           433: #define VGA_BASIC_SEQUENCER_OFFSET (VGA_HARDWARE_STATE_SIZE + 0)
        !           434: #define VGA_BASIC_CRTC_OFFSET (VGA_BASIC_SEQUENCER_OFFSET + \
        !           435:          VGA_NUM_SEQUENCER_PORTS)
        !           436: #define VGA_BASIC_GRAPH_CONT_OFFSET (VGA_BASIC_CRTC_OFFSET + \
        !           437:          VGA_NUM_CRTC_PORTS)
        !           438: #define VGA_BASIC_ATTRIB_CONT_OFFSET (VGA_BASIC_GRAPH_CONT_OFFSET + \
        !           439:          VGA_NUM_GRAPH_CONT_PORTS)
        !           440: #define VGA_BASIC_DAC_OFFSET (VGA_BASIC_ATTRIB_CONT_OFFSET + \
        !           441:          VGA_NUM_ATTRIB_CONT_PORTS)
        !           442: #define VGA_BASIC_LATCHES_OFFSET (VGA_BASIC_DAC_OFFSET + \
        !           443:          (3 * VGA_NUM_DAC_ENTRIES))
        !           444: 
        !           445: #define VGA_EXT_SEQUENCER_OFFSET (VGA_BASIC_LATCHES_OFFSET + 4)
        !           446: #define VGA_EXT_CRTC_OFFSET (VGA_EXT_SEQUENCER_OFFSET + \
        !           447:          EXT_NUM_SEQUENCER_PORTS)
        !           448: #define VGA_EXT_GRAPH_CONT_OFFSET (VGA_EXT_CRTC_OFFSET + \
        !           449:          EXT_NUM_CRTC_PORTS)
        !           450: #define VGA_EXT_ATTRIB_CONT_OFFSET (VGA_EXT_GRAPH_CONT_OFFSET +\
        !           451:          EXT_NUM_GRAPH_CONT_PORTS)
        !           452: #define VGA_EXT_DAC_OFFSET (VGA_EXT_ATTRIB_CONT_OFFSET + \
        !           453:          EXT_NUM_ATTRIB_CONT_PORTS)
        !           454: 
        !           455: #define VGA_VALIDATOR_OFFSET (VGA_EXT_DAC_OFFSET + 4 * EXT_NUM_DAC_ENTRIES)
        !           456: 
        !           457: #define VGA_VALIDATOR_AREA_SIZE  sizeof (ULONG) + (VGA_MAX_VALIDATOR_DATA * \
        !           458:                                  sizeof (VGA_VALIDATOR_DATA)) +             \
        !           459:                                  sizeof (ULONG) +                           \
        !           460:                                  sizeof (ULONG) +                           \
        !           461:                                  sizeof (PVIDEO_ACCESS_RANGE)
        !           462: 
        !           463: #define VGA_MISC_DATA_AREA_OFFSET VGA_VALIDATOR_OFFSET + VGA_VALIDATOR_AREA_SIZE
        !           464: 
        !           465: #define VGA_MISC_DATA_AREA_SIZE  0
        !           466: 
        !           467: #define VGA_PLANE_0_OFFSET VGA_MISC_DATA_AREA_OFFSET + VGA_MISC_DATA_AREA_SIZE
        !           468: 
        !           469: #define VGA_PLANE_1_OFFSET VGA_PLANE_0_OFFSET + VGA_PLANE_SIZE
        !           470: #define VGA_PLANE_2_OFFSET VGA_PLANE_1_OFFSET + VGA_PLANE_SIZE
        !           471: #define VGA_PLANE_3_OFFSET VGA_PLANE_2_OFFSET + VGA_PLANE_SIZE
        !           472: 
        !           473: //
        !           474: // Space needed to store all state data.
        !           475: //
        !           476: 
        !           477: #define VGA_TOTAL_STATE_SIZE VGA_PLANE_3_OFFSET + VGA_PLANE_SIZE
        !           478: 
        !           479: 
        !           480: //
        !           481: // Device extension for the driver object.  This data is only used
        !           482: // locally, so this structure can be added to as needed.
        !           483: //
        !           484: 
        !           485: typedef struct _HW_DEVICE_EXTENSION {
        !           486: 
        !           487:     PUCHAR  IOAddress;            // base I/O address of VGA ports
        !           488:     PVOID   VideoMemoryAddress;   // base virtual memory address of VGA memory
        !           489:     ULONG   AdapterMemorySize;    // size, in bytes, of the memory on the
        !           490:                                   // board.
        !           491:     ULONG   ModeIndex;            // index of current mode in ModesVGA[]
        !           492:     ULONG   NumAvailableModes;    // number of valid modes on this device
        !           493:     PVIDEOMODE  CurrentMode;      // pointer to VIDEOMODE structure for
        !           494:                                   // current mode.
        !           495: 
        !           496:     USHORT  FontPelColumns;       // Width of the font in pels
        !           497:     USHORT  FontPelRows;          // height of the font in pels
        !           498: 
        !           499:     VIDEO_CURSOR_POSITION CursorPosition;  // current cursor position
        !           500: 
        !           501:                                  
        !           502:     UCHAR CursorEnable;           // whether cursor is enabled or not
        !           503:     UCHAR CursorTopScanLine;      // Cursor Start register setting (top scan)
        !           504:     UCHAR CursorBottomScanLine;   // Cursor End register setting (bottom scan)
        !           505: 
        !           506:     UCHAR BoardID;                // Used to Identify Diamond boards
        !           507: 
        !           508:     PHYSICAL_ADDRESS PhysicalVideoMemoryBase; // physical memory address and
        !           509:     ULONG PhysicalVideoMemoryLength;          // length of display memory
        !           510:     PHYSICAL_ADDRESS PhysicalFrameBase;  // physical memory address and
        !           511:     ULONG PhysicalFrameLength;           // length of display memory for the
        !           512:                                          // current mode.
        !           513: 
        !           514:     PUSHORT BiosArea;             // address of the BIOS area
        !           515:     USHORT OriginalBiosData;       // Orignal value in the Bios data area.
        !           516: 
        !           517:     //
        !           518:     // These 4 fields must be at the end of the device extension and must be
        !           519:     // kept in this order since this data will be copied to and from the save
        !           520:     // state buffer that is passed to and from the VDM.
        !           521:     //
        !           522: 
        !           523:     ULONG TrappedValidatorCount;   // number of entries in the Trapped
        !           524:                                    // validator data Array.
        !           525:     VGA_VALIDATOR_DATA TrappedValidatorData[VGA_MAX_VALIDATOR_DATA];
        !           526:                                    // Data trapped by the validator routines
        !           527:                                    // but not yet played back into the VGA
        !           528:                                    // register.
        !           529: 
        !           530:     ULONG SequencerAddressValue;   // Determines if the Sequencer Address Port
        !           531:                                    // is currently selecting the SyncReset data
        !           532:                                    // register.
        !           533: 
        !           534:     ULONG CurrentNumVdmAccessRanges;           // Number of access ranges in
        !           535:                                                // the access range array pointed
        !           536:                                                // to by the next field
        !           537:     PVIDEO_ACCESS_RANGE CurrentVdmAccessRange; // Access range currently
        !           538:                                                // associated to the VDM
        !           539: 
        !           540: } HW_DEVICE_EXTENSION, *PHW_DEVICE_EXTENSION;
        !           541: 
        !           542: 
        !           543: //
        !           544: // Function prototypes.
        !           545: //
        !           546: 
        !           547: //
        !           548: // Entry points for the VGA validator. Used in VgaEmulatorAccessEntries[].
        !           549: //
        !           550: 
        !           551: VP_STATUS
        !           552: VgaValidatorUcharEntry (
        !           553:     ULONG Context,
        !           554:     ULONG Port,
        !           555:     UCHAR AccessMode,
        !           556:     PUCHAR Data
        !           557:     );
        !           558: 
        !           559: VP_STATUS
        !           560: VgaValidatorUshortEntry (
        !           561:     ULONG Context,
        !           562:     ULONG Port,
        !           563:     UCHAR AccessMode,
        !           564:     PUSHORT Data
        !           565:     );
        !           566: 
        !           567: VP_STATUS
        !           568: VgaValidatorUlongEntry (
        !           569:     ULONG Context,
        !           570:     ULONG Port,
        !           571:     UCHAR AccessMode,
        !           572:     PULONG Data
        !           573:     );
        !           574: 
        !           575: BOOLEAN
        !           576: VgaPlaybackValidatorData (
        !           577:     PVOID Context
        !           578:     );
        !           579: 
        !           580: //
        !           581: // Bank switch code start and end labels, define in HARDWARE.ASM
        !           582: //
        !           583: 
        !           584: extern UCHAR BankSwitchStart;
        !           585: extern UCHAR PlanarHCBankSwitchStart;
        !           586: extern UCHAR EnablePlanarHCStart;
        !           587: extern UCHAR DisablePlanarHCStart;
        !           588: extern UCHAR BankSwitchEnd;
        !           589: 
        !           590: //
        !           591: // Vga init scripts for font loading
        !           592: //
        !           593: 
        !           594: extern USHORT EnableA000Data[];
        !           595: extern USHORT DisableA000Color[];
        !           596: 
        !           597: 
        !           598: //
        !           599: // functions used in both modules.
        !           600: //
        !           601: 
        !           602: VOID
        !           603: UnlockET4000ExtendedRegs(
        !           604:     PHW_DEVICE_EXTENSION HwDeviceExtension
        !           605:     );
        !           606: 
        !           607: VOID
        !           608: LockET4000ExtendedRegs(
        !           609:     PHW_DEVICE_EXTENSION HwDeviceExtension
        !           610:     );

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