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Annotation of os2sdk/demos/apps/mandel/ega.inc, revision 1.1

1.1     ! root        1: ;***************************************************************************
        !             2: ;                                                                         *
        !             3: ;              Copyright (C) 1984-1986 by Microsoft Inc.                  *
        !             4: ;                                                                         *
        !             5: ;***************************************************************************
        !             6: 
        !             7: 
        !             8: 
        !             9: ;      EGA Register Definitions.
        !            10: ;
        !            11: ;      The following definitions are the EGA registers and values
        !            12: ;      used by this driver.  All other registers are set up by
        !            13: ;      the BIOS and never altered (except the palette registers
        !            14: ;      which are set with a BIOS call).
        !            15: ;
        !            16: ;      After careful examination of the Initial EGA registers for
        !            17: ;      the two modes supported by the driver (640x200 8 color and
        !            18: ;      640x350 8 color with at least 128K RAM), all unspecified
        !            19: ;      bits in the following registers were found to be 0.
        !            20: 
        !            21: 
        !            22: 
        !            23: ;      Sequencer Registers Used
        !            24: 
        !            25: rSequencer     equ     03C4h           ;Sequencer Address Register
        !            26: 
        !            27:   rMapMask     equ     02h             ;Plane Write Enable Mask
        !            28:     C0         equ     00000001b       ;Plane C0
        !            29:     C1         equ     00000010b       ;Plane C1
        !            30:     C2         equ     00000100b       ;Plane C2
        !            31:     C3         equ     00001000b       ;Plane C3
        !            32: 
        !            33: rMisc          equ     03c2h           ;Misc Output Register
        !            34: rCrtc          equ     03d4h           ;CRTC controller register
        !            35:  rSahr         equ     0ch             ;start address high register
        !            36:  rSalr         equ     0dh             ;start address low register
        !            37: 
        !            38: rAttread       equ     03dah           ;Attribute read register
        !            39:   mDEnable     equ     1               ;display enable
        !            40:   mLPStrobe    equ     2               ;light pen strobe
        !            41:   mLPSwitch    equ     4               ;light pen switch
        !            42:   mVRetrace    equ     8               ;vertical retrace
        !            43: 
        !            44: 
        !            45: rAttwrite      equ     03c0h           ;Attribute write register
        !            46: rGraphics1     equ     03cch           ;Graphics register 1
        !            47: rGraphics2     equ     03cah           ;Graphics register 2
        !            48: 
        !            49: 
        !            50: ;      Graphics Controller Registers Used
        !            51: 
        !            52: rGraphics      equ     03CEh           ;Graphics Controller Address Register
        !            53: 
        !            54:   rEnableSR    equ     01h             ;Set/Reset Enable
        !            55: 
        !            56:   rColorComp   equ     02h             ;Color Compare Register
        !            57:    ccColor     equ     00000111b       ;  Color goes in these three bits
        !            58: 
        !            59:   rDataRotate  equ     03h             ;Data Rotate Register
        !            60:    drRotCnt    equ     00000111b       ;  Data Rotate Count
        !            61:    drSET       equ     00000000b       ;  Data Unmodified
        !            62:    drAND       equ     00001000b       ;  Data ANDed with latches
        !            63:    drOR        equ     00010000b       ;  Data ORed  with latches
        !            64:    drXOR       equ     00011000b       ;  Data XORed with latches
        !            65: 
        !            66:  rReadMap      equ     04h             ;Read Map Select Register
        !            67:    rmC0        equ     00000000b
        !            68:    rmC1        equ     00000001b
        !            69:    rmC2        equ     00000010b
        !            70:    rmC3        equ     00000011b
        !            71: ;  rmRed       equ     00000000b       ;  Read red   plane
        !            72: ;  rmGreen     equ     00000001b       ;  Read green plane
        !            73: ;  rmBlue      equ     00000010b       ;  Read blue  plane
        !            74: 
        !            75: rMode          equ     05h             ;Mode Register
        !            76:   mProcWrite   equ     00000000b       ;  Write processor data rotated
        !            77:   mLatchWrite  equ     00000001b       ;  Write latched data
        !            78:   mColorWrite  equ     00000010b       ;  Write processor data as color
        !            79:   mDataRead    equ     00000000b       ;  Read selected plane
        !            80:   mColorRead   equ     00001000b       ;  Read color compare
        !            81: 
        !            82: rColorDontCare equ     07h             ;Color Don't Care Register
        !            83: 
        !            84: 
        !            85: ;      Note that the Bit Mask Register works by writting 0 bits
        !            86: ;      in the Bit Mask Register with the data in the processor
        !            87: ;      latches.  This will require some critical section code
        !            88: ;      to prevent the cursor from destroying the latched data.
        !            89: 
        !            90: rBitMask       equ     08h             ;Bit Mask Register
        !            91: 
        !            92: 
        !            93: 
        !            94: 
        !            95: 
        !            96: 
        !            97: ;      The EGA Flags are used to indiate to the cursor code what
        !            98: ;      information is valid in the shadow registers:
        !            99: ;
        !           100: ;          All  - All shadow registers need to be restored
        !           101: ;
        !           102: ;          Most - All but the MapMask needs to be restored.  The
        !           103: ;                 cursor code leaves the MapMask set for all three
        !           104: ;                 planes on exit if this is set.
        !           105: ;
        !           106: ;          Some - The MapMask and BitMask Register don't need to be
        !           107: ;                 restored.  The MapMask will be set for all three
        !           108: ;                 planes, and the BitMask will be set for all bits
        !           109: ;                 enabled for write.
        !           110: ;
        !           111: ;          None - Registers don't have to be restored
        !           112: 
        !           113: 
        !           114: EGAAll equ     4
        !           115: EGAMost equ    3
        !           116: EGASome equ    2
        !           117: EGANone equ    0
        !           118: 
        !           119: 
        !           120: 
        !           121: 
        !           122: 
        !           123: ;      EGA specific flags for cursor coordination
        !           124: ;
        !           125: ;      The structure is set up so a loop can be performed
        !           126: ;      getting the values to output and outputting them.
        !           127: ;      The flag values are set up to be the index of the
        !           128: ;      number of registers that need to be output.  Some
        !           129: ;      routines which leave the map mask as 111b can indicate
        !           130: ;      that that register needn't be restored by the cursor
        !           131: ;      code.  Since the cursor code always uses the MapMask
        !           132: ;      set to 111b, this saves a little time.
        !           133: 
        !           134: 
        !           135: EGADef         struc
        !           136: 
        !           137:                dw      rGraphics       ;Data Rotate Register
        !           138: DataRotate     dw      drSet*256+rDataRotate
        !           139: 
        !           140:                dw      rGraphics       ;Mode Register
        !           141: Mode           dw      (mProcWrite+mDataRead)*256+rMode
        !           142: 
        !           143:                dw      rGraphics       ;Bit Mask Register
        !           144: Bitmask        dw      0FF00h+rBitMask
        !           145: 
        !           146:                dw      rSequencer      ;Plane Write Enable Mask
        !           147: MapMask        dw      (C0+C1+C2)*256+rmapMask
        !           148: 
        !           149: 
        !           150: EGAFlags       db      EGANone         ;Controlling flags
        !           151:                db      0               ;  (msb of flags is always zero)
        !           152: 
        !           153: EGADef         ends

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