--- previous/src/cpu/cpummu.h 2018/04/24 19:28:56 1.1.1.3 +++ previous/src/cpu/cpummu.h 2018/04/24 19:33:34 1.1.1.6 @@ -23,10 +23,12 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ -#ifndef CPUMMU_H -#define CPUMMU_H -#include "compat.h" +#ifndef UAE_CPUMMU_H +#define UAE_CPUMMU_H + +//#include "uae/types.h" + #include "mmu_common.h" #ifndef FULLMMU @@ -43,6 +45,17 @@ static __inline void flush_internals (void) { } +extern int mmu060_state; + +extern int mmu040_movem; +extern uaecptr mmu040_movem_ea; +extern uae_u32 mmu040_move16[4]; + +extern bool mmu_pagesize_8k; +extern uae_u16 mmu_opcode; +extern bool mmu_restart; +extern bool mmu_ttr_enabled; + //typedef uae_u8 flagtype; //static m68k_exception except; @@ -156,10 +169,8 @@ extern void mmu_dump_tables(void); struct mmu_atc_line { uaecptr tag; // tag is 16 or 17 bits S+logical - unsigned valid : 1; - unsigned global : 1; - unsigned modified : 1; - unsigned write_protect : 1; + uae_u32 valid; + uae_u32 status; uaecptr phys; // phys base address }; @@ -175,137 +186,30 @@ struct mmu_atc_line { #define ATC_SLOTS 16 #define ATC_TYPE 2 -extern bool mmu_is_super; +extern uae_u32 mmu_is_super; +extern uae_u32 mmu_tagmask, mmu_pagemask; extern struct mmu_atc_line mmu_atc_array[ATC_TYPE][ATC_WAYS][ATC_SLOTS]; -/* - * mmu access is a 4 step process: - * if mmu is not enabled just read physical - * check transparent region, if transparent, read physical - * check ATC (address translation cache), read immediatly if HIT - * read from mmu with the long path (and allocate ATC entry if needed) - */ -static ALWAYS_INLINE bool mmu_lookup(uaecptr addr, bool data, bool write, - struct mmu_atc_line **cl) -{ - int way,index; - static int way_miss=0; - - addr = ((mmu_is_super?0x80000000:0x00000000)|(addr >> 1)) & (regs.mmu_pagesize_8k?0xFFFE0000:0xFFFF0000); - if (regs.mmu_pagesize_8k) - index=(addr & 0x0001E000)>>13; - else - index=(addr & 0x0000F000)>>12; - for (way=0;way> 1)) & (regs.mmu_pagesize_8k?0xFFFE0000:0xFFFF0000); - if (regs.mmu_pagesize_8k) - index=(addr & 0x0001E000)>>13; - else - index=(addr & 0x0000F000)>>12; - for (way=0;way> 24; - mask = (ttr & MMU_TTR_LOGICAL_MASK) >> 16; +extern uae_u32 REGPARAM3 mmu_get_ilong_unaligned(uaecptr addr) REGPARAM; - if (!(msb & ~mask)) { - - if ((ttr & MMU_TTR_BIT_SFIELD_ENABLED) == 0) { - if (((ttr & MMU_TTR_BIT_SFIELD_SUPER) == 0) != (super == 0)) { - return TTR_NO_MATCH; - } - } - - return (ttr & MMU_TTR_BIT_WRITE_PROTECT) ? TTR_NO_WRITE : TTR_OK_MATCH; - } - } - return TTR_NO_MATCH; -} - -static inline int mmu_match_ttr(uaecptr addr, bool super, bool data) -{ - int res; - - if (data) { - res = mmu_do_match_ttr(regs.dtt0, addr, super); - if (res == TTR_NO_MATCH) - res = mmu_do_match_ttr(regs.dtt1, addr, super); - } else { - res = mmu_do_match_ttr(regs.itt0, addr, super); - if (res == TTR_NO_MATCH) - res = mmu_do_match_ttr(regs.itt1, addr, super); - } - return res; -} - -extern uae_u16 REGPARAM3 mmu_get_word_unaligned(uaecptr addr, bool data) REGPARAM; -extern uae_u32 REGPARAM3 mmu_get_long_unaligned(uaecptr addr, bool data) REGPARAM; - -extern uae_u8 REGPARAM3 mmu_get_byte_slow(uaecptr addr, bool super, bool data, - int size, struct mmu_atc_line *cl) REGPARAM; -extern uae_u16 REGPARAM3 mmu_get_word_slow(uaecptr addr, bool super, bool data, - int size, struct mmu_atc_line *cl) REGPARAM; -extern uae_u32 REGPARAM3 mmu_get_long_slow(uaecptr addr, bool super, bool data, - int size, struct mmu_atc_line *cl) REGPARAM; - -extern void REGPARAM3 mmu_put_word_unaligned(uaecptr addr, uae_u16 val, bool data) REGPARAM; -extern void REGPARAM3 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data) REGPARAM; - -extern void REGPARAM3 mmu_put_byte_slow(uaecptr addr, uae_u8 val, bool super, bool data, - int size, struct mmu_atc_line *cl) REGPARAM; -extern void REGPARAM3 mmu_put_word_slow(uaecptr addr, uae_u16 val, bool super, bool data, - int size, struct mmu_atc_line *cl) REGPARAM; -extern void REGPARAM3 mmu_put_long_slow(uaecptr addr, uae_u32 val, bool super, bool data, - int size, struct mmu_atc_line *cl) REGPARAM; +extern void REGPARAM3 mmu_put_word_unaligned(uaecptr addr, uae_u16 val) REGPARAM; +extern void REGPARAM3 mmu_put_long_unaligned(uaecptr addr, uae_u32 val) REGPARAM; extern void mmu_make_transparent_region(uaecptr baseaddr, uae_u32 size, int datamode); #define FC_DATA (regs.s ? 5 : 1) #define FC_INST (regs.s ? 6 : 2) -extern uaecptr REGPARAM3 mmu_translate(uaecptr addr, bool super, bool data, bool write) REGPARAM; +extern void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, bool nonmmu); extern uae_u32 REGPARAM3 sfc_get_long(uaecptr addr) REGPARAM; extern uae_u16 REGPARAM3 sfc_get_word(uaecptr addr) REGPARAM; @@ -314,181 +218,249 @@ extern void REGPARAM3 dfc_put_long(uaecp extern void REGPARAM3 dfc_put_word(uaecptr addr, uae_u16 val) REGPARAM; extern void REGPARAM3 dfc_put_byte(uaecptr addr, uae_u8 val) REGPARAM; +#define sfc040_get_long sfc_get_long +#define sfc040_get_word sfc_get_word +#define sfc040_get_byte sfc_get_byte +#define dfc040_put_long dfc_put_long +#define dfc040_put_word dfc_put_word +#define dfc040_put_byte dfc_put_byte + +#define sfc060_get_long sfc_get_long +#define sfc060_get_word sfc_get_word +#define sfc060_get_byte sfc_get_byte +#define dfc060_put_long dfc_put_long +#define dfc060_put_word dfc_put_word +#define dfc060_put_byte dfc_put_byte + +extern void uae_mmu_put_lrmw (uaecptr addr, uae_u32 v, int size, int type); +extern uae_u32 uae_mmu_get_lrmw (uaecptr addr, int size, int type); extern void REGPARAM3 mmu_flush_atc(uaecptr addr, bool super, bool global) REGPARAM; extern void REGPARAM3 mmu_flush_atc_all(bool global) REGPARAM; extern void REGPARAM3 mmu_op_real(uae_u32 opcode, uae_u16 extra) REGPARAM; extern void REGPARAM3 mmu_reset(void) REGPARAM; +extern void REGPARAM3 mmu_set_funcs(void) REGPARAM; extern void REGPARAM3 mmu_set_tc(uae_u16 tc) REGPARAM; extern void REGPARAM3 mmu_set_super(bool super) REGPARAM; -static ALWAYS_INLINE uaecptr mmu_get_real_address(uaecptr addr, struct mmu_atc_line *cl) +static ALWAYS_INLINE int mmu_get_fc(bool super, bool data) { - return cl->phys | (addr & (regs.mmu_pagesize_8k?0x00001fff:0x00000fff)); + return (super ? 4 : 0) | (data ? 1 : 2); } -static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, bool data, int size) -{ - struct mmu_atc_line *cl; +/* + * mmu access is a 4 step process: + * if mmu is not enabled just read physical + * check transparent region, if transparent, read physical + * check ATC (address translation cache), read immediatly if HIT + * read from mmu with the long path (and allocate ATC entry if needed) + */ - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data)!=TTR_NO_MATCH)) - return phys_get_long(addr); - if (likely(mmu_lookup(addr, data, false, &cl))) - return phys_get_long(mmu_get_real_address(addr, cl)); - return mmu_get_long_slow(addr, regs.s != 0, data, size, cl); +/* check if an address matches a ttr */ +static ALWAYS_INLINE int mmu_do_match_ttr(uae_u32 ttr, uaecptr addr, bool super) +{ + if (ttr & MMU_TTR_BIT_ENABLED) { /* TTR enabled */ + uae_u8 msb, mask; + + msb = ((addr ^ ttr) & MMU_TTR_LOGICAL_BASE) >> 24; + mask = (ttr & MMU_TTR_LOGICAL_MASK) >> 16; + + if (!(msb & ~mask)) { + + if ((ttr & MMU_TTR_BIT_SFIELD_ENABLED) == 0) { + if (((ttr & MMU_TTR_BIT_SFIELD_SUPER) == 0) != (super == 0)) { + return TTR_NO_MATCH; + } + } + + return (ttr & MMU_TTR_BIT_WRITE_PROTECT) ? TTR_NO_WRITE : TTR_OK_MATCH; + } + } + return TTR_NO_MATCH; +} + +static ALWAYS_INLINE int mmu_match_ttr(uaecptr addr, bool super, bool data) +{ + int res; + + if (!mmu_ttr_enabled) + return TTR_NO_MATCH; + if (data) { + res = mmu_do_match_ttr(regs.dtt0, addr, super); + if (res == TTR_NO_MATCH) + res = mmu_do_match_ttr(regs.dtt1, addr, super); + } else { + res = mmu_do_match_ttr(regs.itt0, addr, super); + if (res == TTR_NO_MATCH) + res = mmu_do_match_ttr(regs.itt1, addr, super); + } + return res; +} + +static ALWAYS_INLINE int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool write) +{ + if (!mmu_ttr_enabled) + return TTR_NO_MATCH; + int res = mmu_match_ttr(addr, super, data); + if (res == TTR_NO_WRITE && write) + mmu_bus_error(addr, val, mmu_get_fc (super, data), true, size, false); + return res; } -static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, bool data, int size) +static ALWAYS_INLINE uaecptr mmu_get_real_address(uaecptr addr, struct mmu_atc_line *cl) { - struct mmu_atc_line *cl; - - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data)!=TTR_NO_MATCH)) - return phys_get_word(addr); - if (likely(mmu_lookup(addr, data, false, &cl))) - return phys_get_word(mmu_get_real_address(addr, cl)); - return mmu_get_word_slow(addr, regs.s != 0, data, size, cl); + return cl->phys | (addr & mmu_pagemask); } -static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, bool data, int size) +static ALWAYS_INLINE void mmu_get_move16(uaecptr addr, uae_u32 *v, int size) { - struct mmu_atc_line *cl; - - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data)!=TTR_NO_MATCH)) - return phys_get_byte(addr); - if (likely(mmu_lookup(addr, data, false, &cl))) - return phys_get_byte(mmu_get_real_address(addr, cl)); - return mmu_get_byte_slow(addr, regs.s != 0, data, size, cl); + int i; + bool super = regs.s != 0; + addr &= ~15; + + if (mmu_match_ttr(addr,super,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, super, true, false, size); + } + + for (i = 0; i < 4; i++) { + v[i] = phys_get_long(addr + i * 4); + } } - -static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, bool data, int size) +static ALWAYS_INLINE void mmu_put_move16(uaecptr addr, uae_u32 *v, int size) { - struct mmu_atc_line *cl; - - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data)==TTR_OK_MATCH)) { - phys_put_long(addr,val); - return; - } - if (likely(mmu_lookup(addr, data, true, &cl))) - phys_put_long(mmu_get_real_address(addr, cl), val); - else - mmu_put_long_slow(addr, val, regs.s != 0, data, size, cl); + int i; + bool super = regs.s != 0; + addr &= ~15; + + if (mmu_match_ttr_write(addr,super,true,v[0],size,false) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, v[0], super, true, true, size); + } + + for (i = 0; i < 4; i++) { + phys_put_long(addr + i * 4, v[i]); + } } -static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, bool data, int size) +static ALWAYS_INLINE uae_u32 mmu_get_ilong(uaecptr addr, int size) { - struct mmu_atc_line *cl; - - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data)==TTR_OK_MATCH)) { - phys_put_word(addr,val); - return; - } - if (likely(mmu_lookup(addr, data, true, &cl))) - phys_put_word(mmu_get_real_address(addr, cl), val); - else - mmu_put_word_slow(addr, val, regs.s != 0, data, size, cl); + if (mmu_match_ttr(addr,regs.s!=0,false) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, regs.s!=0, false, false, size); + } + return phys_get_long(addr); } -static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, bool data, int size) +static ALWAYS_INLINE uae_u16 mmu_get_iword(uaecptr addr, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr(addr,regs.s!=0,false) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, regs.s!=0, false, false, size); + } + return phys_get_word(addr); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data)==TTR_OK_MATCH)) { - phys_put_byte(addr,val); - return; - } - if (likely(mmu_lookup(addr, data, true, &cl))) - phys_put_byte(mmu_get_real_address(addr, cl), val); - else - mmu_put_byte_slow(addr, val, regs.s != 0, data, size, cl); +static ALWAYS_INLINE uae_u8 mmu_get_ibyte(uaecptr addr, int size) +{ + if (mmu_match_ttr(addr,regs.s!=0,false) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, regs.s!=0, false, false, size); + } + return phys_get_byte(addr); } -static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool data, int size) +static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr(addr,regs.s!=0,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, regs.s!=0, true, false, size); + } + return phys_get_long(addr); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data)!=TTR_NO_MATCH)) - return phys_get_long(addr); - if (likely(mmu_user_lookup(addr, super, data, false, &cl))) - return phys_get_long(mmu_get_real_address(addr, cl)); - return mmu_get_long_slow(addr, super, data, size, cl); +static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, int size) +{ + if (mmu_match_ttr(addr,regs.s!=0,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, regs.s!=0, true, false, size); + } + return phys_get_word(addr); } -static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool data, int size) +static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr(addr,regs.s!=0,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, regs.s!=0, true, false, size); + } + return phys_get_byte(addr); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data)!=TTR_NO_MATCH)) - return phys_get_word(addr); - if (likely(mmu_user_lookup(addr, super, data, false, &cl))) - return phys_get_word(mmu_get_real_address(addr, cl)); - return mmu_get_word_slow(addr, super, data, size, cl); +static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, int size) +{ + if (mmu_match_ttr_write(addr,regs.s!=0,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, val, regs.s!=0, true, true, size); + } + phys_put_long(addr, val); } -static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool data, int size) +static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr_write(addr,regs.s!=0,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, val, regs.s!=0, true, true, size); + } + phys_put_word(addr, val); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data)!=TTR_NO_MATCH)) - return phys_get_byte(addr); - if (likely(mmu_user_lookup(addr, super, data, false, &cl))) - return phys_get_byte(mmu_get_real_address(addr, cl)); - return mmu_get_byte_slow(addr, super, data, size, cl); +static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, int size) +{ + if (mmu_match_ttr_write(addr,regs.s!=0,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, val, regs.s!=0, true, true, size); + } + phys_put_byte(addr, val); } -static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool super, bool data, int size) +static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool write, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr_write(addr,super,true,0,size,write) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, super, true, write, size); + } + return phys_get_long(addr); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data)==TTR_OK_MATCH)) { - phys_put_long(addr,val); - return; - } - if (likely(mmu_user_lookup(addr, super, data, true, &cl))) - phys_put_long(mmu_get_real_address(addr, cl), val); - else - mmu_put_long_slow(addr, val, super, data, size, cl); +static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool write, int size) +{ + if (mmu_match_ttr_write(addr,super,true,0,size,write) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, super, true, write, size); + } + return phys_get_word(addr); } -static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool super, bool data, int size) +static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool write, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr_write(addr,super,true,0,size,write) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, 0, super, true, write, size); + } + return phys_get_byte(addr); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data)==TTR_OK_MATCH)) { - phys_put_word(addr,val); - return; - } - if (likely(mmu_user_lookup(addr, super, data, true, &cl))) - phys_put_word(mmu_get_real_address(addr, cl), val); - else - mmu_put_word_slow(addr, val, super, data, size, cl); +static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool super, int size) +{ + if (mmu_match_ttr_write(addr,super,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, val, super, true, true, size); + } + phys_put_long(addr, val); } -static ALWAYS_INLINE void mmu_put_user_byte(uaecptr addr, uae_u8 val, bool super, bool data, int size) +static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool super, int size) { - struct mmu_atc_line *cl; + if (mmu_match_ttr_write(addr,super,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, val, super, true, true, size); + } + phys_put_word(addr, val); +} - // addr,super,data - if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data)==TTR_OK_MATCH)) { - phys_put_byte(addr,val); - return; - } - if (likely(mmu_user_lookup(addr, super, data, true, &cl))) - phys_put_byte(mmu_get_real_address(addr, cl), val); - else - mmu_put_byte_slow(addr, val, super, data, size, cl); +static ALWAYS_INLINE void mmu_put_user_byte(uaecptr addr, uae_u8 val, bool super, int size) +{ + if (mmu_match_ttr_write(addr,super,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) { + addr = mmu_translate(addr, val, super, true, true, size); + } + phys_put_byte(addr, val); } @@ -517,111 +489,190 @@ static ALWAYS_INLINE uae_u32 HWget_b(uae return get_byte (addr); } -static ALWAYS_INLINE uae_u32 uae_mmu_get_ilong(uaecptr addr) +static ALWAYS_INLINE uae_u32 uae_mmu040_get_ilong(uaecptr addr) { if (unlikely(is_unaligned(addr, 4))) - return mmu_get_long_unaligned(addr, false); - return mmu_get_long(addr, false, sz_long); + return mmu_get_ilong_unaligned(addr); + return mmu_get_ilong(addr, sz_long); } -static ALWAYS_INLINE uae_u16 uae_mmu_get_iword(uaecptr addr) +static ALWAYS_INLINE uae_u16 uae_mmu040_get_iword(uaecptr addr) { - if (unlikely(is_unaligned(addr, 2))) - return mmu_get_word_unaligned(addr, false); - return mmu_get_word(addr, false, sz_word); + return mmu_get_iword(addr, sz_word); } -static ALWAYS_INLINE uae_u16 uae_mmu_get_ibyte(uaecptr addr) +static ALWAYS_INLINE uae_u16 uae_mmu040_get_ibyte(uaecptr addr) { - return mmu_get_byte(addr, false, sz_byte); + return mmu_get_ibyte(addr, sz_byte); } -static ALWAYS_INLINE uae_u32 uae_mmu_get_long(uaecptr addr) +static ALWAYS_INLINE uae_u32 uae_mmu040_get_long(uaecptr addr) { if (unlikely(is_unaligned(addr, 4))) - return mmu_get_long_unaligned(addr, true); - return mmu_get_long(addr, true, sz_long); + return mmu_get_long_unaligned(addr); + return mmu_get_long(addr, sz_long); } -static ALWAYS_INLINE uae_u16 uae_mmu_get_word(uaecptr addr) +static ALWAYS_INLINE uae_u16 uae_mmu040_get_word(uaecptr addr) { if (unlikely(is_unaligned(addr, 2))) - return mmu_get_word_unaligned(addr, true); - return mmu_get_word(addr, true, sz_word); + return mmu_get_word_unaligned(addr); + return mmu_get_word(addr, sz_word); } -static ALWAYS_INLINE uae_u8 uae_mmu_get_byte(uaecptr addr) +static ALWAYS_INLINE uae_u8 uae_mmu040_get_byte(uaecptr addr) { - return mmu_get_byte(addr, true, sz_byte); + return mmu_get_byte(addr, sz_byte); } -static ALWAYS_INLINE void uae_mmu_put_long(uaecptr addr, uae_u32 val) + +static ALWAYS_INLINE void uae_mmu040_put_word(uaecptr addr, uae_u16 val) { - if (unlikely(is_unaligned(addr, 4))) - mmu_put_long_unaligned(addr, val, true); + if (unlikely(is_unaligned(addr, 2))) + mmu_put_word_unaligned(addr, val); else - mmu_put_long(addr, val, true, sz_long); + mmu_put_word(addr, val, sz_word); } -static ALWAYS_INLINE void uae_mmu_put_word(uaecptr addr, uae_u16 val) +static ALWAYS_INLINE void uae_mmu040_put_byte(uaecptr addr, uae_u8 val) { - if (unlikely(is_unaligned(addr, 2))) - mmu_put_word_unaligned(addr, val, true); + mmu_put_byte(addr, val, sz_byte); +} +static ALWAYS_INLINE void uae_mmu040_put_long(uaecptr addr, uae_u32 val) +{ + if (unlikely(is_unaligned(addr, 4))) + mmu_put_long_unaligned(addr, val); else - mmu_put_word(addr, val, true, sz_word); + mmu_put_long(addr, val, sz_long); +} + + +static ALWAYS_INLINE void uae_mmu_get_move16(uaecptr addr, uae_u32 *val) +{ + // move16 is always aligned + mmu_get_move16(addr, val, 16); +} +static ALWAYS_INLINE void uae_mmu_put_move16(uaecptr addr, uae_u32 *val) +{ + // move16 is always aligned + mmu_put_move16(addr, val, 16); +} + +// normal 040 +STATIC_INLINE void put_byte_mmu040 (uaecptr addr, uae_u32 v) +{ + uae_mmu040_put_byte (addr, v); +} +STATIC_INLINE void put_word_mmu040 (uaecptr addr, uae_u32 v) +{ + uae_mmu040_put_word (addr, v); +} +STATIC_INLINE void put_long_mmu040 (uaecptr addr, uae_u32 v) +{ + uae_mmu040_put_long (addr, v); +} +STATIC_INLINE uae_u32 get_byte_mmu040 (uaecptr addr) +{ + return uae_mmu040_get_byte (addr); +} +STATIC_INLINE uae_u32 get_word_mmu040 (uaecptr addr) +{ + return uae_mmu040_get_word (addr); +} +STATIC_INLINE uae_u32 get_long_mmu040 (uaecptr addr) +{ + return uae_mmu040_get_long (addr); +} +STATIC_INLINE void get_move16_mmu (uaecptr addr, uae_u32 *v) +{ + uae_mmu_get_move16 (addr, v); +} +STATIC_INLINE void put_move16_mmu (uaecptr addr, uae_u32 *v) +{ + uae_mmu_put_move16 (addr, v); } -static ALWAYS_INLINE void uae_mmu_put_byte(uaecptr addr, uae_u8 val) + +// locked rmw 060 +STATIC_INLINE void put_lrmw_byte_mmu060 (uaecptr addr, uae_u32 v) +{ + uae_mmu_put_lrmw (addr, v, sz_byte, 1); +} +STATIC_INLINE void put_lrmw_word_mmu060 (uaecptr addr, uae_u32 v) +{ + uae_mmu_put_lrmw (addr, v, sz_word, 1); +} +STATIC_INLINE void put_lrmw_long_mmu060 (uaecptr addr, uae_u32 v) +{ + uae_mmu_put_lrmw (addr, v, sz_long, 1); +} +STATIC_INLINE uae_u32 get_lrmw_byte_mmu060 (uaecptr addr) { - mmu_put_byte(addr, val, true, sz_byte); + return uae_mmu_get_lrmw (addr, sz_byte, 1); +} +STATIC_INLINE uae_u32 get_lrmw_word_mmu060 (uaecptr addr) +{ + return uae_mmu_get_lrmw (addr, sz_word, 1); +} +STATIC_INLINE uae_u32 get_lrmw_long_mmu060 (uaecptr addr) +{ + return uae_mmu_get_lrmw (addr, sz_long, 1); } -STATIC_INLINE void put_byte_mmu (uaecptr addr, uae_u32 v) +// locked rmw 040 +STATIC_INLINE void put_lrmw_byte_mmu040 (uaecptr addr, uae_u32 v) { - uae_mmu_put_byte (addr, v); + uae_mmu_put_lrmw (addr, v, sz_byte, 0); } -STATIC_INLINE void put_word_mmu (uaecptr addr, uae_u32 v) +STATIC_INLINE void put_lrmw_word_mmu040 (uaecptr addr, uae_u32 v) { - uae_mmu_put_word (addr, v); + uae_mmu_put_lrmw (addr, v, sz_word, 0); } -STATIC_INLINE void put_long_mmu (uaecptr addr, uae_u32 v) +STATIC_INLINE void put_lrmw_long_mmu040 (uaecptr addr, uae_u32 v) { - uae_mmu_put_long (addr, v); + uae_mmu_put_lrmw (addr, v, sz_long, 0); } -STATIC_INLINE uae_u32 get_byte_mmu (uaecptr addr) +STATIC_INLINE uae_u32 get_lrmw_byte_mmu040 (uaecptr addr) { - return uae_mmu_get_byte (addr); + return uae_mmu_get_lrmw (addr, sz_byte, 0); } -STATIC_INLINE uae_u32 get_word_mmu (uaecptr addr) +STATIC_INLINE uae_u32 get_lrmw_word_mmu040 (uaecptr addr) { - return uae_mmu_get_word (addr); + return uae_mmu_get_lrmw (addr, sz_word, 0); } -STATIC_INLINE uae_u32 get_long_mmu (uaecptr addr) +STATIC_INLINE uae_u32 get_lrmw_long_mmu040 (uaecptr addr) { - return uae_mmu_get_long (addr); + return uae_mmu_get_lrmw (addr, sz_long, 0); } -STATIC_INLINE uae_u32 get_ibyte_mmu (int o) + +STATIC_INLINE uae_u32 get_ibyte_mmu040 (int o) { - uae_u32 pc = m68k_getpc () + o; - return uae_mmu_get_iword (pc); + uae_u32 pc = m68k_getpci () + o; + return uae_mmu040_get_iword (pc); } -STATIC_INLINE uae_u32 get_iword_mmu (int o) +STATIC_INLINE uae_u32 get_iword_mmu040 (int o) { - uae_u32 pc = m68k_getpc () + o; - return uae_mmu_get_iword (pc); + uae_u32 pc = m68k_getpci () + o; + return uae_mmu040_get_iword (pc); } -STATIC_INLINE uae_u32 get_ilong_mmu (int o) +STATIC_INLINE uae_u32 get_ilong_mmu040 (int o) { - uae_u32 pc = m68k_getpc () + o; - return uae_mmu_get_ilong (pc); + uae_u32 pc = m68k_getpci () + o; + return uae_mmu040_get_ilong (pc); } -STATIC_INLINE uae_u32 next_iword_mmu (void) +STATIC_INLINE uae_u32 next_iword_mmu040 (void) { - uae_u32 pc = m68k_getpc (); + uae_u32 pc = m68k_getpci (); m68k_incpci (2); - return uae_mmu_get_iword (pc); + return uae_mmu040_get_iword (pc); } -STATIC_INLINE uae_u32 next_ilong_mmu (void) +STATIC_INLINE uae_u32 next_ilong_mmu040 (void) { - uae_u32 pc = m68k_getpc (); + uae_u32 pc = m68k_getpci (); m68k_incpci (4); - return uae_mmu_get_ilong (pc); + return uae_mmu040_get_ilong (pc); } -extern void m68k_do_rts_mmu (void); -extern void m68k_do_rte_mmu (uaecptr a7); -extern void m68k_do_bsr_mmu (uaecptr oldpc, uae_s32 offset); +extern void flush_mmu040 (uaecptr, int); +extern void m68k_do_rts_mmu040 (void); +extern void m68k_do_rte_mmu040 (uaecptr a7); +extern void m68k_do_bsr_mmu040 (uaecptr oldpc, uae_s32 offset); + +extern void flush_mmu060 (uaecptr, int); +extern void m68k_do_rts_mmu060 (void); +extern void m68k_do_rte_mmu060 (uaecptr a7); +extern void m68k_do_bsr_mmu060 (uaecptr oldpc, uae_s32 offset); -#endif /* CPUMMU_H */ +#endif /* UAE_CPUMMU_H */