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1.1 root 1: /*
2: * UAE - The Un*x Amiga Emulator
3: *
4: * MC68000 emulation generator
5: *
6: * This is a fairly stupid program that generates a lot of case labels that
7: * can be #included in a switch statement.
8: * As an alternative, it can generate functions that handle specific
9: * MC68000 instructions, plus a prototype header file and a function pointer
10: * array to look up the function for an opcode.
11: * Error checking is bad, an illegal table68k file will cause the program to
12: * call abort().
13: * The generated code is sometimes sub-optimal, an optimizing compiler should
14: * take care of this.
15: *
16: * The source for the insn timings is Markt & Technik's Amiga Magazin 8/1992.
17: *
18: * Copyright 1995, 1996, 1997, 1998, 1999, 2000 Bernd Schmidt
19: */
20:
21: #include "sysconfig.h"
22: #include "sysdeps.h"
23: #include <ctype.h>
24: #include <string.h>
25:
26: #include "readcpu.h"
27:
28: #define BOOL_TYPE "int"
29: /* Define the minimal 680x0 where NV flags are not affected by xBCD instructions. */
30: #define xBCD_KEEPS_NV_FLAGS 4
31:
32: static FILE *headerfile;
33: static FILE *stblfile;
34:
35: static int using_prefetch, using_indirect, using_mmu;
36: static int using_ce020;
37: static int using_exception_3;
38: static int using_ce;
39: static int cpu_level;
40: static int count_read, count_write, count_cycles, count_ncycles;
41: static int count_read_ea, count_write_ea, count_cycles_ea;
1.1.1.3 ! root 42: static const char *mmu_postfix;
1.1 root 43:
44: static int optimized_flags;
45:
46: #define GF_APDI 1
47: #define GF_AD8R 2
48: #define GF_PC8R 4
49: #define GF_AA 7
50: #define GF_NOREFILL 8
51: #define GF_PREFETCH 16
52: #define GF_FC 32
53: #define GF_MOVE 64
54:
55: /* For the current opcode, the next lower level that will have different code.
56: * Initialized to -1 for each opcode. If it remains unchanged, indicates we
57: * are done with that opcode. */
58: static int next_cpu_level;
59:
60: static int *opcode_map;
61: static int *opcode_next_clev;
62: static int *opcode_last_postfix;
63: static unsigned long *counts;
64: static int generate_stbl;
65: static int fixupcnt;
66:
67: #define GENA_GETV_NO_FETCH 0
68: #define GENA_GETV_FETCH 1
69: #define GENA_GETV_FETCH_ALIGN 2
70: #define GENA_MOVEM_DO_INC 0
71: #define GENA_MOVEM_NO_INC 1
72: #define GENA_MOVEM_MOVE16 2
73:
74: static void read_counts (void)
75: {
76: FILE *file;
77: unsigned long opcode, count, total;
78: char name[20];
79: int nr = 0;
80: int ret;
81: memset (counts, 0, 65536 * sizeof *counts);
82:
83: count = 0;
84: file = fopen ("frequent.68k", "r");
85: if (file) {
86: ret = fscanf (file, "Total: %lu\n", &total);
87: while (fscanf (file, "%lx: %lu %s\n", &opcode, &count, name) == 3) {
88: opcode_next_clev[nr] = 5;
89: opcode_last_postfix[nr] = -1;
90: opcode_map[nr++] = opcode;
91: counts[opcode] = count;
92: }
93: fclose (file);
94: }
95: if (nr == nr_cpuop_funcs)
96: return;
97: for (opcode = 0; opcode < 0x10000; opcode++) {
98: if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
99: && counts[opcode] == 0)
100: {
101: opcode_next_clev[nr] = 5;
102: opcode_last_postfix[nr] = -1;
103: opcode_map[nr++] = opcode;
104: counts[opcode] = count;
105: }
106: }
107: if (nr != nr_cpuop_funcs)
108: abort ();
109: }
110:
111: static char endlabelstr[80];
112: static int endlabelno = 0;
113: static int need_endlabel;
114:
115: static int n_braces, limit_braces;
116: static int m68k_pc_offset;
117: static int insn_n_cycles, insn_n_cycles020;
118:
119: static void fpulimit (void)
120: {
121: if (limit_braces)
122: return;
123: printf ("\n#ifdef FPUEMU\n");
124: limit_braces = n_braces;
125: n_braces = 0;
126: }
127: static void cpulimit (void)
128: {
129: printf ("#ifndef CPUEMU_68000_ONLY\n");
130: }
131:
132: static void returncycles (const char *s, int cycles)
133: {
134: if (using_ce)
135: return;
136: if (using_ce020)
137: printf ("%sreturn;\n", s);
138: else
139: printf ("%sreturn %d * CYCLE_UNIT / 2;\n", s, cycles);
140: }
141:
142: static void addcycles_ce020 (int cycles)
143: {
144: if (!using_ce020)
145: return;
146: if (cycles > 0)
147: printf ("\tregs.ce020memcycles += %d * cpucycleunit;\n", cycles);
148: count_cycles += cycles;
149: }
150: static void addcycles000 (int cycles)
151: {
152: if (!using_ce)
153: return;
154: printf ("\tdo_cycles_ce000 (%d);\n", cycles);
155: count_cycles += cycles;
156: }
157: static void addcycles000_2 (const char *s, int cycles)
158: {
159: if (!using_ce)
160: return;
161: printf ("%sdo_cycles_ce000 (%d);\n", s, cycles);
162: count_cycles += cycles;
163: }
164:
165: static void addcycles000_3 (const char *s)
166: {
167: if (!using_ce)
168: return;
169: printf ("%sif (cycles > 0) do_cycles_ce000 (cycles);\n", s);
170: count_ncycles++;
171: }
172:
173: static int isreg (amodes mode)
174: {
175: if (mode == Dreg || mode == Areg)
176: return 1;
177: return 0;
178: }
179:
180: static void start_brace (void)
181: {
182: n_braces++;
183: printf ("{");
184: }
185:
186: static void close_brace (void)
187: {
188: assert (n_braces > 0);
189: n_braces--;
190: printf ("}");
191: }
192:
193: static void finish_braces (void)
194: {
195: while (n_braces > 0)
196: close_brace ();
197: }
198:
199: static void pop_braces (int to)
200: {
201: while (n_braces > to)
202: close_brace ();
203: }
204:
205: static int bit_size (int size)
206: {
207: switch (size) {
208: case sz_byte: return 8;
209: case sz_word: return 16;
210: case sz_long: return 32;
211: default: abort ();
212: }
213: return 0;
214: }
215:
216: static const char *bit_mask (int size)
217: {
218: switch (size) {
219: case sz_byte: return "0xff";
220: case sz_word: return "0xffff";
221: case sz_long: return "0xffffffff";
222: default: abort ();
223: }
224: return 0;
225: }
226:
227: static const char *srcl, *dstl;
228: static const char *srcw, *dstw;
229: static const char *srcb, *dstb;
230: static const char *ce020_prefetch_long;
231: static const char *ce020_prefetch_word;
232:
233: static void gen_nextilong (const char *type, const char *name, int flags)
234: {
235: int r = m68k_pc_offset;
236: m68k_pc_offset += 4;
237:
238: if (using_ce020) {
239: printf ("\t%s %s = %s (%d);\n", type, name, ce020_prefetch_long, r);
240: count_read += 2;
241: } else if (using_ce) {
242: printf ("\t%s %s;\n", type, name);
243: /* we must do this because execution order of (something | something2) is not defined */
244: if (flags & GF_NOREFILL) {
245: printf ("\t%s = get_word_ce_prefetch (%d) << 16;\n", name, r + 2);
246: count_read++;
247: printf ("\t%s |= regs.irc;\n", name);
248: } else {
249: printf ("\t%s = get_word_ce_prefetch (%d) << 16;\n", name, r + 2);
250: count_read++;
251: printf ("\t%s |= get_word_ce_prefetch (%d);\n", name, r + 4);
252: count_read++;
253: }
254: } else {
255: if (using_prefetch) {
256: if (flags & GF_NOREFILL) {
257: printf ("\t%s %s;\n", type, name);
258: printf ("\t%s = get_word_prefetch (%d) << 16;\n", name, r + 2);
259: count_read++;
260: printf ("\t%s |= regs.irc;\n", name);
261: insn_n_cycles += 4;
262: } else {
263: printf ("\t%s %s = get_long_prefetch (%d);\n", type, name, r + 2);
264: count_read++;
265: count_read++;
266: insn_n_cycles += 8;
267: }
268: } else if (using_indirect) {
269: insn_n_cycles += 8;
270: printf ("\t%s %s = get_ilongi (%d);\n", type, name, r);
271: } else if (using_mmu) {
272: insn_n_cycles += 8;
1.1.1.3 ! root 273: printf ("\t%s %s = get_ilong_mmu%s (%d);\n", type, name, mmu_postfix, r);
1.1 root 274: } else {
275: insn_n_cycles += 8;
276: printf ("\t%s %s = get_ilong (%d);\n", type, name, r);
277: }
278: }
279: }
280:
281: static const char *gen_nextiword (int flags)
282: {
283: static char buffer[80];
284: int r = m68k_pc_offset;
285: m68k_pc_offset += 2;
286:
287: if (using_ce020) {
288: sprintf (buffer, "%s (%d)", ce020_prefetch_word, r);
289: count_read++;
290: } else if (using_ce) {
291: if (flags & GF_NOREFILL) {
292: strcpy (buffer, "regs.irc");
293: } else {
294: sprintf (buffer, "get_word_ce_prefetch (%d)", r + 2);
295: count_read++;
296: }
297: } else {
298: if (using_prefetch) {
299: if (flags & GF_NOREFILL) {
300: sprintf (buffer, "regs.irc"/*, r*/);
301: } else {
302: sprintf (buffer, "get_word_prefetch (%d)", r + 2);
303: count_read++;
304: insn_n_cycles += 4;
305: }
306: } else if (using_indirect) {
307: sprintf (buffer, "get_iwordi(%d)", r);
308: insn_n_cycles += 4;
309: } else if (using_mmu) {
1.1.1.3 ! root 310: sprintf (buffer, "get_iword_mmu%s (%d)", mmu_postfix, r);
1.1 root 311: insn_n_cycles += 4;
312: } else {
313: sprintf (buffer, "get_iword (%d)", r);
314: insn_n_cycles += 4;
315: }
316: }
317: return buffer;
318: }
319:
320: static const char *gen_nextibyte (int flags)
321: {
322: static char buffer[80];
323: int r = m68k_pc_offset;
324: m68k_pc_offset += 2;
325:
326: if (using_ce020) {
327: sprintf (buffer, "(uae_u8)%s (%d)", ce020_prefetch_word, r);
328: count_read++;
329: } else if (using_ce) {
330: if (flags & GF_NOREFILL) {
331: strcpy (buffer, "(uae_u8)regs.irc");
332: } else {
333: sprintf (buffer, "(uae_u8)get_word_ce_prefetch (%d)", r + 2);
334: count_read++;
335: }
336: } else {
337: insn_n_cycles += 4;
338: if (using_prefetch) {
339: if (flags & GF_NOREFILL) {
340: sprintf (buffer, "(uae_u8)regs.irc"/*, r*/);
341: } else {
342: sprintf (buffer, "(uae_u8)get_word_prefetch (%d)", r + 2);
343: insn_n_cycles += 4;
344: count_read++;
345: }
346: } else if (using_indirect) {
347: sprintf (buffer, "get_ibytei (%d)", r);
348: insn_n_cycles += 4;
349: } else if (using_mmu) {
1.1.1.3 ! root 350: sprintf (buffer, "get_ibyte_mmu%s (%d)", mmu_postfix, r);
1.1 root 351: insn_n_cycles += 4;
352: } else {
353: sprintf (buffer, "get_ibyte (%d)", r);
354: insn_n_cycles += 4;
355: }
356: }
357: return buffer;
358: }
359:
360: static void irc2ir (void)
361: {
362: if (!using_prefetch)
363: return;
364: printf ("\tregs.ir = regs.irc;\n");
365: if (using_ce)
366: printf ("\tipl_fetch ();\n");
367: }
368:
369: static int did_prefetch;
370:
371: static void fill_prefetch_2 (void)
372: {
373: if (!using_prefetch)
374: return;
375: if (using_ce)
376: printf ("\tget_word_ce_prefetch (%d);\n", m68k_pc_offset + 2);
377: else
378: printf ("\tget_word_prefetch (%d);\n", m68k_pc_offset + 2);
379: did_prefetch = 1;
380: count_read++;
381: insn_n_cycles += 4;
382: }
383:
384: static void fill_prefetch_1 (int o)
385: {
386: if (!using_prefetch)
387: return;
388: if (using_ce) {
389: printf ("\tget_word_ce_prefetch (%d);\n", o);
390: } else {
391: printf ("\tget_word_prefetch (%d);\n", o);
392: }
393: did_prefetch = 1;
394: count_read++;
395: insn_n_cycles += 4;
396: }
397:
398: static void fill_prefetch_full (void)
399: {
400: fill_prefetch_1 (0);
401: irc2ir ();
402: fill_prefetch_1 (2);
403: }
404:
405: static void fill_prefetch_0 (void)
406: {
407: if (!using_prefetch)
408: return;
409: if (using_ce)
410: printf ("\tget_word_ce_prefetch (0);\n");
411: else
412: printf ("\tget_word_prefetch (0);\n");
413: did_prefetch = 1;
414: count_read++;
415: insn_n_cycles += 4;
416: }
417:
418: static void dummy_prefetch (void)
419: {
420: int o = m68k_pc_offset + 2;
421: if (!using_prefetch)
422: return;
423: if (using_ce) {
424: printf ("\tget_wordi_ce (m68k_getpc () + %d);\n", o);
425: } else {
426: printf ("\tget_wordi (m68k_getpc () + %d);\n", o);
427: }
428: count_read++;
429: insn_n_cycles += 4;
430: }
431:
432: static void fill_prefetch_next_1 (void)
433: {
434: irc2ir ();
435: fill_prefetch_1 (m68k_pc_offset + 2);
436: }
437:
438: static void fill_prefetch_next (void)
439: {
440: fill_prefetch_next_1 ();
441: }
442:
443: #if 0
444: static void fill_prefetch_next_delay (int extracycles)
445: {
446: if (!using_prefetch)
447: return;
448: if (using_ce) {
449: if (extracycles > 0) {
450: printf("\t{\n");
451: fill_prefetch_next ();
452: printf("\tif (%d > 0) do_cycles(%d * CYCLE_UNIT / 2);\n",
453: extracycles, extracycles);
454: printf("\t}\n");
455: } else {
456: fill_prefetch_next ();
457: }
458: } else {
459: fill_prefetch_next ();
460: }
461: }
462: #endif
463:
464: static void fill_prefetch_finish (void)
465: {
466: if (did_prefetch || !using_prefetch)
467: return;
468: fill_prefetch_1 (m68k_pc_offset);
469: }
470:
471: static void setpc (const char *format, ...)
472: {
473: va_list parms;
474: char buffer[1000];
475:
476: va_start (parms, format);
477: _vsnprintf (buffer, 1000 - 1, format, parms);
478: va_end (parms);
479:
480: if (using_mmu)
481: printf ("\tm68k_setpc_mmu (%s);\n", buffer);
482: else
483: printf ("\tm68k_setpc (%s);\n", buffer);
484: }
485:
486: static void incpc (const char *format, ...)
487: {
488: va_list parms;
489: char buffer[1000];
490:
491: va_start (parms, format);
492: _vsnprintf (buffer, 1000 - 1, format, parms);
493: va_end (parms);
494:
495: if (using_mmu)
496: printf ("\tm68k_incpci (%s);\n", buffer);
497: else
498: printf ("\tm68k_incpc (%s);\n", buffer);
499: }
500:
501: static void sync_m68k_pc (void)
502: {
503: if (m68k_pc_offset == 0)
504: return;
505: incpc ("%d", m68k_pc_offset);
506: m68k_pc_offset = 0;
507: }
508:
509: static void gen_set_fault_pc (void)
510: {
511: if (!using_mmu)
512: return;
513: sync_m68k_pc ();
514: printf ("\tregs.fault_pc = m68k_getpci ();\n");
515: m68k_pc_offset = 0;
516: }
517:
518: static void syncmovepc (int getv, int flags)
519: {
520: #if 0
521: if (!(flags & GF_MOVE))
522: return;
523: if (getv == 1) {
524: sync_m68k_pc ();
525: //fill_prefetch_next ();
526: }
527: #endif
528: }
529:
530: /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
531: * the calling routine handles Apdi and Aipi modes.
532: * gb-- movem == 2 means the same thing but for a MOVE16 instruction */
533:
534: /* fixup indicates if we want to fix up adress registers in pre decrement
535: * or post increment mode now (0) or later (1). A value of 2 will then be
536: * used to do the actual fix up. This allows to do all memory readings
537: * before any register is modified, and so to rerun operation without
538: * side effect in case a bus fault is generated by any memory access.
539: * XJ - 2006/11/13 */
540:
541: static void genamode2 (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags, int fixup)
542: {
543: char namea[100];
544: int m68k_pc_offset_last = m68k_pc_offset;
545:
546: sprintf (namea, "%sa", name);
547:
548: start_brace ();
549: switch (mode) {
550: case Dreg:
551: if (movem)
552: abort ();
553: if (getv == 1)
554: switch (size) {
555: case sz_byte:
556: #ifdef USE_DUBIOUS_BIGENDIAN_OPTIMIZATION
557: /* This causes the target compiler to generate better code on few systems */
558: printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg (regs, %s))[3];\n", name, reg);
559: #else
560: printf ("\tuae_s8 %s = m68k_dreg (regs, %s);\n", name, reg);
561: #endif
562: break;
563: case sz_word:
564: #ifdef USE_DUBIOUS_BIGENDIAN_OPTIMIZATION
565: printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg (regs, %s))[1];\n", name, reg);
566: #else
567: printf ("\tuae_s16 %s = m68k_dreg (regs, %s);\n", name, reg);
568: #endif
569: break;
570: case sz_long:
571: printf ("\tuae_s32 %s = m68k_dreg (regs, %s);\n", name, reg);
572: break;
573: default:
574: abort ();
575: }
576: syncmovepc (getv, flags);
577: return;
578: case Areg:
579: if (movem)
580: abort ();
581: if (getv == 1)
582: switch (size) {
583: case sz_word:
584: printf ("\tuae_s16 %s = m68k_areg (regs, %s);\n", name, reg);
585: break;
586: case sz_long:
587: printf ("\tuae_s32 %s = m68k_areg (regs, %s);\n", name, reg);
588: break;
589: default:
590: abort ();
591: }
592: syncmovepc (getv, flags);
593: return;
594: case Aind: // (An)
595: printf ("\tuaecptr %sa = m68k_areg (regs, %s);\n", name, reg);
596: break;
597: case Aipi: // (An)+
598: printf ("\tuaecptr %sa = m68k_areg (regs, %s);\n", name, reg);
599: break;
600: case Apdi: // -(An)
601: printf ("\tuaecptr %sa;\n", name);
602: switch (size) {
603: case sz_byte:
604: if (movem)
605: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg);
606: else
607: printf ("\t%sa = m68k_areg (regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
608: break;
609: case sz_word:
610: printf ("\t%sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
611: break;
612: case sz_long:
613: printf ("\t%sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
614: break;
615: default:
616: abort ();
617: }
618: if (!(flags & GF_APDI)) {
619: addcycles000 (2);
620: insn_n_cycles += 2;
621: count_cycles_ea += 2;
622: }
623: break;
624: case Ad16: // (d16,An)
625: printf ("\tuaecptr %sa = m68k_areg (regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword (flags));
626: count_read_ea++;
627: break;
628: case Ad8r: // (d8,An,Xn)
629: printf ("\tuaecptr %sa;\n", name);
630: if (cpu_level > 1) {
631: if (next_cpu_level < 1)
632: next_cpu_level = 1;
633: sync_m68k_pc ();
634: start_brace ();
635: /* This would ordinarily be done in gen_nextiword, which we bypass. */
636: insn_n_cycles += 4;
637: if (using_ce020 || using_mmu)
638: printf ("\t%sa = x_get_disp_ea_020 (m68k_areg (regs, %s), x_next_iword ());\n", name, reg);
639: else
640: printf ("\t%sa = get_disp_ea_020 (m68k_areg (regs, %s), next_iword ());\n", name, reg);
641: } else {
642: if (!(flags & GF_AD8R)) {
643: addcycles000 (2);
644: insn_n_cycles += 2;
645: count_cycles_ea += 2;
646: }
647: printf ("\t%sa = get_disp_ea_000 (m68k_areg (regs, %s), %s);\n", name, reg, gen_nextiword (flags));
648: count_read_ea++;
649: }
650: break;
651: case PC16: // (d16,PC,Xn)
652: printf ("\tuaecptr %sa = m68k_getpc () + %d;\n", name, m68k_pc_offset);
653: printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags));
654: break;
655: case PC8r: // (d8,PC,Xn)
656: printf ("\tuaecptr tmppc;\n");
657: printf ("\tuaecptr %sa;\n", name);
658: if (cpu_level > 1) {
659: if (next_cpu_level < 1)
660: next_cpu_level = 1;
661: sync_m68k_pc ();
662: start_brace ();
663: /* This would ordinarily be done in gen_nextiword, which we bypass. */
664: insn_n_cycles += 4;
665: printf ("\ttmppc = m68k_getpc ();\n");
666: if (using_ce020 || using_mmu)
667: printf ("\t%sa = x_get_disp_ea_020 (tmppc, x_next_iword ());\n", name);
668: else
669: printf ("\t%sa = get_disp_ea_020 (tmppc, next_iword ());\n", name);
670: } else {
671: printf ("\ttmppc = m68k_getpc () + %d;\n", m68k_pc_offset);
672: if (!(flags & GF_PC8R)) {
673: addcycles000 (2);
674: insn_n_cycles += 2;
675: count_cycles_ea += 2;
676: }
677: printf ("\t%sa = get_disp_ea_000 (tmppc, %s);\n", name, gen_nextiword (flags));
678: }
679:
680: break;
681: case absw:
682: printf ("\tuaecptr %sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags));
683: break;
684: case absl:
685: gen_nextilong ("uaecptr", namea, flags);
686: count_read_ea += 2;
687: break;
688: case imm:
689: if (getv != 1)
690: abort ();
691: insn_n_cycles020++;
692: switch (size) {
693: case sz_byte:
694: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags));
695: count_read_ea++;
696: break;
697: case sz_word:
698: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags));
699: count_read_ea++;
700: break;
701: case sz_long:
702: gen_nextilong ("uae_s32", name, flags);
703: count_read_ea += 2;
704: break;
705: default:
706: abort ();
707: }
708: syncmovepc (getv, flags);
709: return;
710: case imm0:
711: if (getv != 1)
712: abort ();
713: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags));
714: count_read_ea++;
715: syncmovepc (getv, flags);
716: return;
717: case imm1:
718: if (getv != 1)
719: abort ();
720: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags));
721: count_read_ea++;
722: syncmovepc (getv, flags);
723: return;
724: case imm2:
725: if (getv != 1)
726: abort ();
727: gen_nextilong ("uae_s32", name, flags);
728: count_read_ea += 2;
729: syncmovepc (getv, flags);
730: return;
731: case immi:
732: if (getv != 1)
733: abort ();
734: printf ("\tuae_u32 %s = %s;\n", name, reg);
735: syncmovepc (getv, flags);
736: return;
737: default:
738: abort ();
739: }
740:
741: syncmovepc (getv, flags);
742:
743: /* We get here for all non-reg non-immediate addressing modes to
744: * actually fetch the value. */
745:
746: if ((using_prefetch || using_ce) && using_exception_3 && getv != 0 && size != sz_byte) {
747: int offset = 0;
748: if (flags & GF_MOVE) {
749: offset = m68k_pc_offset;
750: if (getv == 2)
751: offset += 2;
752: } else {
753: offset = m68k_pc_offset_last;
754: }
755: printf ("\tif (%sa & 1) {\n", name);
756: printf ("\t\texception3 (opcode, m68k_getpc () + %d, %sa);\n",
757: offset, name);
758: printf ("\t\tgoto %s;\n", endlabelstr);
759: printf ("\t}\n");
760: need_endlabel = 1;
761: start_brace ();
762: }
763:
764: if (flags & GF_PREFETCH)
765: fill_prefetch_next ();
766:
767: if (getv == 1) {
768: start_brace ();
769: if (using_ce020) {
770: switch (size) {
771: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break;
772: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break;
773: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, srcl, name); count_read += 2; break;
774: default: abort ();
775: }
776: } else if (using_ce) {
777: switch (size) {
778: case sz_byte: printf ("\tuae_s8 %s = get_byte_ce (%sa);\n", name, name); count_read++; break;
779: case sz_word: printf ("\tuae_s16 %s = get_word_ce (%sa);\n", name, name); count_read++; break;
780: case sz_long: printf ("\tuae_s32 %s = get_word_ce (%sa) << 16; %s |= get_word_ce (%sa + 2);\n", name, name, name, name); count_read += 2; break;
781: default: abort ();
782: }
783: } else if (using_mmu) {
784: if (flags & GF_FC) {
785: switch (size) {
1.1.1.3 ! root 786: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = sfc%s_get_byte (%sa);\n", name, mmu_postfix, name); break;
! 787: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = sfc%s_get_word (%sa);\n", name, mmu_postfix, name); break;
! 788: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = sfc%s_get_long (%sa);\n", name, mmu_postfix, name); break;
1.1 root 789: default: abort ();
790: }
791: } else {
792: switch (size) {
1.1.1.3 ! root 793: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = get_byte_mmu%s (%sa);\n", name, mmu_postfix, name); break;
! 794: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = get_word_mmu%s (%sa);\n", name, mmu_postfix, name); break;
! 795: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = get_long_mmu%s (%sa);\n", name, mmu_postfix, name); break;
1.1 root 796: default: abort ();
797: }
798: }
799: } else {
800: switch (size) {
801: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = get_byte (%sa);\n", name, name); count_read++; break;
802: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = get_word (%sa);\n", name, name); count_read++; break;
803: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = get_long (%sa);\n", name, name); count_read += 2; break;
804: default: abort ();
805: }
806: }
807: }
808:
809: /* We now might have to fix up the register for pre-dec or post-inc
810: * addressing modes. */
811: if (!movem)
812: switch (mode) {
813: case Aipi:
814: if (fixup == 1) {
815: printf ("\tmmufixup[%d].reg = %s;\n", fixupcnt, reg);
816: printf ("\tmmufixup[%d].value = m68k_areg (regs, %s);\n", fixupcnt, reg);
817: }
818: switch (size) {
819: case sz_byte:
820: printf ("\tm68k_areg (regs, %s) += areg_byteinc[%s];\n", reg, reg);
821: break;
822: case sz_word:
823: printf ("\tm68k_areg (regs, %s) += 2;\n", reg);
824: break;
825: case sz_long:
826: printf ("\tm68k_areg (regs, %s) += 4;\n", reg);
827: break;
828: default:
829: abort ();
830: }
831: break;
832: case Apdi:
833: if (fixup == 1) {
834: printf ("\tmmufixup[%d].reg = %s;\n", fixupcnt, reg);
835: printf ("\tmmufixup[%d].value = m68k_areg (regs, %s);\n", fixupcnt, reg);
836: }
837: printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
838: break;
839: default:
840: break;
841: }
842: }
843:
844: static void genamode_fixup (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags, int fixup)
845: {
846: if (fixup != 2) {
847: genamode2 (mode, reg, size, name, getv, movem, flags, fixup);
848: } else {
849: if (!movem) {
850: switch ((int)mode)
851: {
852: case Aipi:
853: case Apdi:
854: printf ("\tmmufixup[0].reg = -1;\n"/*, fixupcnt*/);
855: break;
856: }
857: }
858: }
859: }
860:
861: static void genamode (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags)
862: {
863: genamode2 (mode, reg, size, name, getv, movem, flags, 0);
864: }
865: static void genamode_pre (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags)
866: {
867: genamode_fixup (mode, reg, size, name, getv, movem, flags, using_mmu ? 1 : 0);
868: }
869: static void genamode_post (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags)
870: {
871: if (using_mmu)
872: genamode_fixup (mode, reg, size, name, getv, movem, flags, 2);
873: }
874:
875: static void genastore_2 (const char *from, amodes mode, const char *reg, wordsizes size, const char *to, int store_dir, int flags)
876: {
877: switch (mode) {
878: case Dreg:
879: switch (size) {
880: case sz_byte:
881: printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
882: break;
883: case sz_word:
884: printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
885: break;
886: case sz_long:
887: printf ("\tm68k_dreg (regs, %s) = (%s);\n", reg, from);
888: break;
889: default:
890: abort ();
891: }
892: break;
893: case Areg:
894: switch (size) {
895: case sz_word:
896: printf ("\tm68k_areg (regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
897: break;
898: case sz_long:
899: printf ("\tm68k_areg (regs, %s) = (%s);\n", reg, from);
900: break;
901: default:
902: abort ();
903: }
904: break;
905: case Aind:
906: case Aipi:
907: case Apdi:
908: case Ad16:
909: case Ad8r:
910: case absw:
911: case absl:
912: case PC16:
913: case PC8r:
914: gen_set_fault_pc ();
915: if (using_ce020) {
916: switch (size) {
917: case sz_byte:
918: printf ("\t%s (%sa, %s);\n", dstb, to, from);
919: count_write++;
920: break;
921: case sz_word:
922: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
923: abort ();
924: printf ("\t%s (%sa, %s);\n", dstw, to, from);
925: count_write++;
926: break;
927: case sz_long:
928: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
929: abort ();
930: printf ("\t%s (%sa, %s);\n", dstl, to, from);
931: count_write += 2;
932: break;
933: default:
934: abort ();
935: }
936: } else if (using_ce) {
937: switch (size) {
938: case sz_byte:
939: printf ("\tput_byte_ce (%sa, %s);\n", to, from);
940: count_write++;
941: break;
942: case sz_word:
943: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
944: abort ();
945: printf ("\tput_word_ce (%sa, %s);\n", to, from);
946: count_write++;
947: break;
948: case sz_long:
949: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
950: abort ();
951: if (store_dir)
952: printf ("\tput_word_ce (%sa + 2, %s); put_word_ce (%sa, %s >> 16);\n", to, from, to, from);
953: else
954: printf ("\tput_word_ce (%sa, %s >> 16); put_word_ce (%sa + 2, %s);\n", to, from, to, from);
955: count_write += 2;
956: break;
957: default:
958: abort ();
959: }
960: } else if (using_mmu) {
961: switch (size) {
962: case sz_byte:
963: insn_n_cycles += 4;
964: if (flags & GF_FC)
1.1.1.3 ! root 965: printf ("\tdfc%s_put_byte (%sa, %s);\n", mmu_postfix, to, from);
1.1 root 966: else
1.1.1.3 ! root 967: printf ("\tput_byte_mmu%s (%sa, %s);\n", mmu_postfix, to, from);
1.1 root 968: break;
969: case sz_word:
970: insn_n_cycles += 4;
971: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
972: abort ();
973: if (flags & GF_FC)
1.1.1.3 ! root 974: printf ("\tdfc%s_put_word (%sa, %s);\n", mmu_postfix, to, from);
1.1 root 975: else
1.1.1.3 ! root 976: printf ("\tput_word_mmu%s (%sa, %s);\n", mmu_postfix, to, from);
1.1 root 977: break;
978: case sz_long:
979: insn_n_cycles += 8;
980: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
981: abort ();
982: if (flags & GF_FC)
1.1.1.3 ! root 983: printf ("\tdfc%s_put_long (%sa, %s);\n", mmu_postfix, to, from);
1.1 root 984: else
1.1.1.3 ! root 985: printf ("\tput_long_mmu%s (%sa, %s);\n", mmu_postfix, to, from);
1.1 root 986: break;
987: default:
988: abort ();
989: }
990: } else {
991: switch (size) {
992: case sz_byte:
993: insn_n_cycles += 4;
994: printf ("\tput_byte (%sa, %s);\n", to, from);
995: count_write++;
996: break;
997: case sz_word:
998: insn_n_cycles += 4;
999: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1000: abort ();
1001: printf ("\tput_word (%sa, %s);\n", to, from);
1002: count_write++;
1003: break;
1004: case sz_long:
1005: insn_n_cycles += 8;
1006: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1007: abort ();
1008: printf ("\tput_long (%sa, %s);\n", to, from);
1009: count_write += 2;
1010: break;
1011: default:
1012: abort ();
1013: }
1014: }
1015: break;
1016: case imm:
1017: case imm0:
1018: case imm1:
1019: case imm2:
1020: case immi:
1021: abort ();
1022: break;
1023: default:
1024: abort ();
1025: }
1026: }
1027:
1028: static void genastore (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
1029: {
1030: genastore_2 (from, mode, reg, size, to, 0, 0);
1031: }
1032: static void genastore_rev (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
1033: {
1034: genastore_2 (from, mode, reg, size, to, 1, 0);
1035: }
1036: static void genastore_fc (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
1037: {
1038: genastore_2 (from, mode, reg, size, to, 1, GF_FC);
1039: }
1040:
1041: static void genmovemel (uae_u16 opcode)
1042: {
1043: char getcode[100];
1044: int size = table68k[opcode].size == sz_long ? 4 : 2;
1045:
1046: if (table68k[opcode].size == sz_long) {
1047: sprintf (getcode, "%s (srca)", srcl);
1048: } else {
1049: sprintf (getcode, "(uae_s32)(uae_s16)%s (srca)", srcw);
1050: }
1051: count_read += table68k[opcode].size == sz_long ? 2 : 1;
1052: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1053: printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1054: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, 0);
1055: start_brace ();
1056: printf ("\twhile (dmask) { m68k_dreg (regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask]; }\n",
1057: getcode, size);
1058: printf ("\twhile (amask) { m68k_areg (regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask]; }\n",
1059: getcode, size);
1060:
1061: if (table68k[opcode].dmode == Aipi) {
1062: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
1063: count_read++;
1064: }
1065: count_ncycles++;
1066: fill_prefetch_next ();
1067: }
1068:
1069: static void genmovemel_ce (uae_u16 opcode)
1070: {
1071: int size = table68k[opcode].size == sz_long ? 4 : 2;
1072: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1073: printf ("\tunsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1074: printf ("\tuae_u32 v;\n");
1075: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, GF_AA);
1076: if (table68k[opcode].dmode == Ad8r || table68k[opcode].dmode == PC8r)
1077: addcycles000 (2);
1078: start_brace ();
1079: if (table68k[opcode].size == sz_long) {
1080: printf ("\twhile (dmask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_dreg (regs, movem_index1[dmask]) = v; srca += %d; dmask = movem_next[dmask]; }\n",
1081: size);
1082: printf ("\twhile (amask) { v = get_word_ce(srca) << 16; v |= get_word_ce(srca + 2); m68k_areg (regs, movem_index1[amask]) = v; srca += %d; amask = movem_next[amask]; }\n",
1083: size);
1084: } else {
1085: printf ("\twhile (dmask) { m68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += %d; dmask = movem_next[dmask]; }\n",
1086: size);
1087: printf ("\twhile (amask) { m68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word_ce(srca); srca += %d; amask = movem_next[amask]; }\n",
1088: size);
1089: }
1090: printf ("\tget_word_ce (srca);\n"); // and final extra word fetch that goes nowhere..
1091: count_read++;
1092: if (table68k[opcode].dmode == Aipi)
1093: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
1094: count_ncycles++;
1095: fill_prefetch_next ();
1096: }
1097:
1098: static void genmovemle (uae_u16 opcode)
1099: {
1100: char putcode[100];
1101: int size = table68k[opcode].size == sz_long ? 4 : 2;
1102:
1103: if (table68k[opcode].size == sz_long) {
1104: sprintf (putcode, "%s (srca", dstl);
1105: } else {
1106: sprintf (putcode, "%s (srca", dstw);
1107: }
1108: count_write += table68k[opcode].size == sz_long ? 2 : 1;
1109:
1110: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1111: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, 0);
1112: start_brace ();
1113: if (table68k[opcode].dmode == Apdi) {
1114: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
1115: if (!using_mmu)
1116: printf ("\tint type = get_cpu_model() >= 68020;\n");
1117: printf ("\twhile (amask) {\n");
1118: printf ("\t\tsrca -= %d;\n", size);
1119: if (!using_mmu)
1120: printf ("\t\tif (type) m68k_areg (regs, dstreg) = srca;\n");
1121: printf ("\t\t%s, m68k_areg (regs, movem_index2[amask]));\n", putcode);
1122: printf ("\t\tamask = movem_next[amask];\n");
1123: printf ("\t}\n");
1124: printf ("\twhile (dmask) { srca -= %d; %s, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
1125: size, putcode);
1126: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
1127: } else {
1128: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1129: printf ("\twhile (dmask) { %s, m68k_dreg (regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
1130: putcode, size);
1131: printf ("\twhile (amask) { %s, m68k_areg (regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
1132: putcode, size);
1133: }
1134: count_ncycles++;
1135: fill_prefetch_next ();
1136: }
1137:
1138: static void genmovemle_ce (uae_u16 opcode)
1139: {
1140: int size = table68k[opcode].size == sz_long ? 4 : 2;
1141: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1142: genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, GF_AA);
1143:
1144: if (table68k[opcode].dmode == Ad8r || table68k[opcode].dmode == PC8r) {
1145: addcycles000 (2);
1146: }
1147: start_brace ();
1148: if (table68k[opcode].size == sz_long) {
1149: if (table68k[opcode].dmode == Apdi) {
1150: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
1151: printf ("\twhile (amask) { srca -= %d; put_word_ce (srca, m68k_areg (regs, movem_index2[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
1152: size);
1153: printf ("\twhile (dmask) { srca -= %d; put_word_ce (srca, m68k_dreg (regs, movem_index2[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
1154: size);
1155: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
1156: } else {
1157: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1158: printf ("\twhile (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16); put_word_ce (srca + 2, m68k_dreg (regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
1159: size);
1160: printf ("\twhile (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask]) >> 16); put_word_ce (srca + 2, m68k_areg (regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
1161: size);
1162: }
1163: } else {
1164: if (table68k[opcode].dmode == Apdi) {
1165: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
1166: printf ("\twhile (amask) { srca -= %d; put_word_ce (srca, m68k_areg (regs, movem_index2[amask])); amask = movem_next[amask]; }\n",
1167: size);
1168: printf ("\twhile (dmask) { srca -= %d; put_word_ce (srca, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
1169: size);
1170: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
1171: } else {
1172: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1173: printf ("\twhile (dmask) { put_word_ce (srca, m68k_dreg (regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
1174: size);
1175: printf ("\twhile (amask) { put_word_ce (srca, m68k_areg (regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
1176: size);
1177: }
1178: }
1179: count_ncycles++;
1180: fill_prefetch_next ();
1181: }
1182:
1183: static void duplicate_carry (int n)
1184: {
1185: int i;
1186: for (i = 0; i <= n; i++)
1187: printf ("\t");
1188: printf ("COPY_CARRY ();\n");
1189: }
1190:
1191: typedef enum
1192: {
1193: flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_z, flag_zn,
1194: flag_av, flag_sv
1195: }
1196: flagtypes;
1197:
1198: static void genflags_normal (flagtypes type, wordsizes size, const char *value, const char *src, const char *dst)
1199: {
1200: char vstr[100], sstr[100], dstr[100];
1201: char usstr[100], udstr[100];
1202: char unsstr[100], undstr[100];
1203:
1204: switch (size) {
1205: case sz_byte:
1206: strcpy (vstr, "((uae_s8)(");
1207: strcpy (usstr, "((uae_u8)(");
1208: break;
1209: case sz_word:
1210: strcpy (vstr, "((uae_s16)(");
1211: strcpy (usstr, "((uae_u16)(");
1212: break;
1213: case sz_long:
1214: strcpy (vstr, "((uae_s32)(");
1215: strcpy (usstr, "((uae_u32)(");
1216: break;
1217: default:
1218: abort ();
1219: }
1220: strcpy (unsstr, usstr);
1221:
1222: strcpy (sstr, vstr);
1223: strcpy (dstr, vstr);
1224: strcat (vstr, value);
1225: strcat (vstr, "))");
1226: strcat (dstr, dst);
1227: strcat (dstr, "))");
1228: strcat (sstr, src);
1229: strcat (sstr, "))");
1230:
1231: strcpy (udstr, usstr);
1232: strcat (udstr, dst);
1233: strcat (udstr, "))");
1234: strcat (usstr, src);
1235: strcat (usstr, "))");
1236:
1237: strcpy (undstr, unsstr);
1238: strcat (unsstr, "-");
1239: strcat (undstr, "~");
1240: strcat (undstr, dst);
1241: strcat (undstr, "))");
1242: strcat (unsstr, src);
1243: strcat (unsstr, "))");
1244:
1245: switch (type) {
1246: case flag_logical_noclobber:
1247: case flag_logical:
1248: case flag_z:
1249: case flag_zn:
1250: case flag_av:
1251: case flag_sv:
1252: case flag_addx:
1253: case flag_subx:
1254: break;
1255:
1256: case flag_add:
1257: start_brace ();
1258: printf ("uae_u32 %s = %s + %s;\n", value, dstr, sstr);
1259: break;
1260: case flag_sub:
1261: case flag_cmp:
1262: start_brace ();
1263: printf ("uae_u32 %s = %s - %s;\n", value, dstr, sstr);
1264: break;
1265: }
1266:
1267: switch ((int)type) {
1268: case flag_logical_noclobber:
1269: case flag_logical:
1270: case flag_zn:
1271: break;
1272:
1273: case flag_add:
1274: case flag_sub:
1275: case flag_addx:
1276: case flag_subx:
1277: case flag_cmp:
1278: case flag_av:
1279: case flag_sv:
1280: start_brace ();
1281: printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
1282: printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
1283: printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
1284: break;
1285: }
1286:
1287: switch (type) {
1288: case flag_logical:
1289: printf ("\tCLEAR_CZNV ();\n");
1290: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
1291: printf ("\tSET_NFLG (%s < 0);\n", vstr);
1292: break;
1293: case flag_logical_noclobber:
1294: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
1295: printf ("\tSET_NFLG (%s < 0);\n", vstr);
1296: break;
1297: case flag_av:
1298: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
1299: break;
1300: case flag_sv:
1301: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
1302: break;
1303: case flag_z:
1304: printf ("\tSET_ZFLG (GET_ZFLG () & (%s == 0));\n", vstr);
1305: break;
1306: case flag_zn:
1307: printf ("\tSET_ZFLG (GET_ZFLG () & (%s == 0));\n", vstr);
1308: printf ("\tSET_NFLG (%s < 0);\n", vstr);
1309: break;
1310: case flag_add:
1311: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
1312: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
1313: printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
1314: duplicate_carry (0);
1315: printf ("\tSET_NFLG (flgn != 0);\n");
1316: break;
1317: case flag_sub:
1318: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
1319: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
1320: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
1321: duplicate_carry (0);
1322: printf ("\tSET_NFLG (flgn != 0);\n");
1323: break;
1324: case flag_addx:
1325: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
1326: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
1327: duplicate_carry (0);
1328: break;
1329: case flag_subx:
1330: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
1331: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
1332: duplicate_carry (0);
1333: break;
1334: case flag_cmp:
1335: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
1336: printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
1337: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
1338: printf ("\tSET_NFLG (flgn != 0);\n");
1339: break;
1340: }
1341: }
1342:
1343: static void genflags (flagtypes type, wordsizes size, const char *value, const char *src, const char *dst)
1344: {
1345: /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have
1346: them in the appropriate m68k.h files and use just one copy of this
1347: code here. The API can be changed if necessary. */
1348: if (optimized_flags) {
1349: switch (type) {
1350: case flag_add:
1351: case flag_sub:
1352: start_brace ();
1353: printf ("\tuae_u32 %s;\n", value);
1354: break;
1355:
1356: default:
1357: break;
1358: }
1359:
1360: /* At least some of those casts are fairly important! */
1361: switch (type) {
1362: case flag_logical_noclobber:
1363: printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
1364: if (strcmp (value, "0") == 0) {
1365: printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
1366: } else {
1367: switch (size) {
1368: case sz_byte: printf ("\toptflag_testb (regs, (uae_s8)(%s));\n", value); break;
1369: case sz_word: printf ("\toptflag_testw (regs, (uae_s16)(%s));\n", value); break;
1370: case sz_long: printf ("\toptflag_testl (regs, (uae_s32)(%s));\n", value); break;
1371: }
1372: printf ("\tIOR_CZNV (oldcznv);\n");
1373: }
1374: printf ("\t}\n");
1375: return;
1376: case flag_logical:
1377: if (strcmp (value, "0") == 0) {
1378: printf ("\tSET_CZNV (FLAGVAL_Z);\n");
1379: } else {
1380: switch (size) {
1381: case sz_byte: printf ("\toptflag_testb (regs, (uae_s8)(%s));\n", value); break;
1382: case sz_word: printf ("\toptflag_testw (regs, (uae_s16)(%s));\n", value); break;
1383: case sz_long: printf ("\toptflag_testl (regs, (uae_s32)(%s));\n", value); break;
1384: }
1385: }
1386: return;
1387:
1388: case flag_add:
1389: switch (size) {
1390: case sz_byte: printf ("\toptflag_addb (regs, %s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
1391: case sz_word: printf ("\toptflag_addw (regs, %s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
1392: case sz_long: printf ("\toptflag_addl (regs, %s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
1393: }
1394: return;
1395:
1396: case flag_sub:
1397: switch (size) {
1398: case sz_byte: printf ("\toptflag_subb (regs, %s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
1399: case sz_word: printf ("\toptflag_subw (regs, %s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
1400: case sz_long: printf ("\toptflag_subl (regs, %s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
1401: }
1402: return;
1403:
1404: case flag_cmp:
1405: switch (size) {
1406: case sz_byte: printf ("\toptflag_cmpb (regs, (uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
1407: case sz_word: printf ("\toptflag_cmpw (regs, (uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
1408: case sz_long: printf ("\toptflag_cmpl (regs, (uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
1409: }
1410: return;
1411:
1412: default:
1413: break;
1414: }
1415: }
1416:
1417: genflags_normal (type, size, value, src, dst);
1418: }
1419:
1420: static void force_range_for_rox (const char *var, wordsizes size)
1421: {
1422: /* Could do a modulo operation here... which one is faster? */
1423: switch (size) {
1424: case sz_long:
1425: printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
1426: break;
1427: case sz_word:
1428: printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
1429: printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
1430: break;
1431: case sz_byte:
1432: printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
1433: printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
1434: printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
1435: break;
1436: }
1437: }
1438:
1439: static const char *cmask (wordsizes size)
1440: {
1441: switch (size) {
1442: case sz_byte: return "0x80";
1443: case sz_word: return "0x8000";
1444: case sz_long: return "0x80000000";
1445: default: abort ();
1446: }
1447: }
1448:
1449: static int source_is_imm1_8 (struct instr *i)
1450: {
1451: return i->stype == 3;
1452: }
1453:
1454: static void shift_ce (amodes dmode, int size)
1455: {
1456: if (using_ce && isreg (dmode)) {
1457: int c = size == sz_long ? 4 : 2;
1458: printf ("\t{\n");
1459: printf ("\t\tint cycles = %d;\n", c);
1460: printf ("\t\tcycles += 2 * ccnt;\n");
1461: addcycles000_3 ("\t\t");
1462: printf ("\t}\n");
1463: count_cycles += c;
1464: }
1465: }
1466:
1467: // BCHG/BSET/BCLR Dx,Dx or #xx,Dx adds 2 cycles if bit number > 15
1468: static void bsetcycles (struct instr *curi)
1469: {
1470: if (curi->size == sz_byte) {
1471: printf ("\tsrc &= 7;\n");
1472: } else {
1473: printf ("\tsrc &= 31;\n");
1474: if (isreg (curi->dmode)) {
1475: addcycles000 (2);
1476: if (curi->mnemo != i_BTST && using_ce) {
1477: printf ("\tif (src > 15) do_cycles_ce000 (2);\n");
1478: count_ncycles++;
1479: }
1480: }
1481: }
1482: }
1483:
1484: static int islongimm (struct instr *curi)
1485: {
1486: return (curi->size == sz_long && (curi->smode == Dreg || curi->smode == imm));
1487: }
1488:
1489: static void gen_opcode (unsigned long int opcode)
1490: {
1491: struct instr *curi = table68k + opcode;
1492:
1493: insn_n_cycles = using_prefetch ? 0 : 4;
1494:
1495: /* Store the family of the instruction (used to check for pairing on ST)
1496: * and leave some space for patching in the current cycles later */
1497: printf ("\tOpcodeFamily = %d;\n", curi->mnemo);
1498:
1499: if (using_ce020) {
1500: if (using_ce020 == 2) {
1501: ce020_prefetch_long = "get_long_ce030_prefetch";
1502: ce020_prefetch_word = "get_word_ce030_prefetch";
1503: srcl = "get_long_ce030";
1504: dstl = "put_long_ce030";
1505: srcw = "get_word_ce030";
1506: dstw = "put_word_ce030";
1507: srcb = "get_byte_ce030";
1508: dstb = "put_byte_ce030";
1509: } else {
1510: ce020_prefetch_long = "get_long_ce020_prefetch";
1511: ce020_prefetch_word = "get_word_ce020_prefetch";
1512: srcl = "get_long_ce020";
1513: dstl = "put_long_ce020";
1514: srcw = "get_word_ce020";
1515: dstw = "put_word_ce020";
1516: srcb = "get_byte_ce020";
1517: dstb = "put_byte_ce020";
1518: }
1.1.1.3 ! root 1519: } else if (using_mmu && cpu_level == 3) {
! 1520: srcl = "get_long_mmu030";
! 1521: dstl = "put_long_mmu030";
! 1522: srcw = "get_word_mmu030";
! 1523: dstw = "put_word_mmu030";
! 1524: srcb = "get_byte_mmu030";
! 1525: dstb = "put_byte_mmu030";
1.1 root 1526: } else if (using_mmu) {
1527: srcl = "get_long_mmu";
1528: dstl = "put_long_mmu";
1529: srcw = "get_word_mmu";
1530: dstw = "put_word_mmu";
1531: srcb = "get_byte_mmu";
1532: dstb = "put_byte_mmu";
1533: } else if (using_ce) {
1534: srcl = "get_long_ce";
1535: dstl = "put_long_ce";
1536: srcw = "get_word_ce";
1537: dstw = "put_word_ce";
1538: srcb = "get_byte_ce";
1539: dstb = "put_byte_ce";
1540: } else {
1541: srcl = "get_long";
1542: dstl = "put_long";
1543: srcw = "get_word";
1544: dstw = "put_word";
1545: srcb = "get_byte";
1546: dstb = "put_byte";
1547: }
1548:
1549: insn_n_cycles020 = 0;
1550:
1551: start_brace ();
1552: m68k_pc_offset = 2;
1553: switch (curi->plev) {
1554: case 0: /* not privileged */
1555: break;
1556: case 1: /* unprivileged only on 68000 */
1557: if (cpu_level == 0)
1558: break;
1559: if (next_cpu_level < 0)
1560: next_cpu_level = 0;
1561:
1562: /* fall through */
1563: case 2: /* priviledged */
1564: printf ("if (!regs.s) { Exception (8, 0 ,M68000_EXC_SRC_CPU); goto %s; }\n", endlabelstr);
1565: need_endlabel = 1;
1566: start_brace ();
1567: break;
1568: case 3: /* privileged if size == word */
1569: if (curi->size == sz_byte)
1570: break;
1571: printf ("if (!regs.s) { Exception (8, 0 ,M68000_EXC_SRC_CPU); goto %s; }\n", endlabelstr);
1572: need_endlabel = 1;
1573: start_brace ();
1574: break;
1575: }
1576: switch (curi->mnemo) {
1577: case i_OR:
1578: case i_AND:
1579: case i_EOR:
1580: {
1581: int c = 0;
1582: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1583: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1584: printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
1585: genflags (flag_logical, curi->size, "src", "", "");
1586: if (curi->dmode == Dreg && curi->size == sz_long) {
1587: c += 2;
1588: if (curi->smode == imm || curi->smode == Dreg)
1589: c += 2;
1590: }
1591: fill_prefetch_next ();
1592: if (c > 0)
1593: addcycles000 (c);
1594: genastore_rev ("src", curi->dmode, "dstreg", curi->size, "dst");
1595: break;
1596: }
1597: // all SR/CCR modifications have dummy read access
1598: case i_ORSR:
1599: case i_EORSR:
1600: printf ("\tMakeSR ();\n");
1601: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1602: dummy_prefetch ();
1603: if (curi->size == sz_byte) {
1604: printf ("\tsrc &= 0xFF;\n");
1605: }
1606: addcycles000 (8);
1607: fill_prefetch_next ();
1608: printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
1609: printf ("\tMakeFromSR ();\n");
1610: break;
1611: case i_ANDSR:
1612: printf ("\tMakeSR ();\n");
1613: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1614: dummy_prefetch ();
1615: if (curi->size == sz_byte) {
1616: printf ("\tsrc |= 0xFF00;\n");
1617: }
1618: addcycles000 (8);
1619: fill_prefetch_next ();
1620: printf ("\tregs.sr &= src;\n");
1621: printf ("\tMakeFromSR ();\n");
1622: break;
1623: case i_SUB:
1624: {
1625: int c = 0;
1626: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1627: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1628: if (curi->dmode == Dreg) {
1629: if (curi->size == sz_long) {
1630: c += 2;
1631: if (curi->smode == imm || curi->smode == immi || curi->smode == Dreg)
1632: c += 2;
1633: }
1634: }
1635: fill_prefetch_next ();
1636: if (c > 0)
1637: addcycles000 (c);
1638: start_brace ();
1639: genflags (flag_sub, curi->size, "newv", "src", "dst");
1640: genastore_rev ("newv", curi->dmode, "dstreg", curi->size, "dst");
1641: break;
1642: }
1643: case i_SUBA:
1644: {
1645: int c = 0;
1646: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1647: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
1648: if (curi->smode == immi) {
1649: // SUBAQ.x is always 8 cycles
1650: c += 4;
1651: } else {
1652: c = curi->size == sz_long ? 2 : 4;
1653: if (islongimm (curi))
1654: c += 2;
1655: }
1656: fill_prefetch_next ();
1657: if (c > 0)
1658: addcycles000 (c);
1659: start_brace ();
1660: printf ("\tuae_u32 newv = dst - src;\n");
1661: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1662: break;
1663: }
1664: case i_SUBX:
1665: if (!isreg (curi->smode))
1666: addcycles000 (2);
1667: genamode_pre (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1668: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
1669: genamode_post (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1670: fill_prefetch_next ();
1671: if (curi->size == sz_long && isreg (curi->smode))
1672: addcycles000 (4);
1673: start_brace ();
1674: printf ("\tuae_u32 newv = dst - src - (GET_XFLG () ? 1 : 0);\n");
1675: genflags (flag_subx, curi->size, "newv", "src", "dst");
1676: genflags (flag_zn, curi->size, "newv", "", "");
1677: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1678: break;
1679: case i_SBCD:
1680: if (!isreg (curi->smode))
1681: addcycles000 (2);
1682: genamode_pre (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1683: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
1684: genamode_post (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1685: fill_prefetch_next ();
1686: start_brace ();
1687: printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG () ? 1 : 0);\n");
1688: printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
1689: printf ("\tuae_u16 newv, tmp_newv;\n");
1690: printf ("\tint bcd = 0;\n");
1691: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
1692: printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
1693: printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG () ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
1694: printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG () ? 1 : 0)) & 0x300) > 0xFF);\n");
1695: duplicate_carry (0);
1696: /* Manual says bits NV are undefined though a real 68040/060 don't change them */
1697: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
1698: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
1699: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
1700: genflags (flag_z, curi->size, "newv", "", "");
1701: } else {
1702: genflags (flag_zn, curi->size, "newv", "", "");
1703: printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
1704: }
1705: if (isreg (curi->smode))
1706: addcycles000 (2);
1707: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1708: break;
1709: case i_ADD:
1710: {
1711: int c = 0;
1712: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1713: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1714: if (curi->dmode == Dreg) {
1715: if (curi->size == sz_long) {
1716: c += 2;
1717: if (curi->smode == imm || curi->smode == immi || curi->smode == Dreg)
1718: c += 2;
1719: }
1720: }
1721: fill_prefetch_next ();
1722: if (c > 0)
1723: addcycles000 (c);
1724: start_brace ();
1725: genflags (flag_add, curi->size, "newv", "src", "dst");
1726: genastore_rev ("newv", curi->dmode, "dstreg", curi->size, "dst");
1727: break;
1728: }
1729: case i_ADDA:
1730: {
1731: int c = 0;
1732: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1733: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
1734: if (curi->smode == immi) {
1735: // ADDAQ.x is always 8 cycles
1736: c += 4;
1737: } else {
1738: c = curi->size == sz_long ? 2 : 4;
1739: if (islongimm (curi))
1740: c += 2;
1741: }
1742: fill_prefetch_next ();
1743: if (c > 0)
1744: addcycles000 (c);
1745: start_brace ();
1746: printf ("\tuae_u32 newv = dst + src;\n");
1747: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
1748: break;
1749: }
1750: case i_ADDX:
1751: if (!isreg (curi->smode))
1752: addcycles000 (2);
1753: genamode_pre (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1754: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
1755: genamode_post (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1756: fill_prefetch_next ();
1757: if (curi->size == sz_long && isreg (curi->smode))
1758: addcycles000 (4);
1759: start_brace ();
1760: printf ("\tuae_u32 newv = dst + src + (GET_XFLG () ? 1 : 0);\n");
1761: genflags (flag_addx, curi->size, "newv", "src", "dst");
1762: genflags (flag_zn, curi->size, "newv", "", "");
1763: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1764: break;
1765: case i_ABCD:
1766: if (!isreg (curi->smode))
1767: addcycles000 (2);
1768: genamode_pre (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1769: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
1770: genamode_post (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1771: fill_prefetch_next ();
1772: start_brace ();
1773: printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG () ? 1 : 0);\n");
1774: printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
1775: printf ("\tuae_u16 newv, tmp_newv;\n");
1776: printf ("\tint cflg;\n");
1777: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;");
1778: printf ("\tif (newv_lo > 9) { newv += 6; }\n");
1779: printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
1780: printf ("\tif (cflg) newv += 0x60;\n");
1781: printf ("\tSET_CFLG (cflg);\n");
1782: duplicate_carry (0);
1783: /* Manual says bits NV are undefined though a real 68040 don't change them */
1784: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
1785: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
1786: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
1787: genflags (flag_z, curi->size, "newv", "", "");
1788: }
1789: else {
1790: genflags (flag_zn, curi->size, "newv", "", "");
1791: printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
1792: }
1793: if (isreg (curi->smode))
1794: addcycles000 (2);
1795: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
1796: break;
1797: case i_NEG:
1798: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1799: fill_prefetch_next ();
1800: if (isreg (curi->smode) && curi->size == sz_long)
1801: addcycles000 (2);
1802: start_brace ();
1803: genflags (flag_sub, curi->size, "dst", "src", "0");
1804: genastore_rev ("dst", curi->smode, "srcreg", curi->size, "src");
1805: break;
1806: case i_NEGX:
1807: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1808: fill_prefetch_next ();
1809: if (isreg (curi->smode) && curi->size == sz_long)
1810: addcycles000 (2);
1811: start_brace ();
1812: printf ("\tuae_u32 newv = 0 - src - (GET_XFLG () ? 1 : 0);\n");
1813: genflags (flag_subx, curi->size, "newv", "src", "0");
1814: genflags (flag_zn, curi->size, "newv", "", "");
1815: genastore_rev ("newv", curi->smode, "srcreg", curi->size, "src");
1816: break;
1817: case i_NBCD:
1818: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1819: if (isreg (curi->smode))
1820: addcycles000 (2);
1821: fill_prefetch_next ();
1822: start_brace ();
1823: printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG () ? 1 : 0);\n");
1824: printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
1825: printf ("\tuae_u16 newv;\n");
1826: printf ("\tint cflg;\n");
1827: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
1828: printf ("\tnewv = newv_hi + newv_lo;");
1829: printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
1830: printf ("\tif (cflg) newv -= 0x60;\n");
1831: printf ("\tSET_CFLG (cflg);\n");
1832: duplicate_carry(0);
1833: /* Manual says bits NV are undefined though a real 68040 don't change them */
1834: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
1835: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
1836: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
1837: genflags (flag_z, curi->size, "newv", "", "");
1838: }
1839: else {
1840: genflags (flag_zn, curi->size, "newv", "", "");
1841: }
1842: genastore ("newv", curi->smode, "srcreg", curi->size, "src");
1843: break;
1844: case i_CLR:
1845: genamode (curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0);
1846: fill_prefetch_next ();
1847: if (isreg (curi->smode) && curi->size == sz_long)
1848: addcycles000 (2);
1849: genflags (flag_logical, curi->size, "0", "", "");
1850: genastore_rev ("0", curi->smode, "srcreg", curi->size, "src");
1851: break;
1852: case i_NOT:
1853: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1854: fill_prefetch_next ();
1855: if (isreg (curi->smode) && curi->size == sz_long)
1856: addcycles000 (2);
1857: start_brace ();
1858: printf ("\tuae_u32 dst = ~src;\n");
1859: genflags (flag_logical, curi->size, "dst", "", "");
1860: genastore_rev ("dst", curi->smode, "srcreg", curi->size, "src");
1861: break;
1862: case i_TST:
1863: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1864: fill_prefetch_next ();
1865: genflags (flag_logical, curi->size, "src", "", "");
1866: break;
1867: case i_BTST:
1868: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1869: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1870: fill_prefetch_next ();
1871: bsetcycles (curi);
1872: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1873: break;
1874: case i_BCHG:
1875: case i_BCLR:
1876: case i_BSET:
1877: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1878: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1879: fill_prefetch_next ();
1880: bsetcycles (curi);
1881: // bclr needs 1 extra cycle
1882: if (curi->mnemo == i_BCLR && curi->dmode == Dreg)
1883: addcycles000 (2);
1884: if (curi->mnemo == i_BCHG) {
1885: printf ("\tdst ^= (1 << src);\n");
1886: printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
1887: } else if (curi->mnemo == i_BCLR) {
1888: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1889: printf ("\tdst &= ~(1 << src);\n");
1890: } else if (curi->mnemo == i_BSET) {
1891: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
1892: printf ("\tdst |= (1 << src);\n");
1893: }
1894: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
1895: break;
1896: case i_CMPM:
1897: // confirmed
1898: genamode_pre (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1899: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
1900: genamode_post (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
1901: fill_prefetch_next ();
1902: start_brace ();
1903: genflags (flag_cmp, curi->size, "newv", "src", "dst");
1904: break;
1905: case i_CMP:
1906: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1907: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1908: fill_prefetch_next ();
1909: if (curi->dmode == Dreg && curi->size == sz_long)
1910: addcycles000 (2);
1911: start_brace ();
1912: genflags (flag_cmp, curi->size, "newv", "src", "dst");
1913: break;
1914: case i_CMPA:
1915: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1916: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
1917: fill_prefetch_next ();
1918: addcycles000 (2);
1919: start_brace ();
1920: genflags (flag_cmp, sz_long, "newv", "src", "dst");
1921: break;
1922: /* The next two are coded a little unconventional, but they are doing
1923: * weird things... */
1924: case i_MVPRM: // MOVEP R->M
1925: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1926: printf ("\tuaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0));
1927: if (curi->size == sz_word) {
1928: printf ("\t%s (memp, src >> 8); %s (memp + 2, src);\n", dstb, dstb);
1929: count_write += 2;
1930: } else {
1931: printf ("\t%s (memp, src >> 24); %s (memp + 2, src >> 16);\n", dstb, dstb);
1932: printf ("\t%s (memp + 4, src >> 8); %s (memp + 6, src);\n", dstb, dstb);
1933: count_write += 4;
1934: }
1935: fill_prefetch_next ();
1936: break;
1937: case i_MVPMR: // MOVEP M->R
1938: printf ("\tuaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0));
1939: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0);
1940: if (curi->size == sz_word) {
1941: printf ("\tuae_u16 val = (%s (memp) << 8) + %s (memp + 2);\n", srcb, srcb);
1942: count_read += 2;
1943: } else {
1944: printf ("\tuae_u32 val = (%s (memp) << 24) + (%s (memp + 2) << 16)\n", srcb, srcb);
1945: printf (" + (%s (memp + 4) << 8) + %s (memp + 6);\n", srcb, srcb);
1946: count_read += 4;
1947: }
1948: fill_prefetch_next ();
1949: genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
1950: break;
1951: case i_MOVE:
1952: case i_MOVEA:
1953: {
1954: /* 2 MOVE instruction variants have special prefetch sequence:
1955: * - MOVE <ea>,-(An) = prefetch is before writes (Apdi)
1956: * - MOVE memory,(xxx).L = 2 prefetches after write
1957: * - all others = prefetch is done after writes
1958: *
1959: * - move.x xxx,[at least 1 extension word here] = fetch 1 extension word before (xxx)
1960: *
1961: */
1962: int prefetch_done = 0, flags;
1963: int dualprefetch = curi->dmode == absl && (curi->smode != Dreg && curi->smode != Areg && curi->smode != imm);
1964: genamode_pre (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_MOVE);
1965: flags = 1 | (dualprefetch ? GF_NOREFILL : 0);
1966: genamode2 (curi->dmode, "dstreg", curi->size, "dst", 2, 0, flags | GF_MOVE, 0);
1967: genamode_post (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1968: if (curi->mnemo == i_MOVEA && curi->size == sz_word)
1969: printf ("\tsrc = (uae_s32)(uae_s16)src;\n");
1970: if (curi->dmode == Apdi) {
1971: fill_prefetch_next ();
1972: prefetch_done = 1;
1973: }
1974: if (curi->mnemo == i_MOVE)
1975: genflags (flag_logical, curi->size, "src", "", "");
1976: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
1977: sync_m68k_pc ();
1978: if (dualprefetch) {
1979: fill_prefetch_full ();
1980: prefetch_done = 1;
1981: }
1982: if (!prefetch_done)
1983: fill_prefetch_next ();
1984: }
1985: break;
1986: case i_MVSR2: // MOVE FROM SR
1987: genamode (curi->smode, "srcreg", sz_word, "src", 2, 0, 0);
1988: fill_prefetch_next ();
1989: if (isreg (curi->smode))
1990: addcycles000 (2);
1991: printf ("\tMakeSR ();\n");
1992: if (curi->size == sz_byte)
1993: genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
1994: else
1995: genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
1996: break;
1997: case i_MV2SR: // MOVE TO SR
1998: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0);
1999: if (curi->size == sz_byte) {
2000: // MOVE TO CCR
2001: dummy_prefetch ();
2002: addcycles000 (4);
2003: printf ("\tMakeSR ();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
2004: } else {
2005: // MOVE TO SR
2006: dummy_prefetch ();
2007: addcycles000 (4);
2008: printf ("\tregs.sr = src;\n");
2009: }
2010: printf ("\tMakeFromSR ();\n");
2011: fill_prefetch_next ();
2012: break;
2013: case i_SWAP:
2014: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, 0);
2015: fill_prefetch_next ();
2016: start_brace ();
2017: printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
2018: genflags (flag_logical, sz_long, "dst", "", "");
2019: genastore ("dst", curi->smode, "srcreg", sz_long, "src");
2020: break;
2021: case i_EXG:
2022: // confirmed
2023: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
2024: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
2025: fill_prefetch_next ();
2026: addcycles000 (2);
2027: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
2028: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
2029: break;
2030: case i_EXT:
2031: // confirmed
2032: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, 0);
2033: fill_prefetch_next ();
2034: start_brace ();
2035: switch (curi->size) {
2036: case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
2037: case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
2038: case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
2039: default: abort ();
2040: }
2041: genflags (flag_logical,
2042: curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
2043: genastore ("dst", curi->smode, "srcreg",
2044: curi->size == sz_word ? sz_word : sz_long, "src");
2045: break;
2046: case i_MVMEL:
2047: // confirmed
2048: if (using_ce)
2049: genmovemel_ce (opcode);
2050: else
2051: genmovemel (opcode);
2052: break;
2053: case i_MVMLE:
2054: // confirmed
2055: if (using_ce)
2056: genmovemle_ce (opcode);
2057: else
2058: genmovemle (opcode);
2059: break;
2060: case i_TRAP:
2061: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
2062: gen_set_fault_pc ();
2063: sync_m68k_pc ();
2064: printf ("\tException (src + 32, 0 ,M68000_EXC_SRC_CPU);\n");
2065: did_prefetch = 1;
2066: m68k_pc_offset = 0;
2067: break;
2068: case i_MVR2USP:
2069: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
2070: fill_prefetch_next ();
2071: printf ("\tregs.usp = src;\n");
2072: break;
2073: case i_MVUSP2R:
2074: genamode (curi->smode, "srcreg", curi->size, "src", 2, 0, 0);
2075: fill_prefetch_next ();
2076: genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
2077: break;
2078: case i_RESET:
2079: fill_prefetch_next ();
2080: printf ("\tcpureset ();\n");
2081: addcycles000 (128);
2082: if (using_prefetch)
2083: printf ("\tregs.irc = get_iword (4);\n");
2084: break;
2085: case i_NOP:
2086: fill_prefetch_next ();
2087: if (using_ce020)
1.1.1.2 root 2088: printf ("\tdo_cycles_ce (6 * CYCLE_UNIT);\n");
1.1 root 2089: break;
2090: case i_STOP:
2091: if (using_prefetch) {
2092: printf ("\tregs.sr = regs.irc;\n");
2093: m68k_pc_offset += 2;
2094: } else {
2095: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
2096: printf ("\tregs.sr = src;\n");
2097: }
2098: printf ("\tMakeFromSR ();\n");
2099: printf ("\tm68k_setstopped ();\n");
2100: sync_m68k_pc ();
2101: // STOP does not prefetch anything
2102: did_prefetch = -1;
2103: break;
2104: case i_LPSTOP: /* 68060 */
2105: printf ("\tuae_u16 sw = get_iword (2);\n");
2106: printf ("\tuae_u16 sr;\n");
2107: printf ("\tif (sw != (0x100|0x80|0x40)) { Exception (4, 0 ,M68000_EXC_SRC_CPU); goto %s; }\n", endlabelstr);
2108: printf ("\tsr = get_iword (4);\n");
2109: printf ("\tif (!(sr & 0x8000)) { Exception (8, 0 ,M68000_EXC_SRC_CPU); goto %s; }\n", endlabelstr);
2110: printf ("\tregs.sr = sr;\n");
2111: printf ("\tMakeFromSR ();\n");
2112: printf ("\tm68k_setstopped();\n");
2113: m68k_pc_offset += 4;
2114: sync_m68k_pc ();
2115: fill_prefetch_full ();
2116: break;
2117: case i_RTE:
2118: if (cpu_level == 0) {
2119: genamode (Aipi, "7", sz_word, "sr", 1, 0, GF_NOREFILL);
2120: genamode (Aipi, "7", sz_long, "pc", 1, 0, GF_NOREFILL);
2121: printf ("\tregs.sr = sr;\n");
2122: setpc ("pc");
2123: printf ("\tMakeFromSR ();\n");
2124: } else {
1.1.1.2 root 2125: int old_brace_level = n_braces;
2126: if (next_cpu_level < 0)
2127: next_cpu_level = 0;
2128: printf ("\tuae_u16 newsr; uae_u32 newpc;\n");
2129: printf ("\tfor (;;) {\n");
2130: printf ("\t\tuaecptr a = m68k_areg (regs, 7);\n");
1.1.1.3 ! root 2131: printf ("\t\tuae_u16 sr = %s (a);\n", srcw);
! 2132: printf ("\t\tuae_u32 pc = %s (a + 2);\n", srcl);
! 2133: printf ("\t\tuae_u16 format = %s (a + 2 + 4);\n", srcw);
1.1.1.2 root 2134: printf ("\t\tint frame = format >> 12;\n");
2135: printf ("\t\tint offset = 8;\n");
2136: printf ("\t\tnewsr = sr; newpc = pc;\n");
2137: printf ("\t\tif (frame == 0x0) { m68k_areg (regs, 7) += offset; break; }\n");
2138: printf ("\t\telse if (frame == 0x1) { m68k_areg (regs, 7) += offset; }\n");
2139: printf ("\t\telse if (frame == 0x2) { m68k_areg (regs, 7) += offset + 4; break; }\n");
2140: printf ("\t\telse if (frame == 0x4) { m68k_areg (regs, 7) += offset + 8; break; }\n");
2141: if (using_mmu)
1.1.1.3 ! root 2142: printf ("\t\telse if (frame == 0x7) { m68k_do_rte_mmu%s (a); m68k_areg (regs, 7) += offset + 52; break; }\n", mmu_postfix);
1.1.1.2 root 2143: printf ("\t\telse if (frame == 0x8) { m68k_areg (regs, 7) += offset + 50; break; }\n");
2144: printf ("\t\telse if (frame == 0x9) { m68k_areg (regs, 7) += offset + 12; break; }\n");
2145: printf ("\t\telse if (frame == 0xa) { m68k_areg (regs, 7) += offset + 24; break; }\n");
2146: printf ("\t\telse if (frame == 0xb) { m68k_areg (regs, 7) += offset + 84; break; }\n");
2147: printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14, 0 ,M68000_EXC_SRC_CPU); goto %s; }\n", endlabelstr);
2148: printf ("\t\tregs.sr = newsr; MakeFromSR ();\n}\n");
2149: pop_braces (old_brace_level);
2150: printf ("\tregs.sr = newsr; MakeFromSR ();\n");
2151: printf ("\tif (newpc & 1) {\n");
2152: printf ("\t\texception3i (0x%04X, m68k_getpc (), newpc);\n", opcode);
2153: printf ("\t\tgoto %s;\n", endlabelstr);
2154: printf ("\t}\n");
2155: if (using_mmu)
2156: printf ("\t\tm68k_setpc_mmu (newpc);\n");
2157: else
2158: printf ("\t\tm68k_setpc (newpc);\n");
2159: printf ("\tipl_fetch ();\n");
2160: need_endlabel = 1;
1.1 root 2161: }
2162: /* PC is set and prefetch filled. */
2163: m68k_pc_offset = 0;
2164: fill_prefetch_full ();
2165: break;
2166: case i_RTD:
2167: if (using_mmu) {
2168: genamode (curi->smode, "srcreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
2169: genamode (Aipi, "7", sz_long, "pc", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
2170: printf ("\tm68k_areg(regs, 7) += offs;\n");
2171: } else {
2172: genamode (Aipi, "7", sz_long, "pc", 1, 0, 0);
2173: genamode (curi->smode, "srcreg", curi->size, "offs", 1, 0, 0);
2174: printf ("\tm68k_areg (regs, 7) += offs;\n");
2175: printf ("\tif (pc & 1) {\n");
2176: printf ("\t\texception3i (0x%04X, m68k_getpc (), pc);\n", opcode);
1.1.1.2 root 2177: printf ("\t\tgoto %s;\n", endlabelstr);
1.1 root 2178: printf ("\t}\n");
2179: }
1.1.1.2 root 2180: printf ("\tif (pc & 1) {\n");
2181: printf ("\t\texception3i (0x%04X, m68k_getpc(), pc);\n", opcode);
2182: printf ("\t\tgoto %s;\n", endlabelstr);
2183: printf ("\t}\n");
1.1 root 2184: setpc ("pc");
2185: /* PC is set and prefetch filled. */
2186: m68k_pc_offset = 0;
2187: fill_prefetch_full ();
1.1.1.2 root 2188: need_endlabel = 1;
1.1 root 2189: break;
2190: case i_LINK:
2191: // ce confirmed
2192: if (using_mmu) {
2193: genamode (curi->dmode, "dstreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
2194: genamode (Apdi, "7", sz_long, "old", GENA_GETV_FETCH_ALIGN, GENA_MOVEM_DO_INC, 0);
2195: genamode (curi->smode, "srcreg", sz_long, "src", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
2196: genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
2197: printf ("\tm68k_areg(regs, 7) += offs;\n");
2198: genastore ("src", Apdi, "7", sz_long, "old");
2199: } else {
2200: genamode (Apdi, "7", sz_long, "old", 2, 0, GF_AA);
2201: genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, GF_AA);
2202: genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0, 0);
2203: genastore ("src", Apdi, "7", sz_long, "old");
2204: genastore ("m68k_areg (regs, 7)", curi->smode, "srcreg", sz_long, "src");
2205: printf ("\tm68k_areg (regs, 7) += offs;\n");
2206: fill_prefetch_next ();
2207: }
2208: break;
2209: case i_UNLK:
2210: // ce confirmed
2211: if (using_mmu) {
2212: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.3 ! root 2213: printf ("\tuae_s32 old = get_long_mmu%s (src);\n", mmu_postfix);
1.1.1.2 root 2214: printf ("\tm68k_areg (regs, 7) = src + 4;\n");
2215: printf ("\tm68k_areg (regs, srcreg) = old;\n");
1.1 root 2216: } else {
2217: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
2218: printf ("\tm68k_areg (regs, 7) = src;\n");
2219: genamode (Aipi, "7", sz_long, "old", 1, 0, 0);
2220: fill_prefetch_next ();
2221: genastore ("old", curi->smode, "srcreg", curi->size, "src");
2222: }
2223: break;
2224: case i_RTS:
2225: printf ("\tuaecptr pc = m68k_getpc ();\n");
2226: if (using_ce020 == 1)
2227: printf ("\tm68k_do_rts_ce020 ();\n");
2228: else if (using_ce020 == 2)
2229: printf ("\tm68k_do_rts_ce030 ();\n");
2230: else if (using_ce)
2231: printf ("\tm68k_do_rts_ce ();\n");
2232: else if (using_indirect)
2233: printf ("\tm68k_do_rtsi ();\n");
2234: else if (using_mmu)
1.1.1.3 ! root 2235: printf ("\tm68k_do_rts_mmu%s ();\n", mmu_postfix);
1.1 root 2236: else
2237: printf ("\tm68k_do_rts ();\n");
1.1.1.2 root 2238: printf ("\tif (m68k_getpc () & 1) {\n");
2239: printf ("\t\tuaecptr faultpc = m68k_getpc ();\n");
2240: if (using_mmu)
2241: printf ("\t\tm68k_setpc_mmu (pc);\n");
2242: else
2243: printf ("\t\tm68k_setpc (pc);\n");
2244: printf ("\t\texception3i (0x%04X, pc, faultpc);\n", opcode);
2245: printf ("\t\tgoto %s;\n", endlabelstr);
2246: printf ("\t}\n");
1.1 root 2247: count_read += 2;
2248: m68k_pc_offset = 0;
2249: fill_prefetch_full ();
1.1.1.2 root 2250: need_endlabel = 1;
1.1 root 2251: break;
2252: case i_TRAPV:
2253: sync_m68k_pc ();
2254: fill_prefetch_next ();
2255: printf ("\tif (GET_VFLG ()) {\n");
2256: printf ("\t\tException (7, m68k_getpc () ,M68000_EXC_SRC_CPU);\n");
2257: printf ("\t\tgoto %s;\n", endlabelstr);
2258: printf ("\t}\n");
2259: need_endlabel = 1;
2260: break;
2261: case i_RTR:
2262: printf ("\tMakeSR ();\n");
2263: genamode_pre (Aipi, "7", sz_word, "sr", 1, 0, 0);
2264: genamode (Aipi, "7", sz_long, "pc", 1, 0, 0);
2265: genamode_post (Aipi, "7", sz_word, "sr", 1, 0, 0);
2266: printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
2267: printf ("\tregs.sr |= sr;\n");
2268: setpc ("pc");
2269: printf ("\tMakeFromSR ();\n");
2270: m68k_pc_offset = 0;
2271: fill_prefetch_full ();
2272: break;
2273: case i_JSR: // TODO: check stack write order
2274: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL);
2275: start_brace ();
2276: printf ("\tuaecptr oldpc = m68k_getpc () + %d;\n", m68k_pc_offset);
2277: if (using_exception_3) {
2278: printf ("\tif (srca & 1) {\n");
2279: printf ("\t\texception3i (opcode, oldpc, srca);\n");
2280: printf ("\t\tgoto %s;\n", endlabelstr);
2281: printf ("\t}\n");
2282: need_endlabel = 1;
2283: }
2284: if (using_mmu) {
2285: printf ("\t%s (m68k_areg (regs, 7) - 4, oldpc);\n", dstl);
2286: printf ("\tm68k_areg (regs, 7) -= 4;\n");
2287: setpc ("srca");
2288: m68k_pc_offset = 0;
2289: } else {
2290: if (curi->smode == Ad16 || curi->smode == absw || curi->smode == PC16)
2291: addcycles000 (2);
2292: setpc ("srca");
2293: m68k_pc_offset = 0;
2294: fill_prefetch_1 (0);
2295: if (curi->smode == Ad8r || curi->smode == PC8r)
2296: addcycles000 (6);
2297: printf ("\tm68k_areg (regs, 7) -= 4;\n");
2298: if (using_ce) {
2299: printf ("\tput_word_ce (m68k_areg (regs, 7), oldpc >> 16);\n");
2300: printf ("\tput_word_ce (m68k_areg (regs, 7) + 2, oldpc);\n");
2301: } else {
2302: printf ("\t%s (m68k_areg (regs, 7), oldpc);\n", dstl);
2303: }
2304: }
2305: count_write += 2;
2306: fill_prefetch_next ();
2307: break;
2308: case i_JMP:
2309: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA | ((curi->smode == Ad8r || curi->smode == PC8r) ? 0 : GF_NOREFILL));
2310: if (using_exception_3) {
2311: printf ("\tif (srca & 1) {\n");
2312: printf ("\t\texception3i (opcode, m68k_getpc () + 6, srca);\n");
2313: printf ("\t\tgoto %s;\n", endlabelstr);
2314: printf ("\t}\n");
2315: need_endlabel = 1;
2316: }
2317: if (curi->smode == Ad16 || curi->smode == Ad8r || curi->smode == absw || curi->smode == PC16 || curi->smode == PC8r)
2318: addcycles000 (2);
2319: setpc ("srca");
2320: m68k_pc_offset = 0;
2321: fill_prefetch_full ();
2322: break;
2323: case i_BSR:
2324: // .b and .w confirmed
2325: printf ("\tuae_s32 s;\n");
2326: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA|GF_NOREFILL);
2327: printf ("\ts = (uae_s32)src + 2;\n");
2328: if (using_exception_3) {
2329: printf ("\tif (src & 1) {\n");
2330: printf ("\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + s);\n");
2331: printf ("\t\tgoto %s;\n", endlabelstr);
2332: printf ("\t}\n");
2333: need_endlabel = 1;
2334: }
2335: addcycles000 (2);
2336: if (using_ce020 == 1) {
2337: printf ("\tm68k_do_bsr_ce020 (m68k_getpc () + %d, s);\n", m68k_pc_offset);
2338: } else if (using_ce020 == 2) {
2339: printf ("\tm68k_do_bsr_ce030 (m68k_getpc () + %d, s);\n", m68k_pc_offset);
2340: } else if (using_ce) {
2341: printf ("\tm68k_do_bsr_ce (m68k_getpc () + %d, s);\n", m68k_pc_offset);
1.1.1.3 ! root 2342: } else if (using_indirect) {
1.1 root 2343: printf ("\tm68k_do_bsri (m68k_getpc () + %d, s);\n", m68k_pc_offset);
2344: } else if (using_mmu) {
1.1.1.3 ! root 2345: printf ("\tm68k_do_bsr_mmu%s (m68k_getpc () + %d, s);\n", mmu_postfix, m68k_pc_offset);
1.1 root 2346: } else {
2347: printf ("\tm68k_do_bsr (m68k_getpc () + %d, s);\n", m68k_pc_offset);
2348: }
2349: count_write += 2;
2350: m68k_pc_offset = 0;
2351: fill_prefetch_full ();
2352: break;
2353: case i_Bcc:
2354: // bcc.b branch: idle cycle, prefetch, prefetch
2355: // bcc.b not branch: 2 idle cycles, prefetch
2356: if (curi->size == sz_long) {
2357: if (cpu_level < 2) {
2358: addcycles000 (2);
2359: printf ("\tif (cctrue (%d)) {\n", curi->cc);
2360: printf ("\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + 1);\n");
2361: printf ("\t\tgoto %s;\n", endlabelstr);
2362: printf ("\t}\n");
2363: sync_m68k_pc ();
2364: irc2ir ();
2365: fill_prefetch_2 ();
2366: printf ("\tgoto %s;\n", endlabelstr);
2367: need_endlabel = 1;
2368: } else {
2369: if (next_cpu_level < 1)
2370: next_cpu_level = 1;
2371: }
2372: }
2373: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | GF_NOREFILL);
2374: addcycles000 (2);
2375: printf ("\tif (!cctrue (%d)) goto didnt_jump;\n", curi->cc);
2376: if (using_exception_3) {
2377: printf ("\tif (src & 1) {\n");
2378: printf ("\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + 2 + (uae_s32)src);\n");
2379: printf ("\t\tgoto %s;\n", endlabelstr);
2380: printf ("\t}\n");
2381: need_endlabel = 1;
2382: }
2383: if (using_prefetch) {
2384: incpc ("(uae_s32)src + 2");
2385: fill_prefetch_full ();
2386: if (using_ce)
2387: printf ("\treturn;\n");
2388: else
2389: printf ("\treturn 10 * CYCLE_UNIT / 2;\n");
2390: } else {
2391: incpc ("(uae_s32)src + 2");
2392: returncycles ("\t", 10);
2393: }
2394: printf ("didnt_jump:;\n");
2395: need_endlabel = 1;
2396: sync_m68k_pc ();
2397: if (curi->size == sz_byte) {
2398: addcycles000 (2);
2399: irc2ir ();
2400: fill_prefetch_2 ();
2401: } else if (curi->size == sz_word) {
2402: addcycles000 (2);
2403: fill_prefetch_full ();
2404: } else {
2405: fill_prefetch_full ();
2406: }
2407: insn_n_cycles = curi->size == sz_byte ? 8 : 12;
2408: break;
2409: case i_LEA:
2410: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA);
2411: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_AA);
2412: if (curi->smode == Ad8r || curi->smode == PC8r)
2413: addcycles000 (2);
2414: fill_prefetch_next ();
2415: if (curi->smode == Ad8r || curi->smode == PC8r)
2416: addcycles000 (2);
2417: genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
2418: break;
2419: case i_PEA:
2420: genamode (curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA);
2421: genamode (Apdi, "7", sz_long, "dst", 2, 0, GF_AA);
2422: if (curi->smode == Ad8r || curi->smode == PC8r)
2423: addcycles000 (2);
2424: if (!(curi->smode == absw || curi->smode == absl))
2425: fill_prefetch_next ();
2426: if (curi->smode == Ad8r || curi->smode == PC8r)
2427: addcycles000 (2);
2428: genastore ("srca", Apdi, "7", sz_long, "dst");
2429: if ((curi->smode == absw || curi->smode == absl))
2430: fill_prefetch_next ();
2431: break;
2432: case i_DBcc:
2433: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | GF_NOREFILL);
2434: genamode (curi->dmode, "dstreg", curi->size, "offs", 1, 0, GF_AA | GF_NOREFILL);
2435: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
2436: addcycles000 (2);
2437: printf ("\tif (!cctrue (%d)) {\n", curi->cc);
2438: incpc ("(uae_s32)offs + 2");
2439: printf ("\t"); fill_prefetch_1 (0);
2440: printf ("\t"); genastore ("(src - 1)", curi->smode, "srcreg", curi->size, "src");
2441:
2442: printf ("\t\tif (src) {\n");
2443: addcycles_ce020 (4);
2444: if (using_exception_3) {
2445: printf ("\t\t\tif (offs & 1) {\n");
2446: printf ("\t\t\t\texception3i (opcode, m68k_getpc () + 2, m68k_getpc () + 2 + (uae_s32)offs + 2);\n");
2447: printf ("\t\t\t\tgoto %s;\n", endlabelstr);
2448: printf ("\t\t\t}\n");
2449: need_endlabel = 1;
2450: }
2451: irc2ir ();
2452: fill_prefetch_1 (2);
2453: returncycles ("\t\t\t", 12);
2454: if (using_ce)
2455: printf ("\t\t\treturn;\n");
2456: printf ("\t\t}\n");
2457: addcycles_ce020 (8);
2458: printf ("\t} else {\n");
2459: addcycles000_2 ("\t\t", 2);
2460: addcycles_ce020 (4);
2461: printf ("\t}\n");
2462: setpc ("oldpc + %d", m68k_pc_offset);
2463: m68k_pc_offset = 0;
2464: fill_prefetch_full ();
2465: insn_n_cycles = 12;
2466: need_endlabel = 1;
2467: break;
2468: case i_Scc:
2469: // confirmed
2470: genamode (curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0);
2471: start_brace ();
2472: fill_prefetch_next();
2473: start_brace ();
2474: printf ("\tint val = cctrue (%d) ? 0xff : 0;\n", curi->cc);
2475: if (using_ce) {
2476: printf ("\tint cycles = 0;\n");
2477: if (isreg (curi->smode))
2478: printf ("\tif (val) cycles += 2;\n");
2479: addcycles000_3 ("\t");
2480: }
2481: genastore ("val", curi->smode, "srcreg", curi->size, "src");
2482: break;
2483: case i_DIVU:
2484: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
2485: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0);
2486: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
2487: printf ("\tCLEAR_CZNV ();\n");
2488: printf ("\tif (src == 0) {\n");
2489: if (cpu_level > 0) {
2490: /* 68020 sets V when dividing by zero and N if dst is negative
2491: * 68000 clears both
2492: */
2493: printf("\t\tSET_VFLG (1);\n");
2494: printf("\t\tif (dst < 0) SET_NFLG (1);\n");
2495: }
2496: incpc ("%d", m68k_pc_offset);
2497: printf ("\t\tException (5, oldpc ,M68000_EXC_SRC_CPU);\n");
2498: printf ("\t\tgoto %s;\n", endlabelstr);
2499: printf ("\t} else {\n");
2500: printf ("\t\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
2501: printf ("\t\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
2502: fill_prefetch_next ();
2503: if (using_ce) {
2504: start_brace ();
2505: printf ("\t\tint cycles = (getDivu68kCycles((uae_u32)dst, (uae_u16)src));\n");
2506: addcycles000_3 ("\t\t");
2507: } else if (using_ce020) {
2508: addcycles_ce020 (36);
2509: }
2510: /* The N flag appears to be set each time there is an overflow.
2511: * Weird. but 68020 only sets N when dst is negative.. */
2512: printf ("\t\tif (newv > 0xffff) {\n");
2513: printf ("\t\t\tSET_VFLG (1);\n");
2514: #ifdef UNDEF68020
2515: if (cpu_level >= 2)
2516: printf ("\t\t\tif (currprefs.cpu_level == 0 || dst < 0) SET_NFLG (®s, 1);\n");
2517: else /* ??? some 68000 revisions may not set NFLG when overflow happens.. */
2518: #endif
2519: printf ("\t\t\tSET_NFLG (1);\n");
2520: printf ("\t\t} else {\n");
2521: printf ("\t\t"); genflags (flag_logical, sz_word, "newv", "", "");
2522: printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
2523: printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
2524: printf ("\t\t}\n");
2525: sync_m68k_pc ();
2526: printf ("\t}\n");
2527: count_ncycles++;
2528: insn_n_cycles += 136 - (136 - 76) / 2; /* average */
2529: need_endlabel = 1;
2530: break;
2531: case i_DIVS:
2532: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
2533: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0);
2534: genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
2535: printf ("\tCLEAR_CZNV ();\n");
2536: printf ("\tif (src == 0) {\n");
2537: if (cpu_level > 0) {
2538: /* 68020 sets V when dividing by zero. Z is also set.
2539: * 68000 clears both
2540: */
2541: printf("\t\tSET_VFLG (1);\n");
2542: printf("\t\tSET_ZFLG (1);\n");
2543: }
2544: incpc ("%d", m68k_pc_offset);
2545: printf ("\t\tException (5, oldpc ,M68000_EXC_SRC_CPU);\n");
2546: printf ("\t\tgoto %s;\n", endlabelstr);
2547: printf ("\t} else {\n");
2548: printf ("\t\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
2549: printf ("\t\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
2550: fill_prefetch_next ();
2551: if (using_ce) {
2552: start_brace ();
2553: printf ("\t\tint cycles = (getDivs68kCycles((uae_s32)dst, (uae_s16)src));\n");
2554: addcycles000_3 ("\t\t");
2555: } else if (using_ce020) {
2556: addcycles_ce020 (46);
2557: }
2558: printf ("\t\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {\n");
2559: printf ("\t\t\tSET_VFLG (1);\n");
2560: #ifdef UNDEF68020
2561: if (cpu_level > 0)
2562: printf ("\t\t\tif (currprefs.cpu_level == 0) SET_NFLG (®s, 1);\n");
2563: else
2564: #endif
2565: printf ("\t\t\tSET_NFLG (1);\n");
2566: printf ("\t\t} else {\n");
2567: printf ("\t\t\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
2568: genflags (flag_logical, sz_word, "newv", "", "");
2569: printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
2570: printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
2571: printf ("\t\t}\n");
2572: sync_m68k_pc ();
2573: printf ("\t}\n");
2574: count_ncycles++;
2575: insn_n_cycles += 156 - (156 - 120) / 2; /* average */
2576: need_endlabel = 1;
2577: break;
2578: case i_MULU:
2579: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0);
2580: genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0, 0);
2581: fill_prefetch_next();
2582: start_brace ();
2583: printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
2584: if (using_ce)
2585: printf ("\tint cycles = 38 - 4, bits;\n");
2586: genflags (flag_logical, sz_long, "newv", "", "");
2587: if (using_ce) {
2588: printf ("\tfor(bits = 0; bits < 16 && src; bits++, src >>= 1)\n");
2589: printf ("\t\tif (src & 1) cycles += 2;\n");
2590: addcycles000_3 ("\t");
2591: } else if (using_ce020) {
2592: addcycles_ce020 (20);
2593: }
2594: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
2595: sync_m68k_pc ();
2596: count_cycles += 38 - 4;
2597: count_ncycles++;
2598: insn_n_cycles += (70 - 38) / 2 + 38; /* average */
2599: break;
2600: case i_MULS:
2601: genamode (curi->smode, "srcreg", sz_word, "src", 1, 0, 0);
2602: genamode (curi->dmode, "dstreg", sz_word, "dst", 1, 0, 0);
2603: fill_prefetch_next();
2604: start_brace ();
2605: printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
2606: if (using_ce) {
2607: printf ("\tint cycles = 38 - 4, bits;\n");
2608: printf ("\tuae_u32 usrc;\n");
2609: }
2610: genflags (flag_logical, sz_long, "newv", "", "");
2611: if (using_ce) {
2612: printf ("\tusrc = ((uae_u32)src) << 1;\n");
2613: printf ("\tfor(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1)\n");
2614: printf ("\t\tif ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2;\n");
2615: addcycles000_3 ("\t");
2616: } else if (using_ce020) {
2617: addcycles_ce020 (20);
2618: }
2619: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
2620: count_cycles += 38 - 4;
2621: count_ncycles++;
2622: insn_n_cycles += (70 - 38) / 2 + 38; /* average */
2623: break;
2624: case i_CHK:
2625: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
2626: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
2627: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
2628: sync_m68k_pc ();
2629: addcycles000 (4);
2630: printf ("\tif (dst > src) {\n");
2631: printf ("\t\tSET_NFLG (0);\n");
2632: printf ("\t\tException (6, oldpc ,M68000_EXC_SRC_CPU);\n");
2633: printf ("\t\tgoto %s;\n", endlabelstr);
2634: printf ("\t}\n");
2635: addcycles000 (2);
2636: printf ("\tif ((uae_s32)dst < 0) {\n");
2637: printf ("\t\tSET_NFLG (1);\n");
2638: printf ("\t\tException (6, oldpc ,M68000_EXC_SRC_CPU);\n");
2639: printf ("\t\tgoto %s;\n", endlabelstr);
2640: printf ("\t}\n");
2641: fill_prefetch_next ();
2642: need_endlabel = 1;
2643: break;
2644: case i_CHK2:
2645: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
2646: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
2647: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0);
2648: fill_prefetch_0 ();
2649: printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
2650: switch (curi->size) {
2651: case sz_byte:
2652: printf ("\tlower = (uae_s32)(uae_s8)%s (dsta); upper = (uae_s32)(uae_s8)%s (dsta + 1);\n", srcb, srcb);
2653: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
2654: break;
2655: case sz_word:
2656: printf ("\tlower = (uae_s32)(uae_s16)%s (dsta); upper = (uae_s32)(uae_s16)%s (dsta + 2);\n", srcw, srcw);
2657: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
2658: break;
2659: case sz_long:
2660: printf ("\tlower = %s (dsta); upper = %s (dsta + 4);\n", srcl, srcl);
2661: break;
2662: default:
2663: abort ();
2664: }
2665: printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
2666: printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
2667: printf ("\tif ((extra & 0x800) && GET_CFLG ()) { Exception (6, oldpc ,M68000_EXC_SRC_CPU); goto %s; }\n}\n", endlabelstr);
2668: need_endlabel = 1;
2669: break;
2670:
2671: case i_ASR:
2672: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2673: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2674: fill_prefetch_next();
2675: start_brace ();
2676: switch (curi->size) {
2677: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2678: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2679: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2680: default: abort ();
2681: }
2682: printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
2683: printf ("\tint ccnt = cnt & 63;\n");
2684: printf ("\tcnt &= 63;\n");
2685: printf ("\tCLEAR_CZNV ();\n");
2686: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
2687: printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
2688: printf ("\t\tSET_CFLG (sign);\n");
2689: duplicate_carry (1);
2690: if (source_is_imm1_8 (curi))
2691: printf ("\t} else {\n");
2692: else
2693: printf ("\t} else if (cnt > 0) {\n");
2694: printf ("\t\tval >>= cnt - 1;\n");
2695: printf ("\t\tSET_CFLG (val & 1);\n");
2696: duplicate_carry (1);
2697: printf ("\t\tval >>= 1;\n");
2698: printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
2699: bit_mask (curi->size),
2700: bit_size (curi->size));
2701: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
2702: printf ("\t}\n");
2703: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2704: shift_ce (curi->dmode, curi->size);
2705: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2706: break;
2707: case i_ASL:
2708: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2709: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2710: fill_prefetch_next();
2711: start_brace ();
2712: switch (curi->size) {
2713: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2714: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2715: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2716: default: abort ();
2717: }
2718: printf ("\tint ccnt = cnt & 63;\n");
2719: printf ("\tcnt &= 63;\n");
2720: printf ("\tCLEAR_CZNV ();\n");
2721: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
2722: printf ("\t\tSET_VFLG (val != 0);\n");
2723: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
2724: bit_size (curi->size));
2725: duplicate_carry (1);
2726: printf ("\t\tval = 0;\n");
2727: if (source_is_imm1_8 (curi))
2728: printf ("\t} else {\n");
2729: else
2730: printf ("\t} else if (cnt > 0) {\n");
2731: printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
2732: bit_mask (curi->size),
2733: bit_size (curi->size) - 1,
2734: bit_mask (curi->size));
2735: printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
2736: printf ("\t\tval <<= cnt - 1;\n");
2737: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
2738: duplicate_carry (1);
2739: printf ("\t\tval <<= 1;\n");
2740: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
2741: printf ("\t}\n");
2742: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2743: shift_ce (curi->dmode, curi->size);
2744: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2745: break;
2746: case i_LSR:
2747: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2748: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2749: fill_prefetch_next();
2750: start_brace ();
2751: switch (curi->size) {
2752: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2753: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2754: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2755: default: abort ();
2756: }
2757: printf ("\tint ccnt = cnt & 63;\n");
2758: printf ("\tcnt &= 63;\n");
2759: printf ("\tCLEAR_CZNV ();\n");
2760: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
2761: printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
2762: bit_size (curi->size), bit_size (curi->size) - 1);
2763: duplicate_carry (1);
2764: printf ("\t\tval = 0;\n");
2765: if (source_is_imm1_8 (curi))
2766: printf ("\t} else {\n");
2767: else
2768: printf ("\t} else if (cnt > 0) {\n");
2769: printf ("\t\tval >>= cnt - 1;\n");
2770: printf ("\t\tSET_CFLG (val & 1);\n");
2771: duplicate_carry (1);
2772: printf ("\t\tval >>= 1;\n");
2773: printf ("\t}\n");
2774: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2775: shift_ce (curi->dmode, curi->size);
2776: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2777: break;
2778: case i_LSL:
2779: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2780: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2781: fill_prefetch_next();
2782: start_brace ();
2783: switch (curi->size) {
2784: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2785: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2786: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2787: default: abort ();
2788: }
2789: printf ("\tint ccnt = cnt & 63;\n");
2790: printf ("\tcnt &= 63;\n");
2791: printf ("\tCLEAR_CZNV ();\n");
2792: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
2793: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", bit_size (curi->size));
2794: duplicate_carry (1);
2795: printf ("\t\tval = 0;\n");
2796: if (source_is_imm1_8 (curi))
2797: printf ("\t} else {\n");
2798: else
2799: printf ("\t} else if (cnt > 0) {\n");
2800: printf ("\t\tval <<= (cnt - 1);\n");
2801: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
2802: duplicate_carry (1);
2803: printf ("\t\tval <<= 1;\n");
2804: printf ("\tval &= %s;\n", bit_mask (curi->size));
2805: printf ("\t}\n");
2806: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2807: shift_ce (curi->dmode, curi->size);
2808: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2809: break;
2810: case i_ROL:
2811: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2812: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2813: fill_prefetch_next ();
2814: start_brace ();
2815: switch (curi->size) {
2816: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2817: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2818: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2819: default: abort ();
2820: }
2821: printf ("\tint ccnt = cnt & 63;\n");
2822: printf ("\tcnt &= 63;\n");
2823: printf ("\tCLEAR_CZNV ();\n");
2824: if (source_is_imm1_8 (curi))
2825: printf ("{");
2826: else
2827: printf ("\tif (cnt > 0) {\n");
2828: printf ("\tuae_u32 loval;\n");
2829: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
2830: printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
2831: printf ("\tval <<= cnt;\n");
2832: printf ("\tval |= loval;\n");
2833: printf ("\tval &= %s;\n", bit_mask (curi->size));
2834: printf ("\tSET_CFLG (val & 1);\n");
2835: printf ("}\n");
2836: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2837: shift_ce (curi->dmode, curi->size);
2838: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2839: break;
2840: case i_ROR:
2841: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2842: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2843: fill_prefetch_next ();
2844: start_brace ();
2845: switch (curi->size) {
2846: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2847: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2848: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2849: default: abort ();
2850: }
2851: printf ("\tint ccnt = cnt & 63;\n");
2852: printf ("\tcnt &= 63;\n");
2853: printf ("\tCLEAR_CZNV ();\n");
2854: if (source_is_imm1_8 (curi))
2855: printf ("{");
2856: else
2857: printf ("\tif (cnt > 0) {");
2858: printf ("\tuae_u32 hival;\n");
2859: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
2860: printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
2861: printf ("\tval >>= cnt;\n");
2862: printf ("\tval |= hival;\n");
2863: printf ("\tval &= %s;\n", bit_mask (curi->size));
2864: printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
2865: printf ("\t}\n");
2866: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2867: shift_ce (curi->dmode, curi->size);
2868: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2869: break;
2870: case i_ROXL:
2871: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2872: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2873: fill_prefetch_next ();
2874: start_brace ();
2875: switch (curi->size) {
2876: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2877: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2878: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2879: default: abort ();
2880: }
2881: printf ("\tint ccnt = cnt & 63;\n");
2882: printf ("\tcnt &= 63;\n");
2883: printf ("\tCLEAR_CZNV ();\n");
2884: if (source_is_imm1_8 (curi))
2885: printf ("{");
2886: else {
2887: force_range_for_rox ("cnt", curi->size);
2888: printf ("\tif (cnt > 0) {\n");
2889: }
2890: printf ("\tcnt--;\n");
2891: printf ("\t{\n\tuae_u32 carry;\n");
2892: printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
2893: printf ("\tcarry = loval & 1;\n");
2894: printf ("\tval = (((val << 1) | GET_XFLG ()) << cnt) | (loval >> 1);\n");
2895: printf ("\tSET_XFLG (carry);\n");
2896: printf ("\tval &= %s;\n", bit_mask (curi->size));
2897: printf ("\t} }\n");
2898: printf ("\tSET_CFLG (GET_XFLG ());\n");
2899: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2900: shift_ce (curi->dmode, curi->size);
2901: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2902: break;
2903: case i_ROXR:
2904: genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
2905: genamode (curi->dmode, "dstreg", curi->size, "data", 1, 0, 0);
2906: fill_prefetch_next ();
2907: start_brace ();
2908: switch (curi->size) {
2909: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2910: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2911: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2912: default: abort ();
2913: }
2914: printf ("\tint ccnt = cnt & 63;\n");
2915: printf ("\tcnt &= 63;\n");
2916: printf ("\tCLEAR_CZNV ();\n");
2917: if (source_is_imm1_8 (curi))
2918: printf ("{");
2919: else {
2920: force_range_for_rox ("cnt", curi->size);
2921: printf ("\tif (cnt > 0) {\n");
2922: }
2923: printf ("\tcnt--;\n");
2924: printf ("\t{\n\tuae_u32 carry;\n");
2925: printf ("\tuae_u32 hival = (val << 1) | GET_XFLG ();\n");
2926: printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
2927: printf ("\tval >>= cnt;\n");
2928: printf ("\tcarry = val & 1;\n");
2929: printf ("\tval >>= 1;\n");
2930: printf ("\tval |= hival;\n");
2931: printf ("\tSET_XFLG (carry);\n");
2932: printf ("\tval &= %s;\n", bit_mask (curi->size));
2933: printf ("\t} }\n");
2934: printf ("\tSET_CFLG (GET_XFLG ());\n");
2935: genflags (flag_logical_noclobber, curi->size, "val", "", "");
2936: shift_ce (curi->dmode, curi->size);
2937: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
2938: break;
2939: case i_ASRW:
2940: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
2941: fill_prefetch_next ();
2942: start_brace ();
2943: switch (curi->size) {
2944: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2945: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2946: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2947: default: abort ();
2948: }
2949: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2950: printf ("\tuae_u32 cflg = val & 1;\n");
2951: printf ("\tval = (val >> 1) | sign;\n");
2952: genflags (flag_logical, curi->size, "val", "", "");
2953: printf ("\tSET_CFLG (cflg);\n");
2954: duplicate_carry (0);
2955: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2956: break;
2957: case i_ASLW:
2958: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
2959: fill_prefetch_next ();
2960: start_brace ();
2961: switch (curi->size) {
2962: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2963: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2964: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2965: default: abort ();
2966: }
2967: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
2968: printf ("\tuae_u32 sign2;\n");
2969: printf ("\tval <<= 1;\n");
2970: genflags (flag_logical, curi->size, "val", "", "");
2971: printf ("\tsign2 = %s & val;\n", cmask (curi->size));
2972: printf ("\tSET_CFLG (sign != 0);\n");
2973: duplicate_carry (0);
2974:
2975: printf ("\tSET_VFLG (GET_VFLG () | (sign2 != sign));\n");
2976: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2977: break;
2978: case i_LSRW:
2979: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
2980: fill_prefetch_next ();
2981: start_brace ();
2982: switch (curi->size) {
2983: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
2984: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
2985: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
2986: default: abort ();
2987: }
2988: printf ("\tuae_u32 carry = val & 1;\n");
2989: printf ("\tval >>= 1;\n");
2990: genflags (flag_logical, curi->size, "val", "", "");
2991: printf ("\tSET_CFLG (carry);\n");
2992: duplicate_carry (0);
2993: genastore ("val", curi->smode, "srcreg", curi->size, "data");
2994: break;
2995: case i_LSLW:
2996: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
2997: fill_prefetch_next ();
2998: start_brace ();
2999: switch (curi->size) {
3000: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
3001: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
3002: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
3003: default: abort ();
3004: }
3005: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
3006: printf ("\tval <<= 1;\n");
3007: genflags (flag_logical, curi->size, "val", "", "");
3008: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
3009: duplicate_carry (0);
3010: genastore ("val", curi->smode, "srcreg", curi->size, "data");
3011: break;
3012: case i_ROLW:
3013: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
3014: fill_prefetch_next ();
3015: start_brace ();
3016: switch (curi->size) {
3017: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
3018: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
3019: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
3020: default: abort ();
3021: }
3022: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
3023: printf ("\tval <<= 1;\n");
3024: printf ("\tif (carry) val |= 1;\n");
3025: genflags (flag_logical, curi->size, "val", "", "");
3026: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
3027: genastore ("val", curi->smode, "srcreg", curi->size, "data");
3028: break;
3029: case i_RORW:
3030: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
3031: fill_prefetch_next ();
3032: start_brace ();
3033: switch (curi->size) {
3034: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
3035: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
3036: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
3037: default: abort ();
3038: }
3039: printf ("\tuae_u32 carry = val & 1;\n");
3040: printf ("\tval >>= 1;\n");
3041: printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
3042: genflags (flag_logical, curi->size, "val", "", "");
3043: printf ("\tSET_CFLG (carry);\n");
3044: genastore ("val", curi->smode, "srcreg", curi->size, "data");
3045: break;
3046: case i_ROXLW:
3047: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
3048: fill_prefetch_next ();
3049: start_brace ();
3050: switch (curi->size) {
3051: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
3052: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
3053: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
3054: default: abort ();
3055: }
3056: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
3057: printf ("\tval <<= 1;\n");
3058: printf ("\tif (GET_XFLG ()) val |= 1;\n");
3059: genflags (flag_logical, curi->size, "val", "", "");
3060: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
3061: duplicate_carry (0);
3062: genastore ("val", curi->smode, "srcreg", curi->size, "data");
3063: break;
3064: case i_ROXRW:
3065: genamode (curi->smode, "srcreg", curi->size, "data", 1, 0, 0);
3066: fill_prefetch_next ();
3067: start_brace ();
3068: switch (curi->size) {
3069: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
3070: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
3071: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
3072: default: abort ();
3073: }
3074: printf ("\tuae_u32 carry = val & 1;\n");
3075: printf ("\tval >>= 1;\n");
3076: printf ("\tif (GET_XFLG ()) val |= %s;\n", cmask (curi->size));
3077: genflags (flag_logical, curi->size, "val", "", "");
3078: printf ("\tSET_CFLG (carry);\n");
3079: duplicate_carry (0);
3080: genastore ("val", curi->smode, "srcreg", curi->size, "data");
3081: break;
3082: case i_MOVEC2:
3083: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
3084: fill_prefetch_next ();
3085: start_brace ();
3086: printf ("\tint regno = (src >> 12) & 15;\n");
3087: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
3088: printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
3089: break;
3090: case i_MOVE2C:
3091: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
3092: fill_prefetch_next ();
3093: start_brace ();
3094: printf ("\tint regno = (src >> 12) & 15;\n");
3095: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
3096: printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
3097: break;
3098: case i_CAS:
3099: {
3100: int old_brace_level;
3101: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
3102: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
3103: fill_prefetch_0 ();
3104: start_brace ();
3105: printf ("\tint ru = (src >> 6) & 7;\n");
3106: printf ("\tint rc = src & 7;\n");
3107: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, rc)", "dst");
3108: printf ("\tif (GET_ZFLG ())");
3109: old_brace_level = n_braces;
3110: start_brace ();
3111: genastore ("(m68k_dreg (regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
3112: pop_braces (old_brace_level);
3113: printf ("else");
3114: start_brace ();
3115: printf ("m68k_dreg (regs, rc) = dst;\n");
3116: pop_braces (old_brace_level);
3117: }
3118: break;
3119: case i_CAS2:
3120: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3121: printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
3122: printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
3123: if (curi->size == sz_word) {
3124: int old_brace_level = n_braces;
3125: printf ("\tuae_u16 dst1 = %s (rn1), dst2 = %s (rn2);\n", srcw, srcw);
3126: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1");
3127: printf ("\tif (GET_ZFLG ()) {\n");
3128: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2");
3129: printf ("\tif (GET_ZFLG ()) {\n");
3130: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n", dstw);
3131: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 6) & 7));\n", dstw);
3132: printf ("\t}}\n");
3133: pop_braces (old_brace_level);
3134: printf ("\tif (! GET_ZFLG ()) {\n");
3135: printf ("\tm68k_dreg (regs, (extra >> 22) & 7) = (m68k_dreg (regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
3136: printf ("\tm68k_dreg (regs, (extra >> 6) & 7) = (m68k_dreg (regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
3137: printf ("\t}\n");
3138: } else {
3139: int old_brace_level = n_braces;
3140: printf ("\tuae_u32 dst1 = %s (rn1), dst2 = %s (rn2);\n", srcl, srcl);
3141: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1");
3142: printf ("\tif (GET_ZFLG ()) {\n");
3143: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2");
3144: printf ("\tif (GET_ZFLG ()) {\n");
3145: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n", dstl);
3146: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 6) & 7));\n", dstl);
3147: printf ("\t}}\n");
3148: pop_braces (old_brace_level);
3149: printf ("\tif (! GET_ZFLG ()) {\n");
3150: printf ("\tm68k_dreg (regs, (extra >> 22) & 7) = dst1;\n");
3151: printf ("\tm68k_dreg (regs, (extra >> 6) & 7) = dst2;\n");
3152: printf ("\t}\n");
3153: }
3154: break;
3155: case i_MOVES: /* ignore DFC and SFC when using_mmu == false */
3156: {
3157: int old_brace_level;
3158: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3159: printf ("\tif (extra & 0x800)\n");
3160: {
3161: int old_m68k_pc_offset = m68k_pc_offset;
3162: old_brace_level = n_braces;
3163: start_brace ();
3164: printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
3165: genamode (curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0);
3166: genastore_fc ("src", curi->dmode, "dstreg", curi->size, "dst");
3167: pop_braces (old_brace_level);
3168: m68k_pc_offset = old_m68k_pc_offset;
3169: }
3170: printf ("else");
3171: {
3172: start_brace ();
3173: genamode (curi->dmode, "dstreg", curi->size, "src", 1, 0, GF_FC);
3174: printf ("\tif (extra & 0x8000) {\n");
3175: switch (curi->size) {
3176: case sz_byte: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
3177: case sz_word: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
3178: case sz_long: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = src;\n"); break;
3179: default: abort ();
3180: }
3181: printf ("\t} else {\n");
3182: genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
3183: printf ("\t}\n");
3184: sync_m68k_pc ();
3185: pop_braces (old_brace_level);
3186: }
3187: }
3188: break;
3189: case i_BKPT: /* only needed for hardware emulators */
3190: sync_m68k_pc ();
3191: printf ("\top_illg (opcode);\n");
3192: break;
3193: case i_CALLM: /* not present in 68030 */
3194: sync_m68k_pc ();
3195: printf ("\top_illg (opcode);\n");
3196: break;
3197: case i_RTM: /* not present in 68030 */
3198: sync_m68k_pc ();
3199: printf ("\top_illg (opcode);\n");
3200: break;
3201: case i_TRAPcc:
3202: if (curi->smode != am_unknown && curi->smode != am_illg)
3203: genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0);
3204: fill_prefetch_0 ();
3205: printf ("\tif (cctrue (%d)) { Exception (7, m68k_getpc () ,M68000_EXC_SRC_CPU); goto %s; }\n", curi->cc, endlabelstr);
3206: need_endlabel = 1;
3207: break;
3208: case i_DIVL:
3209: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
3210: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3211: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
3212: if (using_ce020) {
3213: addcycles_ce020 (70);
3214: }
3215: sync_m68k_pc ();
3216: printf ("\tm68k_divl(opcode, dst, extra, oldpc);\n");
3217: break;
3218: case i_MULL:
3219: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3220: genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
3221: if (using_ce020) {
3222: addcycles_ce020 (40);
3223: }
3224: sync_m68k_pc ();
3225: printf ("\tm68k_mull(opcode, dst, extra);\n");
3226: break;
3227: case i_BFTST:
3228: case i_BFEXTU:
3229: case i_BFCHG:
3230: case i_BFEXTS:
3231: case i_BFCLR:
3232: case i_BFFFO:
3233: case i_BFSET:
3234: case i_BFINS:
3235: {
3236: const char *getb, *putb;
3237:
3238: if (using_mmu || using_ce020) {
3239: getb = "x_get_bitfield";
3240: putb = "x_put_bitfield";
3241: } else {
3242: getb = "get_bitfield";
3243: putb = "put_bitfield";
3244: }
3245:
3246: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3247: genamode (curi->dmode, "dstreg", sz_long, "dst", 2, 0, 0);
3248: start_brace ();
3249: printf ("\tuae_u32 bdata[2];\n");
3250: printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
3251: printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
3252: if (curi->dmode == Dreg) {
3253: printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg);\n");
3254: printf ("\toffset &= 0x1f;\n");
3255: printf ("\ttmp = (tmp << offset) | (tmp >> (32 - offset));\n");
3256: printf ("\tbdata[0] = tmp & ((1 << (32 - width)) - 1);\n");
3257: } else {
3258: printf ("\tuae_u32 tmp;\n");
3259: printf ("\tdsta += offset >> 3;\n");
3260: printf ("\ttmp = %s (dsta, bdata, offset, width);\n", getb);
3261: }
3262: printf ("\tSET_NFLG_ALWAYS (((uae_s32)tmp) < 0 ? 1 : 0);\n");
3263: if (curi->mnemo == i_BFEXTS)
3264: printf ("\ttmp = (uae_s32)tmp >> (32 - width);\n");
3265: else
3266: printf ("\ttmp >>= (32 - width);\n");
3267: printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
3268: switch (curi->mnemo) {
3269: case i_BFTST:
3270: break;
3271: case i_BFEXTU:
3272: case i_BFEXTS:
3273: printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = tmp;\n");
3274: break;
3275: case i_BFCHG:
3276: printf ("\ttmp = tmp ^ (0xffffffffu >> (32 - width));\n");
3277: break;
3278: case i_BFCLR:
3279: printf ("\ttmp = 0;\n");
3280: break;
3281: case i_BFFFO:
3282: printf ("\t{ uae_u32 mask = 1 << (width - 1);\n");
3283: printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
3284: printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = offset;\n");
3285: break;
3286: case i_BFSET:
3287: printf ("\ttmp = 0xffffffffu >> (32 - width);\n");
3288: break;
3289: case i_BFINS:
3290: printf ("\ttmp = m68k_dreg (regs, (extra >> 12) & 7);\n");
3291: printf ("\ttmp = tmp & (0xffffffffu >> (32 - width));\n");
3292: printf ("\tSET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0);\n");
3293: printf ("\tSET_ZFLG (tmp == 0);\n");
3294: break;
3295: default:
3296: break;
3297: }
3298: if (curi->mnemo == i_BFCHG
3299: || curi->mnemo == i_BFCLR
3300: || curi->mnemo == i_BFSET
3301: || curi->mnemo == i_BFINS) {
3302: if (curi->dmode == Dreg) {
3303: printf ("\ttmp = bdata[0] | (tmp << (32 - width));\n");
3304: printf ("\tm68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));\n");
3305: } else {
3306: printf ("\t%s(dsta, bdata, tmp, offset, width);\n", putb);
3307: }
3308: }
3309: }
3310: break;
3311: case i_PACK:
3312: if (curi->smode == Dreg) {
3313: printf ("\tuae_u16 val = m68k_dreg (regs, srcreg) + %s;\n", gen_nextiword (0));
3314: printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
3315: } else {
3316: printf ("\tuae_u16 val;\n");
3317: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n");
3318: printf ("\tval = (uae_u16)%s (m68k_areg (regs, srcreg));\n", srcb);
3319: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n");
3320: printf ("\tval = (val | ((uae_u16)%s (m68k_areg (regs, srcreg)) << 8)) + %s;\n", srcb, gen_nextiword (0));
3321: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n");
3322: gen_set_fault_pc ();
3323: printf ("\t%s (m68k_areg (regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n", dstb);
3324: }
3325: break;
3326: case i_UNPK:
3327: if (curi->smode == Dreg) {
3328: printf ("\tuae_u16 val = m68k_dreg (regs, srcreg);\n");
3329: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0));
3330: printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
3331: } else {
3332: printf ("\tuae_u16 val;\n");
3333: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n");
3334: printf ("\tval = (uae_u16)%s (m68k_areg (regs, srcreg));\n", srcb);
3335: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0));
3336: if (cpu_level >= 2) {
3337: printf ("\tm68k_areg (regs, dstreg) -= 2 * areg_byteinc[dstreg];\n");
3338: printf ("\t%s (m68k_areg (regs, dstreg) + areg_byteinc[dstreg], val);\n", dstb);
3339: printf ("\t%s (m68k_areg (regs, dstreg), val >> 8);\n", dstb);
3340: } else {
3341: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n");
3342: printf ("\t%s (m68k_areg (regs, dstreg),val);\n", dstb);
3343: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n");
3344: gen_set_fault_pc ();
3345: printf ("\t%s (m68k_areg (regs, dstreg),val >> 8);\n", dstb);
3346: }
3347: }
3348: break;
3349: case i_TAS:
3350: genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
3351: genflags (flag_logical, curi->size, "src", "", "");
3352: if (!isreg (curi->smode))
3353: addcycles000 (2);
3354: fill_prefetch_next ();
3355: printf ("\tsrc |= 0x80;\n");
3356: if (cpu_level >= 2 || curi->smode == Dreg || !using_ce) {
3357: if (next_cpu_level < 2)
3358: next_cpu_level = 2 - 1;
3359: genastore ("src", curi->smode, "srcreg", curi->size, "src");
3360: } else {
3361: printf ("\tif (!is_cycle_ce ()) {\n");
3362: genastore ("src", curi->smode, "srcreg", curi->size, "src");
3363: printf ("\t} else {\n");
3364: printf ("\t\tdo_cycles_ce000 (4);\n");
3365: printf ("\t}\n");
3366: }
3367: break;
3368: case i_FPP:
3369: fpulimit();
3370: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3371: sync_m68k_pc ();
3372: printf ("\tfpuop_arithmetic(opcode, extra);\n");
3373: break;
3374: case i_FDBcc:
3375: fpulimit();
3376: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3377: sync_m68k_pc ();
3378: printf ("\tfpuop_dbcc (opcode, extra);\n");
3379: break;
3380: case i_FScc:
3381: fpulimit();
3382: genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
3383: sync_m68k_pc ();
3384: printf ("\tfpuop_scc (opcode, extra);\n");
3385: break;
3386: case i_FTRAPcc:
3387: fpulimit();
3388: printf ("\tuaecptr oldpc = m68k_getpc ();\n");
3389: printf ("\tuae_u16 extra = %s;\n", gen_nextiword (0));
3390: if (curi->smode != am_unknown && curi->smode != am_illg)
3391: genamode (curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0);
3392: sync_m68k_pc ();
3393: printf ("\tfpuop_trapcc (opcode, oldpc, extra);\n");
3394: break;
3395: case i_FBcc:
3396: fpulimit();
3397: sync_m68k_pc ();
3398: start_brace ();
3399: printf ("\tuaecptr pc = m68k_getpc ();\n");
3400: genamode (curi->dmode, "srcreg", curi->size, "extra", 1, 0, 0);
3401: sync_m68k_pc ();
3402: printf ("\tfpuop_bcc (opcode, pc,extra);\n");
3403: break;
3404: case i_FSAVE:
3405: fpulimit();
3406: sync_m68k_pc ();
3407: printf ("\tfpuop_save (opcode);\n");
3408: break;
3409: case i_FRESTORE:
3410: fpulimit();
3411: sync_m68k_pc ();
3412: printf ("\tfpuop_restore (opcode);\n");
3413: break;
3414:
3415: case i_CINVL:
3416: case i_CINVP:
3417: case i_CINVA:
3418: case i_CPUSHL:
3419: case i_CPUSHP:
3420: case i_CPUSHA:
3421: if (using_mmu)
1.1.1.3 ! root 3422: printf ("\tflush_mmu%s(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n", mmu_postfix);
1.1 root 3423: printf ("\tif (opcode & 0x80)\n");
3424: printf ("\t\tflush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n");
3425: break;
3426:
3427: case i_MOVE16:
3428: {
3429: if ((opcode & 0xfff8) == 0xf620) {
3430: /* MOVE16 (Ax)+,(Ay)+ */
3431: printf ("\tuae_u32 v1, v2, v3, v4;\n");
3432: printf ("\tuaecptr mems = m68k_areg (regs, srcreg) & ~15, memd;\n");
3433: printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword (0));
3434: printf ("\tmemd = m68k_areg (regs, dstreg) & ~15;\n");
3435: printf ("\tv1 = %s (mems);\n", srcl);
3436: printf ("\tv2 = %s (mems + 4);\n", srcl);
3437: printf ("\tv3 = %s (mems + 8);\n", srcl);
3438: printf ("\tv4 = %s (mems + 12);\n", srcl);
3439: printf ("\t%s (memd , v1);\n", dstl);
3440: printf ("\t%s (memd + 4, v2);\n", dstl);
3441: printf ("\t%s (memd + 8, v3);\n", dstl);
3442: printf ("\t%s (memd + 12, v4);\n", dstl);
3443: printf ("\tif (srcreg != dstreg)\n");
3444: printf ("\t\tm68k_areg (regs, srcreg) += 16;\n");
3445: printf ("\tm68k_areg (regs, dstreg) += 16;\n");
3446: } else {
3447: /* Other variants */
3448: printf ("\tuae_u32 v1, v2, v3, v4;\n");
3449: genamode (curi->smode, "srcreg", curi->size, "mems", 0, 2, 0);
3450: genamode (curi->dmode, "dstreg", curi->size, "memd", 0, 2, 0);
3451: printf ("\tmemsa &= ~15;\n");
3452: printf ("\tmemda &= ~15;\n");
3453: printf ("\tv1 = %s (memsa);\n", srcl);
3454: printf ("\tv2 = %s (memsa + 4);\n", srcl);
3455: printf ("\tv3 = %s (memsa + 8);\n", srcl);
3456: printf ("\tv4 = %s (memsa + 12);\n", srcl);
3457: printf ("\t%s (memda , v1);\n", dstl);
3458: printf ("\t%s (memda + 4, v2);\n", dstl);
3459: printf ("\t%s (memda + 8, v3);\n", dstl);
3460: printf ("\t%s (memda + 12, v4);\n", dstl);
3461: if ((opcode & 0xfff8) == 0xf600)
3462: printf ("\tm68k_areg (regs, srcreg) += 16;\n");
3463: else if ((opcode & 0xfff8) == 0xf608)
3464: printf ("\tm68k_areg (regs, dstreg) += 16;\n");
3465: }
3466: }
3467: break;
3468:
3469: case i_PFLUSHN:
3470: case i_PFLUSH:
3471: case i_PFLUSHAN:
3472: case i_PFLUSHA:
3473: case i_PLPAR:
3474: case i_PLPAW:
3475: case i_PTESTR:
3476: case i_PTESTW:
3477: sync_m68k_pc ();
3478: printf ("\tmmu_op (opcode, 0);\n");
3479: break;
3480: case i_MMUOP030:
3481: printf ("\tuaecptr pc = m68k_getpc ();\n");
3482: printf ("\tuae_u16 extra = x_get_word (pc + 2);\n");
3483: m68k_pc_offset += 2;
3484: sync_m68k_pc ();
3485: if (curi->smode == Areg || curi->smode == Dreg)
3486: printf("\tuae_u16 extraa = 0;\n");
3487: else
3488: genamode (curi->smode, "srcreg", curi->size, "extra", 0, 0, 0);
3489: sync_m68k_pc ();
3490: printf ("\tmmu_op30 (pc, opcode, extra, extraa);\n");
3491: break;
3492: default:
3493: abort ();
3494: break;
3495: }
3496: finish_braces ();
3497: if (limit_braces) {
3498: printf ("\n#endif\n");
3499: n_braces = limit_braces;
3500: limit_braces = 0;
3501: finish_braces ();
3502: }
3503: if (did_prefetch >= 0)
3504: fill_prefetch_finish ();
3505: if (!count_cycles)
3506: addcycles_ce020 (2);
3507: sync_m68k_pc ();
3508: did_prefetch = 0;
3509: }
3510:
3511: static void generate_includes (FILE * f)
3512: {
3513: fprintf (f, "#include \"sysconfig.h\"\n");
3514: fprintf (f, "#include \"sysdeps.h\"\n");
3515: fprintf (f, "#include \"options_cpu.h\"\n");
3516: fprintf (f, "#include \"memory.h\"\n");
3517: fprintf (f, "#include \"custom.h\"\n");
3518: fprintf (f, "#include \"events.h\"\n");
3519: fprintf (f, "#include \"newcpu.h\"\n");
3520: fprintf (f, "#include \"cpu_prefetch.h\"\n");
3521: fprintf (f, "#include \"cputbl.h\"\n");
3522: fprintf (f, "#include \"main.h\"\n");
3523:
3524: fprintf (f, "#define CPUFUNC(x) x##_ff\n"
3525: "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n"
3526: "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n"
3527: "#ifdef NOFLAGS\n"
3528: "#include \"noflags.h\"\n"
3529: "#endif\n");
3530: }
3531:
3532: static int postfix;
3533:
3534:
3535: static char *decodeEA (amodes mode, wordsizes size)
3536: {
3537: static char buffer[80];
3538:
3539: buffer[0] = 0;
3540: switch (mode){
3541: case Dreg:
3542: strcpy (buffer,"Dn");
3543: break;
3544: case Areg:
3545: strcpy (buffer,"An");
3546: break;
3547: case Aind:
3548: strcpy (buffer,"(An)");
3549: break;
3550: case Aipi:
3551: strcpy (buffer,"(An)+");
3552: break;
3553: case Apdi:
3554: strcpy (buffer,"-(An)");
3555: break;
3556: case Ad16:
3557: strcpy (buffer,"(d16,An)");
3558: break;
3559: case Ad8r:
3560: strcpy (buffer,"(d8,An,Xn)");
3561: break;
3562: case PC16:
3563: strcpy (buffer,"(d16,PC)");
3564: break;
3565: case PC8r:
3566: strcpy (buffer,"(d8,PC,Xn)");
3567: break;
3568: case absw:
3569: strcpy (buffer,"(xxx).W");
3570: break;
3571: case absl:
3572: strcpy (buffer,"(xxx).L");
3573: break;
3574: case imm:
3575: switch (size){
3576: case sz_byte:
3577: strcpy (buffer,"#<data>.B");
3578: break;
3579: case sz_word:
3580: strcpy (buffer,"#<data>.W");
3581: break;
3582: case sz_long:
3583: strcpy (buffer,"#<data>.L");
3584: break;
3585: default:
3586: break;
3587: }
3588: break;
3589: case imm0:
3590: strcpy (buffer,"#<data>.B");
3591: break;
3592: case imm1:
3593: strcpy (buffer,"#<data>.W");
3594: break;
3595: case imm2:
3596: strcpy (buffer,"#<data>.L");
3597: break;
3598: case immi:
3599: strcpy (buffer,"#<data>");
3600: break;
3601:
3602: default:
3603: break;
3604: }
3605: return buffer;
3606: }
3607:
3608: static char *outopcode (int opcode)
3609: {
3610: static char out[100];
3611: struct instr *ins;
3612: int i;
3613:
3614: ins = &table68k[opcode];
3615: for (i = 0; lookuptab[i].name[0]; i++) {
3616: if (ins->mnemo == lookuptab[i].mnemo)
3617: break;
3618: }
3619: {
3620: // char *s = ua (lookuptab[i].name);
3621: const char *s = lookuptab[i].name;
3622: strcpy (out, s);
3623: //xfree (s);
3624: }
3625: if (ins->smode == immi)
3626: strcat (out, "Q");
3627: if (ins->size == sz_byte)
3628: strcat (out,".B");
3629: if (ins->size == sz_word)
3630: strcat (out,".W");
3631: if (ins->size == sz_long)
3632: strcat (out,".L");
3633: strcat (out," ");
3634: if (ins->suse)
3635: strcat (out, decodeEA (ins->smode, ins->size));
3636: if (ins->duse) {
3637: if (ins->suse) strcat (out,",");
3638: strcat (out, decodeEA (ins->dmode, ins->size));
3639: }
3640: return out;
3641: }
3642:
3643: static void generate_one_opcode (int rp)
3644: {
3645: int idx;
3646: uae_u16 smsk, dmsk;
3647: long int opcode = opcode_map[rp];
3648: int i68000 = table68k[opcode].clev > 0;
3649:
3650: if (table68k[opcode].mnemo == i_ILLG
3651: || table68k[opcode].clev > cpu_level)
3652: return;
3653:
3654: for (idx = 0; lookuptab[idx].name[0]; idx++) {
3655: if (table68k[opcode].mnemo == lookuptab[idx].mnemo)
3656: break;
3657: }
3658:
3659: if (table68k[opcode].handler != -1)
3660: return;
3661:
3662: if (opcode_next_clev[rp] != cpu_level) {
3663: //char *name = ua (lookuptab[idx].name);
3664: const char *name = lookuptab[idx].name;
3665: if (generate_stbl)
3666: fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d), %d }, /* %s */\n",
3667: (using_ce || using_ce020) ? "(cpuop_func*)" : "",
3668: opcode, opcode_last_postfix[rp],
3669: opcode, name);
3670: //xfree (name);
3671: return;
3672: }
3673: fprintf (headerfile, "extern %s op_%04lx_%d_nf;\n",
3674: (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix);
3675: fprintf (headerfile, "extern %s op_%04lx_%d_ff;\n",
3676: (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix);
3677: printf ("/* %s */\n", outopcode (opcode));
3678: if (i68000)
3679: printf("#ifndef CPUEMU_68000_ONLY\n");
3680: printf ("%s REGPARAM2 CPUFUNC(op_%04lx_%d)(uae_u32 opcode)\n{\n", (using_ce || using_ce020) ? "void" : "unsigned long", opcode, postfix);
3681:
3682: switch (table68k[opcode].stype) {
3683: case 0: smsk = 7; break;
3684: case 1: smsk = 255; break;
3685: case 2: smsk = 15; break;
3686: case 3: smsk = 7; break;
3687: case 4: smsk = 7; break;
3688: case 5: smsk = 63; break;
3689: case 7: smsk = 3; break;
3690: default: abort ();
3691: }
3692: dmsk = 7;
3693:
3694: next_cpu_level = -1;
3695: if (table68k[opcode].suse
3696: && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
3697: && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
3698: && table68k[opcode].smode != absw && table68k[opcode].smode != absl
3699: && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
3700: {
3701: if (table68k[opcode].spos == -1) {
3702: if (((int) table68k[opcode].sreg) >= 128)
3703: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
3704: else
3705: printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
3706: } else {
3707: char source[100];
3708: int pos = table68k[opcode].spos;
3709:
3710: if (pos)
3711: sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
3712: else
3713: sprintf (source, "(opcode & %d)", smsk);
3714:
3715: if (table68k[opcode].stype == 3)
3716: printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
3717: else if (table68k[opcode].stype == 1)
3718: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
3719: else
3720: printf ("\tuae_u32 srcreg = %s;\n", source);
3721: }
3722: }
3723: if (table68k[opcode].duse
3724: /* Yes, the dmode can be imm, in case of LINK or DBcc */
3725: && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
3726: && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
3727: && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
3728: {
3729: if (table68k[opcode].dpos == -1) {
3730: if (((int) table68k[opcode].dreg) >= 128)
3731: printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
3732: else
3733: printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
3734: } else {
3735: int pos = table68k[opcode].dpos;
3736: if (pos)
3737: printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
3738: pos, dmsk);
3739: else
3740: printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
3741: }
3742: }
3743: need_endlabel = 0;
3744: endlabelno++;
3745: sprintf (endlabelstr, "endlabel%d", endlabelno);
3746: count_read = count_write = count_ncycles = count_cycles = 0;
3747: count_read_ea = count_write_ea = count_cycles_ea = 0;
3748: gen_opcode (opcode);
3749: if (need_endlabel)
3750: printf ("%s: ;\n", endlabelstr);
3751: returncycles ("", insn_n_cycles);
3752: printf ("}");
3753: if (using_ce || using_prefetch) {
3754: if (count_read + count_write + count_cycles == 0)
3755: count_cycles = 4;
3756: printf (" /* %d%s (%d/%d)",
3757: (count_read + count_write) * 4 + count_cycles, count_ncycles ? "+" : "", count_read, count_write);
3758: printf (" */\n");
3759: } else {
3760: printf("\n");
3761: }
3762: printf ("\n");
3763: if (i68000)
3764: printf("#endif\n");
3765: opcode_next_clev[rp] = next_cpu_level;
3766: opcode_last_postfix[rp] = postfix;
3767:
3768: if (generate_stbl) {
3769: // char *name = ua (lookuptab[idx].name);
3770: const char *name = lookuptab[idx].name;
3771: if (i68000)
3772: fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
3773: fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d), %d }, /* %s */\n",
3774: (using_ce || using_ce020) ? "(cpuop_func*)" : "",
3775: opcode, postfix, opcode, name);
3776: if (i68000)
3777: fprintf (stblfile, "#endif\n");
3778: //xfree (name);
3779: }
3780: }
3781:
3782: static void generate_func (void)
3783: {
3784: int j, rp;
3785:
3786: /* sam: this is for people with low memory (eg. me :)) */
3787: printf ("\n"
3788: "#if !defined(PART_1) && !defined(PART_2) && "
3789: "!defined(PART_3) && !defined(PART_4) && "
3790: "!defined(PART_5) && !defined(PART_6) && "
3791: "!defined(PART_7) && !defined(PART_8)"
3792: "\n"
3793: "#define PART_1 1\n"
3794: "#define PART_2 1\n"
3795: "#define PART_3 1\n"
3796: "#define PART_4 1\n"
3797: "#define PART_5 1\n"
3798: "#define PART_6 1\n"
3799: "#define PART_7 1\n"
3800: "#define PART_8 1\n"
3801: "#endif\n\n");
3802:
3803: rp = 0;
3804: for(j = 1; j <= 8; ++j) {
3805: int k = (j * nr_cpuop_funcs) / 8;
3806: printf ("#ifdef PART_%d\n",j);
3807: for (; rp < k; rp++)
3808: generate_one_opcode (rp);
3809: printf ("#endif\n\n");
3810: }
3811:
3812: if (generate_stbl)
3813: fprintf (stblfile, "{ 0, 0 }};\n");
3814: }
3815:
3816: int main (int argc, char **argv)
3817: {
3818: int i, rp, postfix2;
3819: char fname[100];
3820:
3821: read_table68k ();
3822: do_merges ();
3823:
3824: opcode_map = xmalloc (int, nr_cpuop_funcs);
3825: opcode_last_postfix = xmalloc (int, nr_cpuop_funcs);
3826: opcode_next_clev = xmalloc (int, nr_cpuop_funcs);
3827: counts = xmalloc (unsigned long, 65536);
3828: read_counts ();
3829:
3830: /* It would be a lot nicer to put all in one file (we'd also get rid of
3831: * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
3832: * I don't dare to touch the 68k version. */
3833:
3834: headerfile = fopen ("cputbl.h", "wb");
3835:
3836: stblfile = fopen ("cpustbl.c", "wb");
3837: generate_includes (stblfile);
3838:
3839: using_prefetch = 0;
3840: using_indirect = 0;
3841: using_exception_3 = 1;
3842: using_ce = 0;
3843:
3844: postfix2 = -1;
1.1.1.3 ! root 3845: for (i = 0; i <= 32; i++) {
1.1 root 3846: postfix = i;
3847: if ((i >= 6 && i < 11) || (i > 12 && i < 20) || (i > 23 && i < 31))
3848: continue;
3849: generate_stbl = 1;
1.1.1.3 ! root 3850: if (i == 0 || i == 11 || i == 12 || i == 20 || i == 21 || i == 31 || i == 32) {
1.1 root 3851: if (generate_stbl)
3852: fprintf (stblfile, "#ifdef CPUEMU_%d\n", postfix);
3853: postfix2 = postfix;
3854: sprintf (fname, "cpuemu_%d.c", postfix);
3855: if (freopen (fname, "wb", stdout) == NULL) {
3856: perror(fname);
3857: return -1;
3858: }
3859: generate_includes (stdout);
3860: }
3861: using_mmu = 0;
3862: using_prefetch = 0;
3863: using_ce = 0;
3864: using_ce020 = 0;
3865: using_mmu = 0;
3866: cpu_level = 5 - i;
3867: if (i == 11 || i == 12) {
3868: cpu_level = 0;
3869: using_prefetch = 1;
3870: using_exception_3 = 1;
3871: if (i == 12)
3872: using_ce = 1;
3873: for (rp = 0; rp < nr_cpuop_funcs; rp++)
3874: opcode_next_clev[rp] = 0;
3875: } else if (i == 20) {
3876: cpu_level = 2;
3877: using_ce020 = 1;
3878: read_counts ();
3879: for (rp = 0; rp < nr_cpuop_funcs; rp++)
3880: opcode_next_clev[rp] = cpu_level;
3881: } else if (i == 21 || i == 22 || i == 23) {
3882: cpu_level = 3 + (23 - i);
3883: using_ce020 = 2;
3884: if (i == 21) {
3885: read_counts ();
3886: for (rp = 0; rp < nr_cpuop_funcs; rp++)
3887: opcode_next_clev[rp] = cpu_level;
3888: }
3889: } else if (i >= 31 && i < 40) {
1.1.1.3 ! root 3890: cpu_level = 3 + 32 - i;
1.1 root 3891: using_mmu = 1;
1.1.1.3 ! root 3892: if (cpu_level == 3) {
! 3893: fprintf (stdout, "#include \"cpummu030.h\"\n");
! 3894: mmu_postfix = "030";
! 3895: }
! 3896: else {
! 3897: fprintf (stdout, "#include \"cpummu.h\"\n");
! 3898: mmu_postfix = "";
! 3899: }
! 3900:
! 3901: if (i == 31)
1.1 root 3902: read_counts ();
3903: for (rp = 0; rp < nr_cpuop_funcs; rp++)
3904: opcode_next_clev[rp] = cpu_level;
3905: }
3906:
3907: if (generate_stbl) {
3908: if ((i > 0 && i < 10) || (i >= 20))
3909: fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
3910: fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d)[] = {\n", postfix);
3911: }
3912:
3913: generate_func ();
3914: if (generate_stbl) {
3915: if ((i > 0 && i < 10) || (i >= 20))
3916: fprintf (stblfile, "#endif /* CPUEMU_68000_ONLY */\n");
3917: if (postfix2 >= 0)
3918: fprintf (stblfile, "#endif /* CPUEMU_%d */\n", postfix2);
3919: }
3920: postfix2 = -1;
3921: }
3922:
3923: free (table68k);
3924: return 0;
3925: }
3926:
3927: void write_log (const TCHAR *format,...)
3928: {
3929: }
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