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1.1.1.4 root 1: /* 1.1.1.5 ! root 2: * UAE - The Un*x Amiga Emulator ! 3: * ! 4: * MC68000 emulation generator ! 5: * ! 6: * This is a fairly stupid program that generates a lot of case labels that ! 7: * can be #included in a switch statement. ! 8: * As an alternative, it can generate functions that handle specific ! 9: * MC68000 instructions, plus a prototype header file and a function pointer ! 10: * array to look up the function for an opcode. ! 11: * Error checking is bad, an illegal table68k file will cause the program to ! 12: * call abort(). ! 13: * The generated code is sometimes sub-optimal, an optimizing compiler should ! 14: * take care of this. ! 15: * ! 16: * The source for the insn timings is Markt & Technik's Amiga Magazin 8/1992. ! 17: * ! 18: * Copyright 1995, 1996, 1997, 1998, 1999, 2000 Bernd Schmidt ! 19: */ 1.1.1.4 root 20: 21: #include "sysconfig.h" 22: #include "sysdeps.h" 23: #include <ctype.h> 24: #include <string.h> 25: 26: #include "readcpu.h" 27: 1.1.1.5 ! root 28: char *ua (const char *s) { ! 29: return strdup(s); ! 30: } ! 31: 1.1.1.4 root 32: #define BOOL_TYPE "int" 33: /* Define the minimal 680x0 where NV flags are not affected by xBCD instructions. */ 34: #define xBCD_KEEPS_NV_FLAGS 4 35: 36: static FILE *headerfile; 37: static FILE *stblfile; 38: 39: static int using_prefetch, using_indirect, using_mmu; 40: static int using_prefetch_020, using_ce020; 41: static int using_exception_3; 1.1.1.5 ! root 42: static int using_bus_error; 1.1.1.4 root 43: static int using_ce; 44: static int using_tracer; 45: static int using_waitstates; 1.1.1.5 ! root 46: static int using_simple_cycles; ! 47: static int cpu_level, cpu_generic; 1.1.1.4 root 48: static int count_read, count_write, count_cycles, count_ncycles; 49: static int count_cycles_ce020; 50: static int count_read_ea, count_write_ea, count_cycles_ea; 51: static const char *mmu_postfix; 52: static int memory_cycle_cnt; 53: static int did_prefetch; 1.1.1.5 ! root 54: static int ipl_fetched; 1.1.1.4 root 55: 56: static int optimized_flags; 57: 1.1.1.5 ! root 58: #ifdef WINUAE_FOR_HATARI ! 59: static long nCurInstrCycPos; /* Hatari only : Stores where we have to patch in the current cycles value */ ! 60: #endif ! 61: 1.1.1.4 root 62: #define GF_APDI 1 63: #define GF_AD8R 2 64: #define GF_PC8R 4 65: #define GF_AA 7 66: #define GF_NOREFILL 8 67: #define GF_PREFETCH 16 68: #define GF_FC 32 69: #define GF_MOVE 64 70: #define GF_IR2IRC 128 71: #define GF_LRMW 256 72: #define GF_NOFAULTPC 512 73: #define GF_RMW 1024 74: #define GF_OPCE020 2048 75: 76: /* For the current opcode, the next lower level that will have different code. 1.1.1.5 ! root 77: * Initialized to -1 for each opcode. If it remains unchanged, indicates we ! 78: * are done with that opcode. */ 1.1.1.4 root 79: static int next_cpu_level; 80: 81: static int *opcode_map; 82: static int *opcode_next_clev; 83: static int *opcode_last_postfix; 84: static unsigned long *counts; 85: static int generate_stbl; 86: static int mmufixupcnt; 87: static int mmufixupstate; 1.1.1.5 ! root 88: static int disp020cnt; 1.1.1.4 root 89: static bool candormw; 90: static bool genastore_done; 91: static char rmw_varname[100]; 1.1.1.5 ! root 92: static unsigned long current_opcode; 1.1.1.4 root 93: 94: #define GENA_GETV_NO_FETCH 0 95: #define GENA_GETV_FETCH 1 96: #define GENA_GETV_FETCH_ALIGN 2 97: #define GENA_MOVEM_DO_INC 0 98: #define GENA_MOVEM_NO_INC 1 99: #define GENA_MOVEM_MOVE16 2 100: 1.1.1.5 ! root 101: static const char *srcl, *dstl; ! 102: static const char *srcw, *dstw; ! 103: static const char *srcb, *dstb; ! 104: static const char *srcblrmw, *srcwlrmw, *srcllrmw; ! 105: static const char *dstblrmw, *dstwlrmw, *dstllrmw; ! 106: static const char *srcbrmw, *srcwrmw, *srclrmw; ! 107: static const char *dstbrmw, *dstwrmw, *dstlrmw; ! 108: static const char *prefetch_long, *prefetch_word; ! 109: static const char *srcli, *srcwi, *srcbi, *nextl, *nextw; ! 110: static const char *srcld, *dstld; ! 111: static const char *srcwd, *dstwd; ! 112: static const char *do_cycles, *disp000, *disp020, *getpc; 1.1.1.4 root 113: 114: #define fetchmode_fea 1 115: #define fetchmode_cea 2 116: #define fetchmode_fiea 3 117: #define fetchmode_ciea 4 118: #define fetchmode_jea 5 119: 1.1.1.5 ! root 120: /* (SC) central hacking place for 030/040 instruction timinigs. This is carefully adjusted ! 121: in order to ! 122: - make all ROM POST happy ! 123: - make diagnostic kernels (diagnostics and dvt040) happy ! 124: - give reasonable results in NXbench ! 125: */ ! 126: static int adjust_cycles(int cycles) { ! 127: struct instr *curi = table68k + current_opcode; ! 128: // General instruction timing scaling factors for 030/040. Mostly guesswork based ! 129: // on NXbench scores ! 130: switch(cpu_level) { ! 131: case 3: cycles *= 3; cycles /= 2; break; ! 132: case 4: cycles *= 1; cycles /= 3; break; ! 133: } ! 134: if(cycles == 0) cycles = 1; ! 135: // special cases for timing loops, ROM POST depend on these ! 136: switch (cpu_level) { ! 137: case 3: // MC68030 ! 138: switch(curi->mnemo) { ! 139: case i_DBcc: cycles = 6; break; ! 140: case i_Bcc: cycles = 4; break; ! 141: case i_ASL: cycles = 2; break; ! 142: case i_MOVE: cycles /= 5; break; ! 143: } ! 144: break; ! 145: case 4: // MC68040 ! 146: switch(curi->mnemo) { ! 147: case i_DBcc: cycles = 4; break; ! 148: } ! 149: break; ! 150: } ! 151: return cycles; ! 152: } ! 153: ! 154: /*NORETURN */static void term (void) 1.1.1.4 root 155: { 1.1.1.5 ! root 156: printf("Abort!\n"); ! 157: abort (); 1.1.1.4 root 158: } 1.1.1.5 ! root 159: /*NORETURN */static void term_err (const char *err) 1.1.1.4 root 160: { 1.1.1.5 ! root 161: printf ("%s\n", err); ! 162: term (); 1.1.1.4 root 163: } 164: 165: static void read_counts (void) 166: { 1.1.1.5 ! root 167: FILE *file; ! 168: unsigned int opcode, count, total; ! 169: char name[20]; ! 170: int nr = 0; ! 171: memset (counts, 0, 65536 * sizeof *counts); ! 172: ! 173: count = 0; ! 174: file = fopen ("frequent.68k", "r"); ! 175: if (file) { ! 176: if (fscanf (file, "Total: %u\n", &total) == 0) { ! 177: abort (); ! 178: } ! 179: while (fscanf (file, "%x: %u %s\n", &opcode, &count, name) == 3) { ! 180: opcode_next_clev[nr] = 5; ! 181: opcode_last_postfix[nr] = -1; ! 182: opcode_map[nr++] = opcode; ! 183: counts[opcode] = count; ! 184: } ! 185: fclose (file); ! 186: } ! 187: if (nr == nr_cpuop_funcs) ! 188: return; ! 189: for (opcode = 0; opcode < 0x10000; opcode++) { ! 190: if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG ! 191: && counts[opcode] == 0) ! 192: { ! 193: opcode_next_clev[nr] = 5; ! 194: opcode_last_postfix[nr] = -1; ! 195: opcode_map[nr++] = opcode; ! 196: counts[opcode] = count; ! 197: } ! 198: } ! 199: if (nr != nr_cpuop_funcs) ! 200: term (); 1.1.1.4 root 201: } 202: 203: static char endlabelstr[80]; 204: static int endlabelno = 0; 205: static int need_endlabel; 1.1.1.5 ! root 206: static int genamode_cnt, genamode8r_offset[2]; 1.1.1.4 root 207: 208: static int n_braces, limit_braces; 209: static int m68k_pc_offset, m68k_pc_offset_old; 1.1.1.5 ! root 210: static int m68k_pc_total; ! 211: static int branch_inst; 1.1.1.4 root 212: static int insn_n_cycles, insn_n_cycles020; 213: static int ir2irc; 214: 215: static int tail_ce020, total_ce020, head_in_ea_ce020; 216: static bool head_ce020_cycs_done, tail_ce020_done; 217: static int subhead_ce020; 218: static struct instr *curi_ce020; 219: static bool no_prefetch_ce020; 220: static bool got_ea_ce020; 221: 222: static void fpulimit (void) 223: { 1.1.1.5 ! root 224: if (limit_braces) ! 225: return; ! 226: printf ("\n#ifdef FPUEMU\n"); ! 227: limit_braces = n_braces; ! 228: n_braces = 0; ! 229: } ! 230: ! 231: static int s_count_read, s_count_write, s_count_cycles, s_count_ncycles; ! 232: ! 233: static void push_ins_cnt(void) ! 234: { ! 235: s_count_read = count_read; ! 236: s_count_write = count_write; ! 237: s_count_cycles = count_cycles; ! 238: s_count_ncycles = count_ncycles; 1.1.1.4 root 239: } 1.1.1.5 ! root 240: static void pop_ins_cnt(void) 1.1.1.4 root 241: { 1.1.1.5 ! root 242: count_read = s_count_read; ! 243: count_write = s_count_write; ! 244: count_cycles = s_count_cycles; ! 245: count_ncycles = s_count_ncycles; 1.1.1.4 root 246: } 247: 1.1.1.5 ! root 248: static bool isce020(void) ! 249: { ! 250: if (!using_ce020) ! 251: return false; ! 252: if (using_ce020 >= 3) ! 253: return false; ! 254: return true; ! 255: } ! 256: static bool isprefetch020(void) ! 257: { ! 258: if (!using_prefetch_020) ! 259: return false; ! 260: if (using_prefetch_020 >= 3) ! 261: return false; ! 262: return true; ! 263: } 1.1.1.4 root 264: 1.1.1.5 ! root 265: static void addcycles_ce020_2 (int cycles, const char *s) 1.1.1.4 root 266: { 1.1.1.5 ! root 267: if (!isce020()) ! 268: return; ! 269: if (cycles > 0) { ! 270: if (s == NULL) ! 271: printf ("\t%s (%d);\n", do_cycles, cycles); ! 272: else ! 273: printf ("\t%s (%d); /* %s */\n", do_cycles, cycles, s); ! 274: } ! 275: count_cycles += cycles; ! 276: count_cycles_ce020 += cycles; 1.1.1.4 root 277: } 1.1.1.5 ! root 278: static void addcycles_ce020 (int cycles) 1.1.1.4 root 279: { 1.1.1.5 ! root 280: addcycles_ce020_2 (cycles, NULL); 1.1.1.4 root 281: } 282: 283: static void get_prefetch_020 (void) 284: { 1.1.1.5 ! root 285: if (!isprefetch020() || no_prefetch_ce020) ! 286: return; ! 287: printf ("\tregs.irc = %s (%d);\n", prefetch_word, m68k_pc_offset); ! 288: } ! 289: static void get_prefetch_020_continue(void) ! 290: { ! 291: if (!isprefetch020()) ! 292: return; ! 293: if (using_ce020) ! 294: printf("\tcontinue_ce020_prefetch();\n"); ! 295: else ! 296: printf ("\tcontinue_020_prefetch();\n"); 1.1.1.4 root 297: } 298: 299: static void returntail (bool iswrite) 300: { 1.1.1.5 ! root 301: if (!isce020()) { ! 302: if (isprefetch020()) { ! 303: if (!tail_ce020_done) { ! 304: if (!did_prefetch) ! 305: get_prefetch_020 (); ! 306: did_prefetch = 1; ! 307: tail_ce020_done = true; ! 308: } ! 309: } ! 310: return; ! 311: } ! 312: if (!tail_ce020_done) { ! 313: total_ce020 -= 2; 1.1.1.4 root 314: #if 0 1.1.1.5 ! root 315: if (iswrite) { ! 316: printf("\t/* C - %d = %d */\n", memory_cycle_cnt, total_ce020 - memory_cycle_cnt); ! 317: total_ce020 -= memory_cycle_cnt; ! 318: } else { ! 319: printf("\t/* C = %d */\n", total_ce020); ! 320: } 1.1.1.4 root 321: #endif 1.1.1.5 ! root 322: if (0 && total_ce020 <= 0) { ! 323: printf ("\t/* C was zero */\n"); ! 324: total_ce020 = 1; ! 325: } ! 326: if (!did_prefetch) ! 327: get_prefetch_020 (); ! 328: if (total_ce020 > 0) ! 329: addcycles_ce020 (total_ce020); ! 330: ! 331: //printf ("\tregs.irc = %s;\n", prefetch_word); ! 332: if (0 && total_ce020 >= 2) { ! 333: printf ("\top_cycles = get_cycles () - op_cycles;\n"); ! 334: printf ("\top_cycles /= cpucycleunit;\n"); ! 335: printf ("\tif (op_cycles < %d) {\n", total_ce020); ! 336: printf ("\t\tdo_cycles_ce020 ((%d) - op_cycles);\n", total_ce020); ! 337: printf ("\t}\n"); ! 338: } 1.1.1.4 root 339: #if 0 1.1.1.5 ! root 340: if (tail_ce020 > 0) { ! 341: printf ("\tregs.ce020_tail = %d * cpucycleunit;\n", tail_ce020); ! 342: printf ("\tregs.ce020_tail_cycles = get_cycles () + regs.ce020_tail;\n"); ! 343: } else { ! 344: printf ("\tregs.ce020_tail = 0;\n"); ! 345: } 1.1.1.4 root 346: #endif 1.1.1.5 ! root 347: tail_ce020_done = true; ! 348: } 1.1.1.4 root 349: } 350: 1.1.1.5 ! root 351: static void returncycles (const char *s, int cycles) 1.1.1.4 root 352: { 1.1.1.5 ! root 353: if (using_ce || using_ce020) { 1.1.1.4 root 354: #if 0 1.1.1.5 ! root 355: if (tail_ce020 == 0) ! 356: printf ("\tregs.ce020memcycles -= 2 * cpucycleunit; /* T=0 */ \n"); ! 357: else if (tail_ce020 == 1) ! 358: printf ("\tregs.ce020memcycles -= 1 * cpucycleunit; /* T=1 */ \n"); ! 359: else if (tail_ce020 == 2) ! 360: printf ("\tregs.ce020memcycles -= 0 * cpucycleunit; /* T=2 */\n"); 1.1.1.4 root 361: #endif 1.1.1.5 ! root 362: printf ("%sreturn;\n", s); ! 363: return; ! 364: } ! 365: if (using_simple_cycles) ! 366: printf ("%sreturn %d + count_cycles;\n", s, adjust_cycles(cycles)); ! 367: else ! 368: printf ("%sreturn %d;\n", s, adjust_cycles(cycles)); ! 369: } ! 370: ! 371: static void addcycles_ce020_4 (const char *name, int head, int tail, int cycles) ! 372: { ! 373: if (!isce020()) ! 374: return; ! 375: if (!head && !tail && !cycles) ! 376: return; ! 377: printf ("\t/* %s H:%d,T:%d,C:%d */\n", name, head, tail, cycles); ! 378: } ! 379: static void addcycles_ce020_5 (const char *name, int head, int tail, int cycles, int ophead) ! 380: { ! 381: if (!isce020()) ! 382: return; ! 383: if (!head && !tail && !cycles && !ophead) { ! 384: printf ("\t/* OP zero */\n"); ! 385: return; ! 386: } ! 387: count_cycles += cycles; ! 388: if (!ophead) { ! 389: addcycles_ce020_4 (name, head, tail, cycles); ! 390: } else if (ophead > 0) { ! 391: printf ("\t/* %s H:%d-,T:%d,C:%d */\n", name, head, tail, cycles); ! 392: } else { ! 393: printf ("\t/* %s H:%d+,T:%d,C:%d */\n", name, head, tail, cycles); ! 394: } ! 395: } ! 396: ! 397: static void addcycles000_nonces(const char *s, const char *sc) ! 398: { ! 399: if (using_simple_cycles) { ! 400: printf("%scount_cycles += (%s) * CYCLE_UNIT / 2;\n", s, sc); ! 401: count_ncycles++; ! 402: } ! 403: } ! 404: static void addcycles000_nonce(const char *s, int c) ! 405: { ! 406: if (using_simple_cycles) { ! 407: printf("%scount_cycles += %d * CYCLE_UNIT / 2;\n", s, c); ! 408: count_ncycles++; ! 409: } ! 410: } ! 411: ! 412: static void addcycles000_onlyce (int cycles) ! 413: { ! 414: if (using_ce) { ! 415: printf ("\t%s (%d);\n", do_cycles, cycles); ! 416: } 1.1.1.4 root 417: } 418: 419: static void addcycles000 (int cycles) 420: { 1.1.1.5 ! root 421: if (using_ce) { ! 422: printf ("\t%s (%d);\n", do_cycles, cycles); ! 423: } ! 424: count_cycles += cycles; 1.1.1.4 root 425: } 426: 1.1.1.5 ! root 427: static void addcycles000_3 (const char *s) ! 428: { ! 429: if (using_ce) { ! 430: printf ("%sif (cycles > 0) %s (cycles);\n", s, do_cycles); ! 431: } ! 432: count_ncycles++; 1.1.1.4 root 433: } 434: 435: static int isreg (amodes mode) 436: { 1.1.1.5 ! root 437: if (mode == Dreg || mode == Areg) ! 438: return 1; ! 439: return 0; 1.1.1.4 root 440: } 441: 442: static void start_brace (void) 443: { 1.1.1.5 ! root 444: n_braces++; ! 445: printf ("{"); 1.1.1.4 root 446: } 447: 448: static void close_brace (void) 449: { 1.1.1.5 ! root 450: assert (n_braces > 0); ! 451: n_braces--; ! 452: printf ("}"); 1.1.1.4 root 453: } 454: 455: static void finish_braces (void) 456: { 1.1.1.5 ! root 457: while (n_braces > 0) ! 458: close_brace (); 1.1.1.4 root 459: } 460: 461: static void pop_braces (int to) 462: { 1.1.1.5 ! root 463: while (n_braces > to) ! 464: close_brace (); 1.1.1.4 root 465: } 466: 467: static int bit_size (int size) 468: { 1.1.1.5 ! root 469: switch (size) { ! 470: case sz_byte: return 8; ! 471: case sz_word: return 16; ! 472: case sz_long: return 32; ! 473: default: term (); ! 474: } ! 475: return 0; 1.1.1.4 root 476: } 477: 478: static const char *bit_mask (int size) 479: { 1.1.1.5 ! root 480: switch (size) { ! 481: case sz_byte: return "0xff"; ! 482: case sz_word: return "0xffff"; ! 483: case sz_long: return "0xffffffff"; ! 484: default: term (); ! 485: } ! 486: return 0; 1.1.1.4 root 487: } 488: 489: static void add_mmu040_movem (int movem) 490: { 1.1.1.5 ! root 491: if (movem != 3) ! 492: return; ! 493: printf ("\tif (mmu040_movem) {\n"); ! 494: printf ("\t\tsrca = mmu040_movem_ea;\n"); ! 495: printf ("\t} else\n"); ! 496: start_brace (); ! 497: } ! 498: ! 499: static void gen_nextilong2 (const char *type, const char *name, int flags, int movem) ! 500: { ! 501: int r = m68k_pc_offset; ! 502: m68k_pc_offset += 4; ! 503: ! 504: printf ("\t%s %s;\n", type, name); ! 505: add_mmu040_movem (movem); ! 506: if (using_ce020) { ! 507: if (flags & GF_NOREFILL) ! 508: printf("\t%s = %s (%d);\n", name, prefetch_long, r); ! 509: else ! 510: printf("\t%s = %s (%d);\n", name, prefetch_long, r); ! 511: count_read += 2; ! 512: } else if (using_ce) { ! 513: /* we must do this because execution order of (something | something2) is not defined */ ! 514: if (flags & GF_NOREFILL) { ! 515: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2); ! 516: count_read++; ! 517: printf ("\t%s |= regs.irc;\n", name); ! 518: } else { ! 519: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2); ! 520: count_read++; ! 521: printf ("\t%s |= %s (%d);\n", name, prefetch_word, r + 4); ! 522: count_read++; ! 523: } ! 524: } else { ! 525: if (using_prefetch) { ! 526: if (flags & GF_NOREFILL) { ! 527: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2); ! 528: count_read++; ! 529: printf ("\t%s |= regs.irc;\n", name); ! 530: insn_n_cycles += 4; ! 531: } else { ! 532: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2); ! 533: count_read += 2; ! 534: printf ("\t%s |= %s (%d);\n", name, prefetch_word, r + 4); ! 535: insn_n_cycles += 8; ! 536: } ! 537: } else { ! 538: insn_n_cycles += 8; ! 539: printf ("\t%s = %s (%d);\n", name, prefetch_long, r); ! 540: } ! 541: } 1.1.1.4 root 542: } 1.1.1.5 ! root 543: static void gen_nextilong (const char *type, const char *name, int flags) 1.1.1.4 root 544: { 1.1.1.5 ! root 545: gen_nextilong2 (type, name, flags, 0); 1.1.1.4 root 546: } 547: 548: static const char *gen_nextiword (int flags) 549: { 1.1.1.5 ! root 550: static char buffer[80]; ! 551: int r = m68k_pc_offset; ! 552: m68k_pc_offset += 2; ! 553: ! 554: if (using_ce020) { ! 555: if (flags & GF_NOREFILL) ! 556: sprintf(buffer, "%s (%d)", prefetch_word, r); ! 557: else ! 558: sprintf(buffer, "%s (%d)", prefetch_word, r); ! 559: count_read++; ! 560: } else if (using_ce) { ! 561: if (flags & GF_NOREFILL) { ! 562: strcpy (buffer, "regs.irc"); ! 563: } else { ! 564: sprintf (buffer, "%s (%d)", prefetch_word, r + 2); ! 565: count_read++; ! 566: } ! 567: } else { ! 568: if (using_prefetch) { ! 569: if (flags & GF_NOREFILL) { ! 570: strcpy (buffer, "regs.irc"); ! 571: } else { ! 572: sprintf (buffer, "%s (%d)", prefetch_word, r + 2); ! 573: count_read++; ! 574: insn_n_cycles += 4; ! 575: } ! 576: } else { ! 577: sprintf (buffer, "%s (%d)", prefetch_word, r); ! 578: insn_n_cycles += 4; ! 579: } ! 580: } ! 581: return buffer; 1.1.1.4 root 582: } 583: 584: static const char *gen_nextibyte (int flags) 585: { 1.1.1.5 ! root 586: static char buffer[80]; ! 587: int r = m68k_pc_offset; ! 588: m68k_pc_offset += 2; ! 589: ! 590: if (using_ce020 || using_prefetch_020) { ! 591: if (flags & GF_NOREFILL) ! 592: sprintf(buffer, "(uae_u8)%s (%d)", prefetch_word, r); ! 593: else ! 594: sprintf(buffer, "(uae_u8)%s (%d)", prefetch_word, r); ! 595: count_read++; ! 596: } else if (using_ce) { ! 597: if (flags & GF_NOREFILL) { ! 598: strcpy (buffer, "(uae_u8)regs.irc"); ! 599: } else { ! 600: sprintf (buffer, "(uae_u8)%s (%d)", prefetch_word, r + 2); ! 601: count_read++; ! 602: } ! 603: } else { ! 604: insn_n_cycles += 4; ! 605: if (using_prefetch) { ! 606: if (flags & GF_NOREFILL) { ! 607: strcpy (buffer, "(uae_u8)regs.irc"); ! 608: } else { ! 609: sprintf (buffer, "(uae_u8)%s (%d)", prefetch_word, r + 2); ! 610: insn_n_cycles += 4; ! 611: count_read++; ! 612: } ! 613: } else { ! 614: sprintf (buffer, "%s (%d)", srcbi, r); ! 615: insn_n_cycles += 4; ! 616: } ! 617: } ! 618: return buffer; 1.1.1.4 root 619: } 620: 621: static void makefromsr (void) 622: { 1.1.1.5 ! root 623: printf ("\tMakeFromSR();\n"); ! 624: if (using_ce || isce020()) ! 625: printf ("\tregs.ipl_pin = intlev ();\n"); 1.1.1.4 root 626: } 627: 628: static void check_ipl (void) 629: { 1.1.1.5 ! root 630: if (ipl_fetched) ! 631: return; ! 632: if (using_ce || isce020()) ! 633: printf ("\tipl_fetch ();\n"); ! 634: ipl_fetched = 1; ! 635: } ! 636: ! 637: static void single_check_ipl(void) ! 638: { ! 639: check_ipl(); ! 640: ipl_fetched = 2; ! 641: ! 642: } ! 643: /* this is not true, it seems to be microcode controller */ ! 644: ! 645: /* Apparently interrupt state is sampled ! 646: * during any memory access. Because we don't ! 647: * know if there are future memory accesses, ! 648: * we'll check each memory access after prefetch ! 649: * and recheck interrupt state again. ! 650: */ ! 651: static void check_ipl_again (void) 1.1.1.4 root 652: { 1.1.1.5 ! root 653: if (ipl_fetched != 1) ! 654: return; ! 655: if (using_ce) ! 656: printf ("\tipl_fetch ();\n"); ! 657: } ! 658: ! 659: static void irc2ir_2 (bool dozero) ! 660: { ! 661: if (!using_prefetch) ! 662: return; ! 663: if (ir2irc) ! 664: return; ! 665: ir2irc = 1; ! 666: printf ("\tregs.ir = regs.irc;\n"); ! 667: if (dozero) ! 668: printf ("\tregs.irc = 0;\n"); ! 669: check_ipl (); 1.1.1.4 root 670: } 671: static void irc2ir (void) 672: { 1.1.1.5 ! root 673: irc2ir_2 (false); 1.1.1.4 root 674: } 675: 676: static void fill_prefetch_2 (void) 677: { 1.1.1.5 ! root 678: if (!using_prefetch) ! 679: return; ! 680: printf ("\t%s (%d);\n", prefetch_word, m68k_pc_offset + 2); ! 681: did_prefetch = 1; ! 682: ir2irc = 0; ! 683: count_read++; ! 684: insn_n_cycles += 4; 1.1.1.4 root 685: } 686: 687: static void fill_prefetch_1 (int o) 688: { 1.1.1.5 ! root 689: if (using_prefetch) { ! 690: printf ("\t%s (%d);\n", prefetch_word, o); ! 691: did_prefetch = 1; ! 692: ir2irc = 0; ! 693: count_read++; ! 694: insn_n_cycles += 4; ! 695: } 1.1.1.4 root 696: } 697: 698: static void fill_prefetch_full (void) 699: { 1.1.1.5 ! root 700: if (using_prefetch) { ! 701: fill_prefetch_1 (0); ! 702: irc2ir (); ! 703: fill_prefetch_1 (2); ! 704: } else if (isprefetch020()) { ! 705: did_prefetch = 2; ! 706: total_ce020 -= 4; ! 707: returntail (false); ! 708: if (cpu_level >= 3) ! 709: printf ("\tfill_prefetch_030 ();\n"); ! 710: else if (cpu_level == 2) ! 711: printf ("\tfill_prefetch_020 ();\n"); ! 712: } 1.1.1.4 root 713: } 714: 715: // 68000 and 68010 only 716: static void fill_prefetch_full_000 (void) 717: { 1.1.1.5 ! root 718: if (!using_prefetch) ! 719: return; ! 720: fill_prefetch_full (); 1.1.1.4 root 721: } 722: 723: // 68020+ 724: static void fill_prefetch_full_020 (void) 725: { 1.1.1.5 ! root 726: if (!using_prefetch_020) ! 727: return; ! 728: fill_prefetch_full (); 1.1.1.4 root 729: } 730: 731: static void fill_prefetch_0 (void) 732: { 1.1.1.5 ! root 733: if (!using_prefetch) ! 734: return; ! 735: printf ("\t%s (0);\n", prefetch_word); ! 736: did_prefetch = 1; ! 737: ir2irc = 0; ! 738: count_read++; ! 739: insn_n_cycles += 4; 1.1.1.4 root 740: } 741: 742: static void fill_prefetch_next_1 (void) 743: { 1.1.1.5 ! root 744: irc2ir (); ! 745: fill_prefetch_1 (m68k_pc_offset + 2); 1.1.1.4 root 746: } 747: 748: static void fill_prefetch_next (void) 749: { 1.1.1.5 ! root 750: if (using_prefetch) { ! 751: fill_prefetch_next_1 (); ! 752: } ! 753: // if (using_prefetch_020) { ! 754: // printf ("\t%s (%d);\n", prefetch_word, m68k_pc_offset); ! 755: // did_prefetch = 1; ! 756: // } 1.1.1.4 root 757: } 758: 759: static void fill_prefetch_finish (void) 760: { 1.1.1.5 ! root 761: if (did_prefetch) ! 762: return; ! 763: if (using_prefetch) { ! 764: fill_prefetch_1 (m68k_pc_offset); ! 765: } ! 766: if (using_prefetch_020) { ! 767: did_prefetch = 1; ! 768: } 1.1.1.4 root 769: } 770: 771: static void setpc (const char *format, ...) 772: { 1.1.1.5 ! root 773: va_list parms; ! 774: char buffer[1000]; ! 775: ! 776: va_start (parms, format); ! 777: _vsnprintf (buffer, 1000 - 1, format, parms); ! 778: va_end (parms); ! 779: ! 780: if (using_mmu || using_prefetch || using_prefetch_020) ! 781: printf ("\tm68k_setpci (%s);\n", buffer); ! 782: else ! 783: printf ("\tm68k_setpc (%s);\n", buffer); 1.1.1.4 root 784: } 785: 786: static void incpc (const char *format, ...) 787: { 1.1.1.5 ! root 788: va_list parms; ! 789: char buffer[1000]; ! 790: ! 791: va_start (parms, format); ! 792: _vsnprintf (buffer, 1000 - 1, format, parms); ! 793: va_end (parms); ! 794: ! 795: if (using_mmu || using_prefetch || using_prefetch_020) ! 796: printf ("\tm68k_incpci (%s);\n", buffer); ! 797: else ! 798: printf ("\tm68k_incpc (%s);\n", buffer); 1.1.1.4 root 799: } 800: 801: static void sync_m68k_pc (void) 802: { 1.1.1.5 ! root 803: m68k_pc_offset_old = m68k_pc_offset; ! 804: if (m68k_pc_offset == 0) ! 805: return; ! 806: incpc ("%d", m68k_pc_offset); ! 807: m68k_pc_total += m68k_pc_offset; ! 808: m68k_pc_offset = 0; ! 809: } ! 810: ! 811: static void clear_m68k_offset(void) ! 812: { ! 813: m68k_pc_total += m68k_pc_offset; ! 814: m68k_pc_offset = 0; 1.1.1.4 root 815: } 816: 817: static void sync_m68k_pc_noreset (void) 818: { 1.1.1.5 ! root 819: sync_m68k_pc (); ! 820: m68k_pc_offset = m68k_pc_offset_old; 1.1.1.4 root 821: } 822: 1.1.1.5 ! root 823: static void addmmufixup (const char *reg) 1.1.1.4 root 824: { 1.1.1.5 ! root 825: if (!using_mmu) ! 826: return; ! 827: if (using_mmu == 68040 && (mmufixupstate || mmufixupcnt > 0)) ! 828: return; ! 829: printf ("\tmmufixup[%d].reg = %s;\n", mmufixupcnt, reg); ! 830: printf ("\tmmufixup[%d].value = m68k_areg (regs, %s);\n", mmufixupcnt, reg); ! 831: mmufixupstate |= 1 << mmufixupcnt; ! 832: mmufixupcnt++; 1.1.1.4 root 833: } 834: 835: static void clearmmufixup (int cnt) 836: { 1.1.1.5 ! root 837: if (mmufixupstate & (1 << cnt)) { ! 838: printf ("\tmmufixup[%d].reg = -1;\n", cnt); ! 839: mmufixupstate &= ~(1 << cnt); ! 840: } 1.1.1.4 root 841: } 842: 843: static void gen_set_fault_pc (void) 844: { 1.1.1.5 ! root 845: if (using_mmu != 68040) ! 846: return; ! 847: sync_m68k_pc (); ! 848: printf ("\tregs.instruction_pc = %s;\n", getpc); ! 849: printf ("\tmmu_restart = false;\n"); ! 850: m68k_pc_offset = 0; ! 851: clearmmufixup (0); 1.1.1.4 root 852: } 853: 854: static void syncmovepc (int getv, int flags) 855: { 856: #if 0 1.1.1.5 ! root 857: if (!(flags & GF_MOVE)) ! 858: return; ! 859: if (getv == 1) { ! 860: sync_m68k_pc (); ! 861: //fill_prefetch_next (); ! 862: } 1.1.1.4 root 863: #endif 864: } 865: 866: static void head_cycs (int h) 867: { 1.1.1.5 ! root 868: if (head_ce020_cycs_done) ! 869: return; ! 870: if (h < 0) ! 871: return; ! 872: //printf ("\tdo_sync_tail (%d);\n", h); ! 873: //printf ("\tdo_head_cycles_ce020 (%d);\n", h); ! 874: head_ce020_cycs_done = true; ! 875: tail_ce020 = -1; 1.1.1.4 root 876: } 877: 878: static void add_head_cycs (int h) 879: { 1.1.1.5 ! root 880: if (!isce020()) ! 881: return; ! 882: head_ce020_cycs_done = false; ! 883: head_cycs (h); 1.1.1.4 root 884: } 885: 886: static void addopcycles_ce20 (int h, int t, int c, int subhead) 887: { 1.1.1.5 ! root 888: head_cycs (h); ! 889: ! 890: //c = 0; 1.1.1.4 root 891: #if 0 1.1.1.5 ! root 892: if (tail_ce020 == 1) ! 893: printf ("\tregs.ce020memcycles -= 1 * cpucycleunit; /* T=1 */ \n"); ! 894: else if (tail_ce020 == 2) ! 895: printf ("\tregs.ce020memcycles -= 2 * cpucycleunit; /* T=2 */\n"); 1.1.1.4 root 896: #endif 1.1.1.5 ! root 897: if (1 && !subhead && (h > 0 || t > 0 || c > 0) && got_ea_ce020) { ! 898: if (!did_prefetch) { ! 899: get_prefetch_020 (); ! 900: did_prefetch = 1; ! 901: } ! 902: if (1) { ! 903: if (h > 0) { ! 904: printf ("\tif (regs.ce020memcycles > %d * cpucycleunit)\n", h); ! 905: printf ("\t\tregs.ce020memcycles = %d * cpucycleunit;\n", h); ! 906: } else { ! 907: printf ("\tregs.ce020memcycles = 0;\n"); ! 908: } ! 909: } ! 910: } ! 911: 1.1.1.4 root 912: #if 0 1.1.1.5 ! root 913: if (tail_ce020 >= 0 && h >= 0 && head_in_ea_ce020 == 0) { ! 914: int largest = tail_ce020 > h ? tail_ce020: h; ! 915: if (tail_ce020 != h) { ! 916: //printf ("\tdo_cycles_ce020 (%d - %d);\n", tail_ce020 > h ? tail_ce020 : h, tail_ce020 > h ? h : tail_ce020); ! 917: //printf ("\tdo_cycles_ce020 (%d - %d);\n", tail_ce020 > h ? tail_ce020 : h, tail_ce020 > h ? h : tail_ce020); ! 918: if (h) { ! 919: printf ("\tregs.ce020memcycles -= %d * cpucycleunit;\n", h); ! 920: printf ("\tif (regs.ce020memcycles < 0) {\n"); ! 921: //printf ("\t\tx_do_cycles (-regs.ce020memcycles);\n"); ! 922: printf ("\t\tregs.ce020memcycles = 0;\n"); ! 923: printf ("\t}\n"); ! 924: } else { ! 925: printf ("\tregs.ce020memcycles = 0;\n"); ! 926: } ! 927: //printf ("\tregs.ce020memcycles = 0;\n"); ! 928: 1.1.1.4 root 929: #if 0 1.1.1.5 ! root 930: if (tail_ce020) ! 931: printf ("\tregs.ce020_tail = get_cycles () - regs.ce020_tail;\n"); ! 932: else ! 933: printf ("\tregs.ce020_tail = 0;\n"); ! 934: printf ("\tif (regs.ce020_tail < %d * cpucycleunit)\n", largest); ! 935: printf ("\t\tx_do_cycles (%d * cpucycleunit - regs.ce020_tail);\n", largest); 1.1.1.4 root 936: #endif 1.1.1.5 ! root 937: } else if (h) { ! 938: printf ("\t/* ea tail == op head (%d) */\n", h); ! 939: ! 940: printf ("\tregs.ce020memcycles -= %d * cpucycleunit;\n", h); ! 941: printf ("\tif (regs.ce020memcycles < 0) {\n"); ! 942: //printf ("\t\tx_do_cycles (-regs.ce020memcycles);\n"); ! 943: printf ("\t\tregs.ce020memcycles = 0;\n"); ! 944: printf ("\t}\n"); ! 945: } ! 946: } 1.1.1.4 root 947: #endif 1.1.1.5 ! root 948: ! 949: if (h < 0) ! 950: h = 0; ! 951: ! 952: //c = 0; ! 953: ! 954: // c = internal cycles needed after head cycles and before tail cycles. Not total cycles. ! 955: addcycles_ce020_5 ("op", h, t, c - h - t, -subhead); ! 956: //printf ("\tregs.irc = get_word_ce020_prefetch (%d);\n", m68k_pc_offset); 1.1.1.4 root 957: #if 0 1.1.1.5 ! root 958: if (c - h - t > 0) { ! 959: printf ("\t%s (%d);\n", do_cycles, c - h - t); ! 960: count_cycles_ce020 += c; ! 961: count_cycles += c; ! 962: } 1.1.1.4 root 963: #endif 1.1.1.5 ! root 964: //printf ("\tregs.ce020_tail = 0;\n"); ! 965: total_ce020 = c; ! 966: tail_ce020 = t; ! 967: // if (total_ce020 >= 2) ! 968: // printf ("\tint op_cycles = get_cycles ();\n"); 1.1.1.4 root 969: } 970: 971: static void addop_ce020 (struct instr *curi, int subhead) 972: { 1.1.1.5 ! root 973: if (!isce020()) ! 974: return; ! 975: int h = curi->head; ! 976: int t = curi->tail; ! 977: int c = curi->clocks; 1.1.1.4 root 978: #if 0 1.1.1.5 ! root 979: if ((((curi->sduse & 2) && !isreg (curi->smode)) || (((curi->sduse >> 4) & 2) && !isreg (curi->dmode))) && using_waitstates) { ! 980: t += using_waitstates; ! 981: c += using_waitstates; ! 982: } 1.1.1.4 root 983: #endif 1.1.1.5 ! root 984: addopcycles_ce20 (h, t, c, -subhead); 1.1.1.4 root 985: } 986: 1.1.1.5 ! root 987: static void addcycles_ea_ce020_5 (const char *ea, int h, int t, int c, int oph) 1.1.1.4 root 988: { 1.1.1.5 ! root 989: head_cycs (h + oph); ! 990: ! 991: // if (!h && !h && !c && !oph) ! 992: // return; ! 993: ! 994: c = c - h - t; ! 995: ! 996: //c = 0; ! 997: ! 998: if (!oph) { ! 999: printf ("\t/* ea H:%d,T:%d,C:%d %s */\n", h, t, c, ea); ! 1000: } else { ! 1001: if (oph && t) ! 1002: term_err ("Both op head and tail can't be non-zero"); ! 1003: if (oph > 0) { ! 1004: printf ("\t/* ea H:%d+%d=%d,T:%d,C:%d %s */\n", h, oph, h + oph, t, c, ea); ! 1005: h += oph; ! 1006: } else { ! 1007: printf ("\t/* ea H:%d-%d=%d,T:%d,C:%d %s */\n", h, -oph, h + oph, t, c, ea); ! 1008: h += oph; ! 1009: } ! 1010: } ! 1011: ! 1012: if (h) { ! 1013: printf ("\tif (regs.ce020memcycles > %d * cpucycleunit)\n", h); ! 1014: printf ("\t\tregs.ce020memcycles = %d * cpucycleunit;\n", h); ! 1015: } else { ! 1016: printf ("\tregs.ce020memcycles = 0;\n"); ! 1017: } ! 1018: ! 1019: if (1 && c > 0) { ! 1020: printf ("\t%s (%d);\n", do_cycles, c); ! 1021: count_cycles += c; ! 1022: } ! 1023: tail_ce020 = t; ! 1024: head_in_ea_ce020 = oph; ! 1025: got_ea_ce020 = true; ! 1026: // if (t > 0) ! 1027: // printf ("\tregs.ce020_tail = get_cycles () + %d * cpucycleunit;\n", t); 1.1.1.4 root 1028: } 1.1.1.5 ! root 1029: static void addcycles_ea_ce020_4 (const char *ea, int h, int t, int c) 1.1.1.4 root 1030: { 1.1.1.5 ! root 1031: addcycles_ea_ce020_5 (ea, h, t, c, 0); 1.1.1.4 root 1032: } 1033: 1034: #define SETCE020(h2,t2,c2) { h = h2; t = t2; c = c2; } 1035: #define SETCE020H(h2,t2,c2) { h = h2; oph = curi ? curi->head : 0; t = t2; c = c2; } 1036: 1037: static int gence020cycles_fiea (struct instr *curi, wordsizes ssize, amodes dmode) 1038: { 1.1.1.5 ! root 1039: bool l = ssize == sz_long; ! 1040: int h = 0, t = 0, c = 0, oph = 0; ! 1041: switch ((int)dmode) ! 1042: { ! 1043: case Dreg: ! 1044: case Areg: ! 1045: if (!l) ! 1046: SETCE020H(2, 0, 2) ! 1047: else ! 1048: SETCE020H(4, 0, 4) ! 1049: break; ! 1050: case Aind: // (An) ! 1051: if (!l) ! 1052: SETCE020(1, 1, 3) ! 1053: else ! 1054: SETCE020(1, 0, 4) ! 1055: break; ! 1056: case Aipi: // (An)+ ! 1057: if (!l) ! 1058: SETCE020(2, 1, 5) ! 1059: else ! 1060: SETCE020(4, 1, 7) ! 1061: break; ! 1062: case Apdi: // -(An) ! 1063: if (!l) ! 1064: SETCE020(2, 2, 4) ! 1065: else ! 1066: SETCE020(2, 0, 4) ! 1067: break; ! 1068: case Ad8r: // (d8,An,Xn) ! 1069: case PC8r: // (d8,PC,Xn) ! 1070: if (!l) ! 1071: SETCE020(6, 2, 8) ! 1072: else ! 1073: SETCE020(8, 2, 10) ! 1074: break; ! 1075: case Ad16: // (d16,An) ! 1076: case PC16: // (d16,PC) ! 1077: if (!l) ! 1078: SETCE020(2, 0, 4) ! 1079: else ! 1080: SETCE020(4, 0, 6) ! 1081: break; ! 1082: case absw: ! 1083: if (!l) ! 1084: SETCE020(4, 2, 6) ! 1085: else ! 1086: SETCE020(6, 2, 8) ! 1087: break; ! 1088: case absl: ! 1089: if (!l) ! 1090: SETCE020(3, 0, 6) ! 1091: else ! 1092: SETCE020(5, 0, 8) ! 1093: break; ! 1094: } ! 1095: addcycles_ea_ce020_5 ("fiea", h, t, c, oph); ! 1096: return oph; 1.1.1.4 root 1097: } 1098: 1099: 1100: static int gence020cycles_ciea (struct instr *curi, wordsizes ssize, amodes dmode) 1101: { 1.1.1.5 ! root 1102: int h = 0, t = 0, c = 0, oph = 0; ! 1103: bool l = ssize == sz_long; ! 1104: switch ((int)dmode) ! 1105: { ! 1106: case Dreg: ! 1107: case Areg: ! 1108: if (!l) ! 1109: SETCE020H(2, 0, 2) ! 1110: else ! 1111: SETCE020H(4, 0, 4) ! 1112: break; ! 1113: case Aind: // (An) ! 1114: if (!l) ! 1115: SETCE020H(2, 0, 2) ! 1116: else ! 1117: SETCE020H(4, 0, 4) ! 1118: break; ! 1119: case Aipi: // (An)+ ! 1120: if (!l) ! 1121: SETCE020(2, 0, 4) ! 1122: else ! 1123: SETCE020(4, 0, 6) ! 1124: break; ! 1125: case Apdi: // -(An) ! 1126: if (!l) ! 1127: SETCE020H(2, 0, 2) ! 1128: else ! 1129: SETCE020H(4, 0, 4) ! 1130: break; ! 1131: case Ad8r: // (d8,An,Xn) ! 1132: case PC8r: // (d8,PC,Xn) ! 1133: if (!l) ! 1134: SETCE020H(6, 0, 6) ! 1135: else ! 1136: SETCE020H(8, 0, 8) ! 1137: break; ! 1138: case Ad16: // (d16,An) ! 1139: case PC16: // (d16,PC) ! 1140: if (!l) ! 1141: SETCE020H(4, 0, 4) ! 1142: else ! 1143: SETCE020H(6, 0, 6) ! 1144: break; ! 1145: case absw: ! 1146: if (!l) ! 1147: SETCE020H(4, 0, 4) ! 1148: else ! 1149: SETCE020H(6, 0, 6) ! 1150: break; ! 1151: case absl: ! 1152: if (!l) ! 1153: SETCE020H(6, 0, 6) ! 1154: else ! 1155: SETCE020H(8, 0, 8) ! 1156: break; ! 1157: } ! 1158: addcycles_ea_ce020_5 ("ciea", h, t, c, oph); ! 1159: return oph; 1.1.1.4 root 1160: } 1161: 1162: 1163: static int gence020cycles_fea (amodes mode) 1164: { 1.1.1.5 ! root 1165: int h = 0, t = 0, c = 0, ws = 0; ! 1166: switch ((int)mode) ! 1167: { ! 1168: case Dreg: ! 1169: case Areg: ! 1170: SETCE020(0, 0, 0) ! 1171: break; ! 1172: case Aind: // (An) ! 1173: ws++; ! 1174: SETCE020(1, 1, 3) ! 1175: break; ! 1176: case Aipi: // (An)+ ! 1177: ws++; ! 1178: SETCE020(0, 1, 3) ! 1179: break; ! 1180: case Apdi: // -(An) ! 1181: ws++; ! 1182: SETCE020(2, 2, 4) ! 1183: break; ! 1184: case Ad8r: // (d8,An,Xn) ! 1185: case PC8r: // (d8,PC,Xn) ! 1186: ws++; ! 1187: SETCE020(4, 2, 6) ! 1188: break; ! 1189: case Ad16: // (d16,An) ! 1190: case PC16: // (d16,PC) ! 1191: ws++; ! 1192: SETCE020(2, 2, 4) ! 1193: break; ! 1194: case absw: ! 1195: ws++; ! 1196: SETCE020(2, 2, 4) ! 1197: break; ! 1198: case absl: ! 1199: ws++; ! 1200: SETCE020(1, 0, 4) ! 1201: break; ! 1202: } 1.1.1.4 root 1203: #if 0 1.1.1.5 ! root 1204: if (using_waitstates) { ! 1205: t += ws * using_waitstates; ! 1206: c += ws * using_waitstates; ! 1207: } 1.1.1.4 root 1208: #endif 1.1.1.5 ! root 1209: addcycles_ea_ce020_4 ("fea", h, t, c); ! 1210: return 0; 1.1.1.4 root 1211: } 1212: 1213: static int gence020cycles_cea (struct instr *curi, amodes mode) 1214: { 1.1.1.5 ! root 1215: int h = 0, t = 0, c = 0, oph = 0; ! 1216: switch ((int)mode) ! 1217: { ! 1218: case Dreg: ! 1219: case Areg: ! 1220: SETCE020(0, 0, 0); ! 1221: break; ! 1222: case Aind: // (An) ! 1223: SETCE020H(2 + h, 0, 2); ! 1224: break; ! 1225: case Aipi: // (An)+ ! 1226: SETCE020(0, 0, 2); ! 1227: break; ! 1228: case Apdi: // -(An) ! 1229: SETCE020H(2, 0, 2) ! 1230: break; ! 1231: case Ad8r: // (d8,An,Xn) ! 1232: case PC8r: // (d8,PC,Xn) ! 1233: SETCE020H(4, 0, 4) ! 1234: break; ! 1235: case Ad16: // (d16,An) ! 1236: case PC16: // (d16,PC) ! 1237: SETCE020H(2, 0, 2) ! 1238: break; ! 1239: case absw: ! 1240: SETCE020H(2, 0, 2) ! 1241: break; ! 1242: case absl: ! 1243: SETCE020H(4, 0, 4) ! 1244: break; ! 1245: } ! 1246: addcycles_ea_ce020_5 ("cea", h, t, c, oph); ! 1247: return oph; 1.1.1.4 root 1248: } 1249: 1250: static int gence020cycles_jea (struct instr *curi, amodes mode) 1251: { 1.1.1.5 ! root 1252: int h = 0, t = 0, c = 0, oph = 0; ! 1253: switch ((int)mode) ! 1254: { ! 1255: case Aind: // (An) ! 1256: SETCE020H(2, 0, 2) ! 1257: break; ! 1258: case Ad16: // (d16,An) ! 1259: case PC16: // (d16,PC) ! 1260: SETCE020H(4, 0, 4) ! 1261: break; ! 1262: case absw: ! 1263: SETCE020H(2, 0, 2) ! 1264: break; ! 1265: case absl: ! 1266: SETCE020H(2, 0, 2) ! 1267: break; ! 1268: } ! 1269: addcycles_ea_ce020_5 ("jea", h, t, c, oph); ! 1270: return oph; 1.1.1.4 root 1271: } 1272: 1273: static void next_level_000 (void) 1274: { 1.1.1.5 ! root 1275: if (next_cpu_level < 0) ! 1276: next_cpu_level = 0; 1.1.1.4 root 1277: } 1278: 1279: static void maybeaddop_ce020 (int flags) 1280: { 1.1.1.5 ! root 1281: if (flags & GF_OPCE020) ! 1282: addop_ce020 (curi_ce020, subhead_ce020); 1.1.1.4 root 1283: } 1284: 1285: 1286: /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0, 1.1.1.5 ! root 1287: * the calling routine handles Apdi and Aipi modes. ! 1288: * gb-- movem == 2 means the same thing but for a MOVE16 instruction */ 1.1.1.4 root 1289: 1290: /* fixup indicates if we want to fix up adress registers in pre decrement 1.1.1.5 ! root 1291: * or post increment mode now (0) or later (1). A value of 2 will then be ! 1292: * used to do the actual fix up. This allows to do all memory readings ! 1293: * before any register is modified, and so to rerun operation without ! 1294: * side effect in case a bus fault is generated by any memory access. ! 1295: * XJ - 2006/11/13 */ ! 1296: ! 1297: static void genamode2x (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags, int fetchmode) ! 1298: { ! 1299: char namea[100]; ! 1300: bool rmw = false; ! 1301: int pc_68000_offset = m68k_pc_offset; ! 1302: int pc_68000_offset_fetch = 0; ! 1303: int pc_68000_offset_store = 0; ! 1304: ! 1305: sprintf (namea, "%sa", name); ! 1306: if ((flags & GF_RMW) && using_mmu == 68060) { ! 1307: strcpy (rmw_varname, name); ! 1308: candormw = true; ! 1309: rmw = true; ! 1310: } ! 1311: ! 1312: if (mode == Ad8r || mode == PC8r) { ! 1313: genamode8r_offset[genamode_cnt] = m68k_pc_total + m68k_pc_offset; ! 1314: genamode_cnt++; ! 1315: } ! 1316: ! 1317: start_brace (); ! 1318: ! 1319: switch (mode) { ! 1320: case Dreg: ! 1321: if (movem) ! 1322: term (); ! 1323: if (getv == 1) ! 1324: switch (size) { ! 1325: case sz_byte: 1.1.1.4 root 1326: #ifdef USE_DUBIOUS_BIGENDIAN_OPTIMIZATION 1.1.1.5 ! root 1327: /* This causes the target compiler to generate better code on few systems */ ! 1328: printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg (regs, %s))[3];\n", name, reg); 1.1.1.4 root 1329: #else 1.1.1.5 ! root 1330: printf ("\tuae_s8 %s = m68k_dreg (regs, %s);\n", name, reg); 1.1.1.4 root 1331: #endif 1.1.1.5 ! root 1332: break; ! 1333: case sz_word: 1.1.1.4 root 1334: #ifdef USE_DUBIOUS_BIGENDIAN_OPTIMIZATION 1.1.1.5 ! root 1335: printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg (regs, %s))[1];\n", name, reg); 1.1.1.4 root 1336: #else 1.1.1.5 ! root 1337: printf ("\tuae_s16 %s = m68k_dreg (regs, %s);\n", name, reg); ! 1338: #endif ! 1339: break; ! 1340: case sz_long: ! 1341: printf ("\tuae_s32 %s = m68k_dreg (regs, %s);\n", name, reg); ! 1342: break; ! 1343: default: ! 1344: term (); ! 1345: } ! 1346: maybeaddop_ce020 (flags); ! 1347: syncmovepc (getv, flags); ! 1348: return; ! 1349: case Areg: ! 1350: if (movem) ! 1351: term (); ! 1352: if (getv == 1) ! 1353: switch (size) { ! 1354: case sz_word: ! 1355: printf ("\tuae_s16 %s = m68k_areg (regs, %s);\n", name, reg); ! 1356: break; ! 1357: case sz_long: ! 1358: printf ("\tuae_s32 %s = m68k_areg (regs, %s);\n", name, reg); ! 1359: break; ! 1360: default: ! 1361: term (); ! 1362: } ! 1363: maybeaddop_ce020 (flags); ! 1364: syncmovepc (getv, flags); ! 1365: return; ! 1366: case Aind: // (An) ! 1367: switch (fetchmode) ! 1368: { ! 1369: case fetchmode_fea: ! 1370: addcycles_ce020 (1); ! 1371: break; ! 1372: case fetchmode_cea: ! 1373: addcycles_ce020 (2); ! 1374: break; ! 1375: case fetchmode_jea: ! 1376: addcycles_ce020 (2); ! 1377: break; ! 1378: } ! 1379: printf ("\tuaecptr %sa;\n", name); ! 1380: add_mmu040_movem (movem); ! 1381: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg); ! 1382: break; ! 1383: case Aipi: // (An)+ ! 1384: switch (fetchmode) ! 1385: { ! 1386: case fetchmode_fea: ! 1387: addcycles_ce020 (1); ! 1388: break; ! 1389: case fetchmode_cea: ! 1390: break; ! 1391: } ! 1392: printf ("\tuaecptr %sa;\n", name); ! 1393: add_mmu040_movem (movem); ! 1394: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg); ! 1395: break; ! 1396: case Apdi: // -(An) ! 1397: switch (fetchmode) ! 1398: { ! 1399: case fetchmode_fea: ! 1400: case fetchmode_cea: ! 1401: addcycles_ce020 (2); ! 1402: break; ! 1403: } ! 1404: printf ("\tuaecptr %sa;\n", name); ! 1405: add_mmu040_movem (movem); ! 1406: switch (size) { ! 1407: case sz_byte: ! 1408: if (movem) ! 1409: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg); ! 1410: else ! 1411: printf ("\t%sa = m68k_areg (regs, %s) - areg_byteinc[%s];\n", name, reg, reg); ! 1412: break; ! 1413: case sz_word: ! 1414: printf ("\t%sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 2); ! 1415: break; ! 1416: case sz_long: ! 1417: printf ("\t%sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 4); ! 1418: break; ! 1419: default: ! 1420: term (); ! 1421: } ! 1422: if (!(flags & GF_APDI)) { ! 1423: addcycles000 (2); ! 1424: insn_n_cycles += 2; ! 1425: count_cycles_ea += 2; ! 1426: pc_68000_offset_fetch += 2; ! 1427: } ! 1428: break; ! 1429: case Ad16: // (d16,An) ! 1430: printf ("\tuaecptr %sa;\n", name); ! 1431: add_mmu040_movem (movem); ! 1432: printf ("\t%sa = m68k_areg (regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword (flags)); ! 1433: count_read_ea++; ! 1434: break; ! 1435: case PC16: // (d16,PC) ! 1436: printf ("\tuaecptr %sa;\n", name); ! 1437: add_mmu040_movem (movem); ! 1438: printf ("\t%sa = %s + %d;\n", name, getpc, m68k_pc_offset); ! 1439: printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags)); ! 1440: break; ! 1441: case Ad8r: // (d8,An,Xn) ! 1442: switch (fetchmode) ! 1443: { ! 1444: case fetchmode_fea: ! 1445: addcycles_ce020 (4); ! 1446: break; ! 1447: case fetchmode_cea: ! 1448: case fetchmode_jea: ! 1449: break; ! 1450: } ! 1451: printf ("\tuaecptr %sa;\n", name); ! 1452: if (cpu_level > 1) { ! 1453: if (next_cpu_level < 1) ! 1454: next_cpu_level = 1; ! 1455: sync_m68k_pc (); ! 1456: add_mmu040_movem (movem); ! 1457: start_brace (); ! 1458: /* This would ordinarily be done in gen_nextiword, which we bypass. */ ! 1459: insn_n_cycles += 4; ! 1460: printf ("\t%sa = %s (m68k_areg (regs, %s), %d);\n", name, disp020, reg, disp020cnt++); ! 1461: } else { ! 1462: if (!(flags & GF_AD8R)) { ! 1463: addcycles000 (2); ! 1464: insn_n_cycles += 2; ! 1465: count_cycles_ea += 2; ! 1466: #ifdef WINUAE_FOR_HATARI ! 1467: /* Hatari : on 68000 ST, Ad8r causes an unaligned memory prefetch and take 2 cycles more */ ! 1468: /* JSR, JMP, LEA and PEA are handled separately */ ! 1469: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */ ! 1470: if ( using_prefetch && !using_ce ) ! 1471: printf ("\tBusCyclePenalty += 2;\n"); ! 1472: #endif ! 1473: } ! 1474: if ((flags & GF_NOREFILL) && using_prefetch) { ! 1475: printf ("\t%sa = %s (m68k_areg (regs, %s), regs.irc);\n", name, disp000, reg); ! 1476: } else { ! 1477: printf ("\t%sa = %s (m68k_areg (regs, %s), %s);\n", name, disp000, reg, gen_nextiword (flags)); ! 1478: } ! 1479: count_read_ea++; ! 1480: } ! 1481: break; ! 1482: case PC8r: // (d8,PC,Xn) ! 1483: switch (fetchmode) ! 1484: { ! 1485: case fetchmode_fea: ! 1486: addcycles_ce020 (4); ! 1487: break; ! 1488: case fetchmode_cea: ! 1489: case fetchmode_jea: ! 1490: break; ! 1491: } ! 1492: printf ("\tuaecptr tmppc;\n"); ! 1493: printf ("\tuaecptr %sa;\n", name); ! 1494: if (cpu_level > 1) { ! 1495: if (next_cpu_level < 1) ! 1496: next_cpu_level = 1; ! 1497: sync_m68k_pc (); ! 1498: add_mmu040_movem (movem); ! 1499: start_brace (); ! 1500: /* This would ordinarily be done in gen_nextiword, which we bypass. */ ! 1501: insn_n_cycles += 4; ! 1502: printf ("\ttmppc = %s;\n", getpc); ! 1503: printf ("\t%sa = %s (tmppc, %d);\n", name, disp020, disp020cnt++); ! 1504: } else { ! 1505: printf ("\ttmppc = %s + %d;\n", getpc, m68k_pc_offset); ! 1506: if (!(flags & GF_PC8R)) { ! 1507: addcycles000 (2); ! 1508: insn_n_cycles += 2; ! 1509: count_cycles_ea += 2; ! 1510: #ifdef WINUAE_FOR_HATARI ! 1511: /* Hatari : on 68000 ST, Ad8r causes an unaligned memory prefetch and take 2 cycles more */ ! 1512: /* JSR, JMP, LEA and PEA are handled separately */ ! 1513: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */ ! 1514: if ( using_prefetch && !using_ce ) ! 1515: printf ("\tBusCyclePenalty += 2;\n"); 1.1.1.4 root 1516: #endif 1.1.1.5 ! root 1517: } ! 1518: if ((flags & GF_NOREFILL) && using_prefetch) { ! 1519: printf ("\t%sa = %s (tmppc, regs.irc);\n", name, disp000); ! 1520: } else { ! 1521: printf ("\t%sa = %s (tmppc, %s);\n", name, disp000, gen_nextiword (flags)); ! 1522: } ! 1523: } ! 1524: ! 1525: break; ! 1526: case absw: ! 1527: printf ("\tuaecptr %sa;\n", name); ! 1528: add_mmu040_movem (movem); ! 1529: printf ("\t%sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags)); ! 1530: pc_68000_offset_fetch += 2; ! 1531: break; ! 1532: case absl: ! 1533: gen_nextilong2 ("uaecptr", namea, flags, movem); ! 1534: count_read_ea += 2; ! 1535: pc_68000_offset_fetch += 4; ! 1536: pc_68000_offset_store += 2; ! 1537: break; ! 1538: case imm: ! 1539: // fetch immediate address ! 1540: if (getv != 1) ! 1541: term (); ! 1542: insn_n_cycles020++; ! 1543: switch (size) { ! 1544: case sz_byte: ! 1545: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags)); ! 1546: count_read_ea++; ! 1547: break; ! 1548: case sz_word: ! 1549: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags)); ! 1550: count_read_ea++; ! 1551: break; ! 1552: case sz_long: ! 1553: gen_nextilong ("uae_s32", name, flags); ! 1554: count_read_ea += 2; ! 1555: break; ! 1556: default: ! 1557: term (); ! 1558: } ! 1559: maybeaddop_ce020 (flags); ! 1560: syncmovepc (getv, flags); ! 1561: return; ! 1562: case imm0: ! 1563: if (getv != 1) ! 1564: term (); ! 1565: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags)); ! 1566: count_read_ea++; ! 1567: maybeaddop_ce020 (flags); ! 1568: syncmovepc (getv, flags); ! 1569: return; ! 1570: case imm1: ! 1571: if (getv != 1) ! 1572: term (); ! 1573: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags)); ! 1574: count_read_ea++; ! 1575: maybeaddop_ce020 (flags); ! 1576: syncmovepc (getv, flags); ! 1577: return; ! 1578: case imm2: ! 1579: if (getv != 1) ! 1580: term (); ! 1581: gen_nextilong ("uae_s32", name, flags); ! 1582: count_read_ea += 2; ! 1583: maybeaddop_ce020 (flags); ! 1584: syncmovepc (getv, flags); ! 1585: return; ! 1586: case immi: ! 1587: if (getv != 1) ! 1588: term (); ! 1589: printf ("\tuae_u32 %s = %s;\n", name, reg); ! 1590: maybeaddop_ce020 (flags); ! 1591: syncmovepc (getv, flags); ! 1592: return; ! 1593: default: ! 1594: term (); ! 1595: } ! 1596: ! 1597: syncmovepc (getv, flags); ! 1598: maybeaddop_ce020 (flags); ! 1599: ! 1600: /* We get here for all non-reg non-immediate addressing modes to ! 1601: * actually fetch the value. */ ! 1602: ! 1603: int exception_pc_offset = 0; ! 1604: if (getv == 2) { ! 1605: // store ! 1606: if (pc_68000_offset) { ! 1607: exception_pc_offset = pc_68000_offset + pc_68000_offset_store + 2; ! 1608: } ! 1609: } else { ! 1610: // fetch ! 1611: exception_pc_offset = pc_68000_offset + pc_68000_offset_fetch; ! 1612: } ! 1613: ! 1614: if ((using_prefetch || using_ce) && using_exception_3 && getv != 0 && size != sz_byte) { ! 1615: printf ("\tif (%sa & 1) {\n", name); ! 1616: if (exception_pc_offset) ! 1617: incpc("%d", exception_pc_offset); ! 1618: printf ("\t\texception3_%s(opcode, %sa);\n", getv == 2 ? "write" : "read", name); ! 1619: printf ("\t\tgoto %s;\n", endlabelstr); ! 1620: printf ("\t}\n"); ! 1621: need_endlabel = 1; ! 1622: start_brace (); ! 1623: } ! 1624: ! 1625: if ((using_prefetch || using_ce) && using_bus_error && getv != 0) { ! 1626: if (exception_pc_offset) ! 1627: printf("\tbus_error_offset = %d;\n", exception_pc_offset); ! 1628: } ! 1629: ! 1630: if (flags & GF_PREFETCH) ! 1631: fill_prefetch_next (); ! 1632: else if (flags & GF_IR2IRC) ! 1633: irc2ir_2 (true); ! 1634: ! 1635: if (getv == 1) { ! 1636: start_brace (); ! 1637: if (using_ce020 || using_prefetch_020) { ! 1638: switch (size) { ! 1639: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break; ! 1640: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break; ! 1641: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, srcl, name); count_read += 2; break; ! 1642: default: term (); ! 1643: } ! 1644: } else if (using_ce || using_prefetch) { ! 1645: switch (size) { ! 1646: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break; ! 1647: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break; ! 1648: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa) << 16; %s |= %s (%sa + 2);\n", name, srcw, name, name, srcw, name); count_read += 2; break; ! 1649: default: term (); ! 1650: } ! 1651: } else if (using_mmu) { ! 1652: if (flags & GF_FC) { ! 1653: switch (size) { ! 1654: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = sfc%s_get_byte (%sa);\n", name, mmu_postfix, name); break; ! 1655: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = sfc%s_get_word (%sa);\n", name, mmu_postfix, name); break; ! 1656: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = sfc%s_get_long (%sa);\n", name, mmu_postfix, name); break; ! 1657: default: term (); ! 1658: } ! 1659: } else { ! 1660: switch (size) { ! 1661: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, (flags & GF_LRMW) ? srcblrmw : (rmw ? srcbrmw : srcb), name); break; ! 1662: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, (flags & GF_LRMW) ? srcwlrmw : (rmw ? srcwrmw : srcw), name); break; ! 1663: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, (flags & GF_LRMW) ? srcllrmw : (rmw ? srclrmw : srcl), name); break; ! 1664: default: term (); ! 1665: } ! 1666: } ! 1667: } else { ! 1668: switch (size) { ! 1669: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break; ! 1670: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break; ! 1671: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, srcl, name); count_read += 2; break; ! 1672: default: term (); ! 1673: } ! 1674: } ! 1675: } ! 1676: ! 1677: /* We now might have to fix up the register for pre-dec or post-inc ! 1678: * addressing modes. */ ! 1679: if (!movem) ! 1680: switch (mode) { ! 1681: case Aipi: ! 1682: addmmufixup (reg); ! 1683: switch (size) { ! 1684: case sz_byte: ! 1685: printf ("\tm68k_areg (regs, %s) += areg_byteinc[%s];\n", reg, reg); ! 1686: break; ! 1687: case sz_word: ! 1688: printf ("\tm68k_areg (regs, %s) += 2;\n", reg); ! 1689: break; ! 1690: case sz_long: ! 1691: printf ("\tm68k_areg (regs, %s) += 4;\n", reg); ! 1692: break; ! 1693: default: ! 1694: term (); ! 1695: } ! 1696: break; ! 1697: case Apdi: ! 1698: addmmufixup (reg); ! 1699: printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name); ! 1700: break; ! 1701: default: ! 1702: break; ! 1703: } ! 1704: ! 1705: if (movem == 3) { ! 1706: close_brace (); ! 1707: } ! 1708: } ! 1709: ! 1710: static void genamode2 (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags) ! 1711: { ! 1712: genamode2x (mode, reg, size, name, getv, movem, flags, -1); ! 1713: } ! 1714: ! 1715: static void genamode (struct instr *curi, amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags) ! 1716: { ! 1717: int oldfixup = mmufixupstate; ! 1718: int subhead = 0; ! 1719: if (isce020() && curi) { ! 1720: switch (curi->fetchmode) ! 1721: { ! 1722: case fetchmode_fea: ! 1723: subhead = gence020cycles_fea (mode); ! 1724: break; ! 1725: case fetchmode_cea: ! 1726: subhead = gence020cycles_cea (curi, mode); ! 1727: break; ! 1728: case fetchmode_jea: ! 1729: subhead = gence020cycles_jea (curi, mode); ! 1730: break; ! 1731: } ! 1732: genamode2x (mode, reg, size, name, getv, movem, flags, curi->fetchmode); ! 1733: } else { ! 1734: genamode2 (mode, reg, size, name, getv, movem, flags); ! 1735: } ! 1736: if (using_mmu == 68040 && (oldfixup & 1)) { ! 1737: // we have fixup already active = this genamode call is destination mode and we can now clear previous source fixup. ! 1738: clearmmufixup (0); ! 1739: } ! 1740: if (isce020() && curi) ! 1741: addop_ce020 (curi, subhead); ! 1742: } ! 1743: ! 1744: static void genamode3 (struct instr *curi, amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags) ! 1745: { ! 1746: int oldfixup = mmufixupstate; ! 1747: genamode2x (mode, reg, size, name, getv, movem, flags, curi ? curi->fetchmode : -1); ! 1748: if (using_mmu == 68040 && (oldfixup & 1)) { ! 1749: // we have fixup already active = this genamode call is destination mode and we can now clear previous source fixup. ! 1750: clearmmufixup (0); ! 1751: } ! 1752: } ! 1753: ! 1754: static void genamodedual (struct instr *curi, amodes smode, const char *sreg, wordsizes ssize, const char *sname, int sgetv, int sflags, ! 1755: amodes dmode, const char *dreg, wordsizes dsize, const char *dname, int dgetv, int dflags) ! 1756: { ! 1757: int subhead = 0; ! 1758: bool eadmode = false; ! 1759: ! 1760: if (isce020()) { ! 1761: switch (curi->fetchmode) ! 1762: { ! 1763: case fetchmode_fea: ! 1764: if (smode >= imm || isreg (smode)) { ! 1765: subhead = gence020cycles_fea (dmode); ! 1766: eadmode = true; ! 1767: } else { ! 1768: subhead = gence020cycles_fea (smode); ! 1769: } ! 1770: break; ! 1771: case fetchmode_cea: ! 1772: subhead = gence020cycles_cea (curi, smode); ! 1773: break; ! 1774: case fetchmode_fiea: ! 1775: subhead = gence020cycles_fiea (curi, ssize, dmode); ! 1776: break; ! 1777: case fetchmode_ciea: ! 1778: subhead = gence020cycles_ciea (curi, ssize, dmode); ! 1779: break; ! 1780: case fetchmode_jea: ! 1781: subhead = gence020cycles_jea (curi, smode); ! 1782: break; ! 1783: default: ! 1784: printf ("\t/* No EA */\n"); ! 1785: break; ! 1786: } ! 1787: } ! 1788: subhead_ce020 = subhead; ! 1789: curi_ce020 = curi; ! 1790: genamode3 (curi, smode, sreg, ssize, sname, sgetv, 0, sflags); ! 1791: genamode3 (NULL, dmode, dreg, dsize, dname, dgetv, 0, dflags | (eadmode == true ? GF_OPCE020 : 0)); ! 1792: if (eadmode == false) ! 1793: maybeaddop_ce020 (GF_OPCE020); ! 1794: } ! 1795: ! 1796: static void genastore_2 (const char *from, amodes mode, const char *reg, wordsizes size, const char *to, int store_dir, int flags) ! 1797: { ! 1798: if (candormw) { ! 1799: if (strcmp (rmw_varname, to) != 0) ! 1800: candormw = false; ! 1801: } ! 1802: genastore_done = true; ! 1803: returntail (mode != Dreg && mode != Areg); ! 1804: ! 1805: switch (mode) { ! 1806: case Dreg: ! 1807: switch (size) { ! 1808: case sz_byte: ! 1809: printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from); ! 1810: break; ! 1811: case sz_word: ! 1812: printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from); ! 1813: break; ! 1814: case sz_long: ! 1815: printf ("\tm68k_dreg (regs, %s) = (%s);\n", reg, from); ! 1816: break; ! 1817: default: ! 1818: term (); ! 1819: } ! 1820: break; ! 1821: case Areg: ! 1822: switch (size) { ! 1823: case sz_word: ! 1824: printf ("\tm68k_areg (regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from); ! 1825: break; ! 1826: case sz_long: ! 1827: printf ("\tm68k_areg (regs, %s) = (%s);\n", reg, from); ! 1828: break; ! 1829: default: ! 1830: term (); ! 1831: } ! 1832: break; ! 1833: case Aind: ! 1834: case Aipi: ! 1835: case Apdi: ! 1836: case Ad16: ! 1837: case Ad8r: ! 1838: case absw: ! 1839: case absl: ! 1840: case PC16: ! 1841: case PC8r: ! 1842: if (!(flags & GF_NOFAULTPC)) ! 1843: gen_set_fault_pc (); ! 1844: if (using_ce020 || using_prefetch_020) { ! 1845: switch (size) { ! 1846: case sz_byte: ! 1847: printf ("\t%s (%sa, %s);\n", dstb, to, from); ! 1848: count_write++; ! 1849: break; ! 1850: case sz_word: ! 1851: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1852: term (); ! 1853: printf ("\t%s (%sa, %s);\n", dstw, to, from); ! 1854: count_write++; ! 1855: break; ! 1856: case sz_long: ! 1857: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1858: term (); ! 1859: printf ("\t%s (%sa, %s);\n", dstl, to, from); ! 1860: count_write += 2; ! 1861: break; ! 1862: default: ! 1863: term (); ! 1864: } ! 1865: } else if (using_ce) { ! 1866: switch (size) { ! 1867: case sz_byte: ! 1868: check_ipl_again(); ! 1869: printf ("\tx_put_byte (%sa, %s);\n", to, from); ! 1870: count_write++; ! 1871: break; ! 1872: case sz_word: ! 1873: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1874: term (); ! 1875: check_ipl_again(); ! 1876: printf ("\tx_put_word (%sa, %s);\n", to, from); ! 1877: count_write++; ! 1878: break; ! 1879: case sz_long: ! 1880: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1881: term (); ! 1882: if (store_dir) { ! 1883: printf ("\t%s (%sa + 2, %s);\n", dstw, to, from); ! 1884: check_ipl_again(); ! 1885: printf ("%s (%sa, %s >> 16);\n", dstw, to, from); ! 1886: } else { ! 1887: printf ("\t%s (%sa, %s >> 16);\n", dstw, to, from); ! 1888: check_ipl_again(); ! 1889: printf ("\t%s (%sa + 2, %s);\n", dstw, to, from); ! 1890: } ! 1891: count_write += 2; ! 1892: break; ! 1893: default: ! 1894: term (); ! 1895: } ! 1896: } else if (using_mmu) { ! 1897: switch (size) { ! 1898: case sz_byte: ! 1899: insn_n_cycles += 4; ! 1900: if (flags & GF_FC) ! 1901: printf ("\tdfc%s_put_byte (%sa, %s);\n", mmu_postfix, to, from); ! 1902: else ! 1903: printf ("\t%s (%sa, %s);\n", (flags & GF_LRMW) ? dstblrmw : (candormw ? dstbrmw : dstb), to, from); ! 1904: break; ! 1905: case sz_word: ! 1906: insn_n_cycles += 4; ! 1907: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1908: term (); ! 1909: if (flags & GF_FC) ! 1910: printf ("\tdfc%s_put_word (%sa, %s);\n", mmu_postfix, to, from); ! 1911: else ! 1912: printf ("\t%s (%sa, %s);\n", (flags & GF_LRMW) ? dstwlrmw : (candormw ? dstwrmw : dstw), to, from); ! 1913: break; ! 1914: case sz_long: ! 1915: insn_n_cycles += 8; ! 1916: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1917: term (); ! 1918: if (flags & GF_FC) ! 1919: printf ("\tdfc%s_put_long (%sa, %s);\n", mmu_postfix, to, from); ! 1920: else ! 1921: printf ("\t%s (%sa, %s);\n", (flags & GF_LRMW) ? dstllrmw : (candormw ? dstlrmw : dstl), to, from); ! 1922: break; ! 1923: default: ! 1924: term (); ! 1925: } ! 1926: } else if (using_prefetch) { ! 1927: switch (size) { ! 1928: case sz_byte: ! 1929: insn_n_cycles += 4; ! 1930: printf ("\t%s (%sa, %s);\n", dstb, to, from); ! 1931: count_write++; ! 1932: break; ! 1933: case sz_word: ! 1934: insn_n_cycles += 4; ! 1935: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1936: term (); ! 1937: printf ("\t%s (%sa, %s);\n", dstw, to, from); ! 1938: count_write++; ! 1939: break; ! 1940: case sz_long: ! 1941: insn_n_cycles += 8; ! 1942: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1943: term (); ! 1944: if (store_dir) ! 1945: printf ("\t%s (%sa + 2, %s); %s (%sa, %s >> 16);\n", dstw, to, from, dstw, to, from); ! 1946: else ! 1947: printf ("\t%s (%sa, %s >> 16); %s (%sa + 2, %s);\n", dstw, to, from, dstw, to, from); ! 1948: count_write += 2; ! 1949: break; ! 1950: default: ! 1951: term (); ! 1952: } ! 1953: } else { ! 1954: switch (size) { ! 1955: case sz_byte: ! 1956: insn_n_cycles += 4; ! 1957: printf ("\t%s (%sa, %s);\n", dstb, to, from); ! 1958: count_write++; ! 1959: break; ! 1960: case sz_word: ! 1961: insn_n_cycles += 4; ! 1962: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1963: term (); ! 1964: printf ("\t%s (%sa, %s);\n", dstw, to, from); ! 1965: count_write++; ! 1966: break; ! 1967: case sz_long: ! 1968: insn_n_cycles += 8; ! 1969: if (cpu_level < 2 && (mode == PC16 || mode == PC8r)) ! 1970: term (); ! 1971: printf ("\t%s (%sa, %s);\n", dstl, to, from); ! 1972: count_write += 2; ! 1973: break; ! 1974: default: ! 1975: term (); ! 1976: } ! 1977: } ! 1978: break; ! 1979: case imm: ! 1980: case imm0: ! 1981: case imm1: ! 1982: case imm2: ! 1983: case immi: ! 1984: term (); ! 1985: break; ! 1986: default: ! 1987: term (); ! 1988: } ! 1989: } ! 1990: ! 1991: static void genastore (const char *from, amodes mode, const char *reg, wordsizes size, const char *to) ! 1992: { ! 1993: genastore_2 (from, mode, reg, size, to, 0, 0); ! 1994: } ! 1995: static void genastore_tas (const char *from, amodes mode, const char *reg, wordsizes size, const char *to) ! 1996: { ! 1997: genastore_2 (from, mode, reg, size, to, 0, GF_LRMW); ! 1998: } ! 1999: static void genastore_cas (const char *from, amodes mode, const char *reg, wordsizes size, const char *to) ! 2000: { ! 2001: genastore_2 (from, mode, reg, size, to, 0, GF_LRMW | GF_NOFAULTPC); 1.1.1.4 root 2002: } 1.1.1.5 ! root 2003: static void genastore_rev (const char *from, amodes mode, const char *reg, wordsizes size, const char *to) 1.1.1.4 root 2004: { 1.1.1.5 ! root 2005: genastore_2 (from, mode, reg, size, to, 1, 0); 1.1.1.4 root 2006: } 1.1.1.5 ! root 2007: static void genastore_fc (const char *from, amodes mode, const char *reg, wordsizes size, const char *to) 1.1.1.4 root 2008: { 1.1.1.5 ! root 2009: genastore_2 (from, mode, reg, size, to, 1, GF_FC); 1.1.1.4 root 2010: } 2011: 2012: static void movem_mmu060 (const char *code, int size, bool put, bool aipi, bool apdi) 2013: { 1.1.1.5 ! root 2014: const char *index; ! 2015: int dphase; ! 2016: int i; ! 2017: if (apdi) { ! 2018: dphase = 1; ! 2019: index = "movem_index2"; ! 2020: } else { ! 2021: dphase = 0; ! 2022: index = "movem_index1"; ! 2023: } ! 2024: ! 2025: if (!put) { ! 2026: printf("\tuae_u32 tmp[16];\n"); ! 2027: printf("\tint tmpreg[16];\n"); ! 2028: printf("\tint idx = 0;\n"); ! 2029: for (i = 0; i < 2; i++) { ! 2030: char reg; ! 2031: if (i == dphase) ! 2032: reg = 'd'; ! 2033: else ! 2034: reg = 'a'; ! 2035: printf ("\twhile (%cmask) {\n", reg); ! 2036: if (apdi) ! 2037: printf ("\t\tsrca -= %d;\n", size); ! 2038: printf ("\t\ttmpreg[idx] = %s[%cmask] + %d;\n", index, reg, i == dphase ? 0 : 8); ! 2039: printf ("\t\ttmp[idx++] = %s;\n", code); ! 2040: if (!apdi) ! 2041: printf ("\t\tsrca += %d;\n", size); ! 2042: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg); ! 2043: printf ("\t}\n"); ! 2044: } ! 2045: if (aipi || apdi) ! 2046: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2047: printf ("\twhile (--idx >= 0) {\n"); ! 2048: printf ("\t\tregs.regs[tmpreg[idx]] = tmp[idx];\n"); ! 2049: printf ("\t}\n"); ! 2050: } else { ! 2051: for (i = 0; i < 2; i++) { ! 2052: char reg; ! 2053: if (i == dphase) ! 2054: reg = 'd'; ! 2055: else ! 2056: reg = 'a'; ! 2057: printf ("\twhile (%cmask) {\n", reg); ! 2058: if (apdi) ! 2059: printf ("\t\tsrca -= %d;\n", size); ! 2060: if (put) { ! 2061: printf ("\t\t%s, m68k_%creg (regs, %s[%cmask]));\n", code, reg, index, reg); ! 2062: } else { ! 2063: printf ("\t\tm68k_%creg (regs, %s[%cmask]) = %s;\n", reg, index, reg, code); ! 2064: } ! 2065: if (!apdi) ! 2066: printf ("\t\tsrca += %d;\n", size); ! 2067: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg); ! 2068: printf ("\t}\n"); ! 2069: } ! 2070: if (aipi || apdi) ! 2071: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2072: } 1.1.1.4 root 2073: } 2074: 2075: static bool mmu040_special_movem (uae_u16 opcode) 2076: { 1.1.1.5 ! root 2077: if (using_mmu != 68040) ! 2078: return false; ! 2079: return true; ! 2080: // return (((((opcode >> 3) & 7) == 7) && ((opcode & 7) == 2 || (opcode & 7) == 3)) || ((opcode >> 3) & 7) == 6); 1.1.1.4 root 2081: } 2082: 2083: static void movem_mmu040 (const char *code, int size, bool put, bool aipi, bool apdi, uae_u16 opcode) 2084: { 1.1.1.5 ! root 2085: const char *index; ! 2086: int dphase; ! 2087: int i; ! 2088: ! 2089: if (apdi) { ! 2090: dphase = 1; ! 2091: index = "movem_index2"; ! 2092: } else { ! 2093: dphase = 0; ! 2094: index = "movem_index1"; ! 2095: } ! 2096: ! 2097: printf ("\tmmu040_movem = 1;\n"); ! 2098: printf ("\tmmu040_movem_ea = srca;\n"); ! 2099: ! 2100: for (i = 0; i < 2; i++) { ! 2101: char reg; ! 2102: if (i == dphase) ! 2103: reg = 'd'; ! 2104: else ! 2105: reg = 'a'; ! 2106: printf ("\twhile (%cmask) {\n", reg); ! 2107: if (apdi) ! 2108: printf ("\t\tsrca -= %d;\n", size); ! 2109: if (put) { ! 2110: printf ("\t\t%s, m68k_%creg (regs, %s[%cmask]));\n", code, reg, index, reg); ! 2111: } else { ! 2112: printf ("\t\tm68k_%creg (regs, %s[%cmask]) = %s;\n", reg, index, reg, code); ! 2113: } ! 2114: if (!apdi) ! 2115: printf ("\t\tsrca += %d;\n", size); ! 2116: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg); ! 2117: printf ("\t}\n"); ! 2118: } ! 2119: if (aipi || apdi) ! 2120: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2121: printf ("\tmmu040_movem = 0;\n"); 1.1.1.4 root 2122: } 2123: 2124: /* 68030 MMU does not restore register state if it bus faults. 2125: * (also there wouldn't be enough space in stack frame to store all registers) 2126: */ 2127: static void movem_mmu030 (const char *code, int size, bool put, bool aipi, bool apdi) 2128: { 1.1.1.5 ! root 2129: const char *index; ! 2130: int dphase; ! 2131: int i; ! 2132: if (apdi) { ! 2133: dphase = 1; ! 2134: index = "movem_index2"; ! 2135: } else { ! 2136: dphase = 0; ! 2137: index = "movem_index1"; ! 2138: } ! 2139: printf ("\tmmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1;\n"); ! 2140: printf ("\tint movem_cnt = 0;\n"); ! 2141: if (!put) { ! 2142: printf ("\tuae_u32 val;\n"); ! 2143: printf ("\tif (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2)\n"); ! 2144: printf ("\t\tsrca = mmu030_ad[mmu030_idx].val;\n"); ! 2145: printf ("\telse\n"); ! 2146: printf ("\t\tmmu030_ad[mmu030_idx].val = srca;\n"); ! 2147: } ! 2148: for (i = 0; i < 2; i++) { ! 2149: char reg; ! 2150: if (i == dphase) ! 2151: reg = 'd'; ! 2152: else ! 2153: reg = 'a'; ! 2154: printf ("\twhile (%cmask) {\n", reg); ! 2155: if (apdi) ! 2156: printf ("\t\tsrca -= %d;\n", size); ! 2157: printf ("\t\tif (mmu030_state[0] == movem_cnt) {\n"); ! 2158: printf ("\t\t\tif (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {\n"); ! 2159: printf ("\t\t\t\tmmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;\n"); ! 2160: if (!put) ! 2161: printf ("\t\t\t\tval = %smmu030_data_buffer;\n", size == 2 ? "(uae_s32)(uae_s16)" : ""); ! 2162: printf ("\t\t\t} else {\n"); ! 2163: if (put) ! 2164: printf ("\t\t\t\t%s, (mmu030_data_buffer = m68k_%creg (regs, %s[%cmask])));\n", code, reg, index, reg); ! 2165: else ! 2166: printf ("\t\t\t\tval = %s;\n", code); ! 2167: printf ("\t\t\t}\n"); ! 2168: if (!put) { ! 2169: printf ("\t\t\tm68k_%creg (regs, %s[%cmask]) = val;\n", reg, index, reg); ! 2170: } ! 2171: printf ("\t\t\tmmu030_state[0]++;\n"); ! 2172: printf ("\t\t}\n"); ! 2173: if (!apdi) ! 2174: printf ("\t\tsrca += %d;\n", size); ! 2175: printf ("\t\tmovem_cnt++;\n"); ! 2176: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg); ! 2177: printf ("\t}\n"); ! 2178: } ! 2179: if (aipi || apdi) ! 2180: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); 1.1.1.4 root 2181: } 2182: 2183: static void genmovemel (uae_u16 opcode) 2184: { 1.1.1.5 ! root 2185: char getcode[100]; ! 2186: int size = table68k[opcode].size == sz_long ? 4 : 2; ! 2187: ! 2188: if (table68k[opcode].size == sz_long) { ! 2189: sprintf (getcode, "%s (srca)", srcld); ! 2190: } else { ! 2191: sprintf (getcode, "(uae_s32)(uae_s16)%s (srca)", srcwd); ! 2192: } ! 2193: count_read += table68k[opcode].size == sz_long ? 2 : 1; ! 2194: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); ! 2195: printf ("\tuae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); ! 2196: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, mmu040_special_movem (opcode) ? 3 : 1, GF_MOVE); ! 2197: addcycles_ce020 (8 - 2); ! 2198: start_brace (); ! 2199: if (using_mmu == 68030) { ! 2200: movem_mmu030 (getcode, size, false, table68k[opcode].dmode == Aipi, false); ! 2201: } else if (using_mmu == 68060) { ! 2202: movem_mmu060 (getcode, size, false, table68k[opcode].dmode == Aipi, false); ! 2203: } else if (using_mmu == 68040) { ! 2204: movem_mmu040 (getcode, size, false, table68k[opcode].dmode == Aipi, false, opcode); ! 2205: } else { ! 2206: printf ("\twhile (dmask) {\n"); ! 2207: printf ("\t\tm68k_dreg (regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask];\n", getcode, size); ! 2208: //addcycles_ce020 (1); ! 2209: printf ("\t}\n"); ! 2210: printf ("\twhile (amask) {\n"); ! 2211: printf ("\t\tm68k_areg (regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask];\n", getcode, size); ! 2212: //addcycles_ce020 (1); ! 2213: printf ("\t}\n"); ! 2214: if (table68k[opcode].dmode == Aipi) { ! 2215: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2216: count_read++; ! 2217: } ! 2218: } ! 2219: count_ncycles++; ! 2220: fill_prefetch_next (); ! 2221: get_prefetch_020 (); 1.1.1.4 root 2222: } 2223: 2224: static void genmovemel_ce (uae_u16 opcode) 2225: { 1.1.1.5 ! root 2226: int size = table68k[opcode].size == sz_long ? 4 : 2; ! 2227: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); ! 2228: printf ("\tuae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); ! 2229: printf ("\tuae_u32 v;\n"); ! 2230: if (table68k[opcode].dmode == Ad8r || table68k[opcode].dmode == PC8r) ! 2231: addcycles000 (2); ! 2232: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, GF_AA | GF_MOVE); ! 2233: start_brace (); ! 2234: if (table68k[opcode].size == sz_long) { ! 2235: printf ("\twhile (dmask) {\n"); ! 2236: printf ("\t\tv = %s (srca) << 16;\n", srcw); ! 2237: printf ("\t\tv |= %s (srca + 2);\n", srcw); ! 2238: printf ("\t\tm68k_dreg (regs, movem_index1[dmask]) = v;\n"); ! 2239: printf ("\t\tsrca += %d;\n", size); ! 2240: printf ("\t\tdmask = movem_next[dmask];\n"); ! 2241: addcycles000_nonce("\t\t", 8); ! 2242: printf ("\t}\n"); ! 2243: printf ("\twhile (amask) {\n"); ! 2244: printf ("\t\tv = %s (srca) << 16;\n", srcw); ! 2245: printf ("\t\tv |= %s (srca + 2);\n", srcw); ! 2246: printf ("\t\tm68k_areg (regs, movem_index1[amask]) = v;\n"); ! 2247: printf ("\t\tsrca += %d;\n", size); ! 2248: printf ("\t\tamask = movem_next[amask];\n"); ! 2249: addcycles000_nonce("\t\t", 8); ! 2250: printf ("\t}\n"); ! 2251: } else { ! 2252: printf ("\twhile (dmask) {\n"); ! 2253: printf ("\t\tm68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)%s (srca);\n", srcw); ! 2254: printf ("\t\tsrca += %d;\n", size); ! 2255: printf ("\t\tdmask = movem_next[dmask];\n"); ! 2256: addcycles000_nonce("\t\t", 4); ! 2257: printf ("\t}\n"); ! 2258: printf ("\twhile (amask) {\n"); ! 2259: printf ("\t\tm68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)%s (srca);\n", srcw); ! 2260: printf ("\t\tsrca += %d;\n", size); ! 2261: printf ("\t\tamask = movem_next[amask];\n"); ! 2262: addcycles000_nonce("\t\t", 4); ! 2263: printf ("\t}\n"); ! 2264: } ! 2265: printf ("\t%s (srca);\n", srcw); // and final extra word fetch that goes nowhere.. ! 2266: count_read++; ! 2267: if (table68k[opcode].dmode == Aipi) ! 2268: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2269: count_ncycles++; ! 2270: fill_prefetch_next (); 1.1.1.4 root 2271: } 2272: 2273: static void genmovemle (uae_u16 opcode) 2274: { 1.1.1.5 ! root 2275: char putcode[100]; ! 2276: int size = table68k[opcode].size == sz_long ? 4 : 2; ! 2277: ! 2278: if (table68k[opcode].size == sz_long) { ! 2279: sprintf (putcode, "%s (srca", dstld); ! 2280: } else { ! 2281: sprintf (putcode, "%s (srca", dstwd); ! 2282: } ! 2283: count_write += table68k[opcode].size == sz_long ? 2 : 1; ! 2284: ! 2285: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); ! 2286: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, mmu040_special_movem (opcode) ? 3 : 1, GF_MOVE); ! 2287: addcycles_ce020 (4 - 2); ! 2288: start_brace (); ! 2289: if (using_mmu >= 68030) { ! 2290: if (table68k[opcode].dmode == Apdi) ! 2291: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); ! 2292: else ! 2293: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); ! 2294: if (using_mmu == 68030) ! 2295: movem_mmu030 (putcode, size, true, false, table68k[opcode].dmode == Apdi); ! 2296: else if (using_mmu == 68060) ! 2297: movem_mmu060 (putcode, size, true, false, table68k[opcode].dmode == Apdi); ! 2298: else if (using_mmu == 68040) ! 2299: movem_mmu040 (putcode, size, true, false, table68k[opcode].dmode == Apdi, opcode); ! 2300: } else { ! 2301: if (table68k[opcode].dmode == Apdi) { ! 2302: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); ! 2303: if (!using_mmu) ! 2304: printf ("\tint type = get_cpu_model () >= 68020;\n"); ! 2305: printf ("\twhile (amask) {\n"); ! 2306: printf ("\t\tsrca -= %d;\n", size); ! 2307: ! 2308: printf ("\t\tif (!type || movem_index2[amask] != dstreg)\n"); ! 2309: printf ("\t\t\t%s, m68k_areg (regs, movem_index2[amask]));\n", putcode); ! 2310: printf ("\t\telse\n"); ! 2311: printf ("\t\t\t%s, m68k_areg (regs, movem_index2[amask]) - %d);\n", putcode, size); ! 2312: ! 2313: printf ("\t\tamask = movem_next[amask];\n"); ! 2314: printf ("\t}\n"); ! 2315: printf ("\twhile (dmask) { srca -= %d; %s, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n", ! 2316: size, putcode); ! 2317: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2318: } else { ! 2319: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); ! 2320: printf ("\twhile (dmask) { %s, m68k_dreg (regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n", ! 2321: putcode, size); ! 2322: printf ("\twhile (amask) { %s, m68k_areg (regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n", ! 2323: putcode, size); ! 2324: } ! 2325: } ! 2326: count_ncycles++; ! 2327: fill_prefetch_next (); ! 2328: get_prefetch_020 (); 1.1.1.4 root 2329: } 2330: 2331: static void genmovemle_ce (uae_u16 opcode) 2332: { 1.1.1.5 ! root 2333: int size = table68k[opcode].size == sz_long ? 4 : 2; ! 2334: ! 2335: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0)); ! 2336: if (table68k[opcode].dmode == Ad8r || table68k[opcode].dmode == PC8r) ! 2337: addcycles000 (2); ! 2338: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, GF_AA | GF_MOVE); ! 2339: start_brace (); ! 2340: if (table68k[opcode].size == sz_long) { ! 2341: if (table68k[opcode].dmode == Apdi) { ! 2342: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); ! 2343: printf ("\twhile (amask) {\n"); ! 2344: printf ("\t\tsrca -= %d;\n", size); ! 2345: printf ("\t\t%s (srca, m68k_areg (regs, movem_index2[amask]) >> 16);\n", dstw); ! 2346: printf ("\t\t%s (srca + 2, m68k_areg (regs, movem_index2[amask]));\n", dstw); ! 2347: printf ("\t\tamask = movem_next[amask];\n"); ! 2348: addcycles000_nonce("\t\t", 8); ! 2349: printf ("\t}\n"); ! 2350: printf ("\twhile (dmask) {\n"); ! 2351: printf ("\t\tsrca -= %d;\n", size); ! 2352: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index2[dmask]) >> 16);\n", dstw); ! 2353: printf ("\t\t%s (srca + 2, m68k_dreg (regs, movem_index2[dmask]));\n", dstw); ! 2354: printf ("\t\tdmask = movem_next[dmask];\n"); ! 2355: addcycles000_nonce("\t\t", 8); ! 2356: printf ("\t}\n"); ! 2357: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2358: } else { ! 2359: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); ! 2360: printf ("\twhile (dmask) {\n"); ! 2361: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16);\n", dstw); ! 2362: printf ("\t\t%s (srca + 2, m68k_dreg (regs, movem_index1[dmask]));\n", dstw); ! 2363: printf ("\t\tsrca += %d;\n", size); ! 2364: printf ("\t\tdmask = movem_next[dmask];\n"); ! 2365: addcycles000_nonce("\t\t", 8); ! 2366: printf ("\t}\n"); ! 2367: printf ("\twhile (amask) {\n"); ! 2368: printf ("\t\t%s (srca, m68k_areg (regs, movem_index1[amask]) >> 16);\n", dstw); ! 2369: printf ("\t\t%s (srca + 2, m68k_areg (regs, movem_index1[amask]));\n", dstw); ! 2370: printf ("\t\tsrca += %d;\n", size); ! 2371: printf ("\t\tamask = movem_next[amask];\n"); ! 2372: addcycles000_nonce("\t\t", 8); ! 2373: printf ("\t}\n"); ! 2374: } ! 2375: } else { ! 2376: if (table68k[opcode].dmode == Apdi) { ! 2377: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n"); ! 2378: printf ("\twhile (amask) {\n"); ! 2379: printf ("\t\tsrca -= %d;\n", size); ! 2380: printf ("\t\t%s (srca, m68k_areg (regs, movem_index2[amask]));\n", dstw); ! 2381: printf ("\tamask = movem_next[amask];\n"); ! 2382: addcycles000_nonce("\t\t", 4); ! 2383: printf ("\t}\n"); ! 2384: printf ("\twhile (dmask) {\n"); ! 2385: printf ("\t\tsrca -= %d;\n", size); ! 2386: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index2[dmask]));\n", dstw); ! 2387: printf ("\t\tdmask = movem_next[dmask];\n"); ! 2388: addcycles000_nonce("\t\t", 4); ! 2389: printf ("\t}\n"); ! 2390: printf ("\tm68k_areg (regs, dstreg) = srca;\n"); ! 2391: } else { ! 2392: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n"); ! 2393: printf ("\twhile (dmask) {\n"); ! 2394: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index1[dmask]));\n", dstw); ! 2395: printf ("\t\tsrca += %d;\n", size); ! 2396: printf ("\t\tdmask = movem_next[dmask];\n"); ! 2397: addcycles000_nonce("\t\t", 4); ! 2398: printf ("\t}\n"); ! 2399: printf ("\twhile (amask) {\n"); ! 2400: printf ("\t\t%s (srca, m68k_areg (regs, movem_index1[amask]));\n", dstw); ! 2401: printf ("\t\tsrca += %d;\n", size); ! 2402: printf ("\t\tamask = movem_next[amask];\n"); ! 2403: addcycles000_nonce("\t\t", 4); ! 2404: printf ("\t}\n"); ! 2405: } ! 2406: } ! 2407: count_ncycles++; ! 2408: fill_prefetch_next (); 1.1.1.4 root 2409: } 2410: 2411: static void duplicate_carry (int n) 2412: { 1.1.1.5 ! root 2413: int i; ! 2414: for (i = 0; i <= n; i++) ! 2415: printf ("\t"); ! 2416: printf ("COPY_CARRY ();\n"); 1.1.1.4 root 2417: } 2418: 2419: typedef enum 2420: { 1.1.1.5 ! root 2421: flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_z, flag_zn, ! 2422: flag_av, flag_sv 1.1.1.4 root 2423: } 2424: flagtypes; 2425: 1.1.1.5 ! root 2426: static void genflags_normal (flagtypes type, wordsizes size, const char *value, const char *src, const char *dst) 1.1.1.4 root 2427: { 1.1.1.5 ! root 2428: char vstr[100], sstr[100], dstr[100]; ! 2429: char usstr[100], udstr[100]; ! 2430: char unsstr[100], undstr[100]; ! 2431: ! 2432: switch (size) { ! 2433: case sz_byte: ! 2434: strcpy (vstr, "((uae_s8)("); ! 2435: strcpy (usstr, "((uae_u8)("); ! 2436: break; ! 2437: case sz_word: ! 2438: strcpy (vstr, "((uae_s16)("); ! 2439: strcpy (usstr, "((uae_u16)("); ! 2440: break; ! 2441: case sz_long: ! 2442: strcpy (vstr, "((uae_s32)("); ! 2443: strcpy (usstr, "((uae_u32)("); ! 2444: break; ! 2445: default: ! 2446: term (); ! 2447: } ! 2448: strcpy (unsstr, usstr); ! 2449: ! 2450: strcpy (sstr, vstr); ! 2451: strcpy (dstr, vstr); ! 2452: strcat (vstr, value); ! 2453: strcat (vstr, "))"); ! 2454: strcat (dstr, dst); ! 2455: strcat (dstr, "))"); ! 2456: strcat (sstr, src); ! 2457: strcat (sstr, "))"); ! 2458: ! 2459: strcpy (udstr, usstr); ! 2460: strcat (udstr, dst); ! 2461: strcat (udstr, "))"); ! 2462: strcat (usstr, src); ! 2463: strcat (usstr, "))"); ! 2464: ! 2465: strcpy (undstr, unsstr); ! 2466: strcat (unsstr, "-"); ! 2467: strcat (undstr, "~"); ! 2468: strcat (undstr, dst); ! 2469: strcat (undstr, "))"); ! 2470: strcat (unsstr, src); ! 2471: strcat (unsstr, "))"); ! 2472: ! 2473: switch (type) { ! 2474: case flag_logical_noclobber: ! 2475: case flag_logical: ! 2476: case flag_z: ! 2477: case flag_zn: ! 2478: case flag_av: ! 2479: case flag_sv: ! 2480: case flag_addx: ! 2481: case flag_subx: ! 2482: break; ! 2483: ! 2484: case flag_add: ! 2485: start_brace (); ! 2486: printf ("uae_u32 %s = %s + %s;\n", value, udstr, usstr); ! 2487: break; ! 2488: case flag_sub: ! 2489: case flag_cmp: ! 2490: start_brace (); ! 2491: printf ("uae_u32 %s = %s - %s;\n", value, udstr, usstr); ! 2492: break; ! 2493: } ! 2494: ! 2495: switch ((int)type) { ! 2496: case flag_logical_noclobber: ! 2497: case flag_logical: ! 2498: case flag_zn: ! 2499: break; ! 2500: ! 2501: case flag_add: ! 2502: case flag_sub: ! 2503: case flag_addx: ! 2504: case flag_subx: ! 2505: case flag_cmp: ! 2506: case flag_av: ! 2507: case flag_sv: ! 2508: start_brace (); ! 2509: printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr); ! 2510: printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr); ! 2511: printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr); ! 2512: break; ! 2513: } ! 2514: ! 2515: switch (type) { ! 2516: case flag_logical: ! 2517: printf ("\tCLEAR_CZNV ();\n"); ! 2518: printf ("\tSET_ZFLG (%s == 0);\n", vstr); ! 2519: printf ("\tSET_NFLG (%s < 0);\n", vstr); ! 2520: break; ! 2521: case flag_logical_noclobber: ! 2522: printf ("\tSET_ZFLG (%s == 0);\n", vstr); ! 2523: printf ("\tSET_NFLG (%s < 0);\n", vstr); ! 2524: break; ! 2525: case flag_av: ! 2526: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); ! 2527: break; ! 2528: case flag_sv: ! 2529: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n"); ! 2530: break; ! 2531: case flag_z: ! 2532: printf ("\tSET_ZFLG (GET_ZFLG () & (%s == 0));\n", vstr); ! 2533: break; ! 2534: case flag_zn: ! 2535: printf ("\tSET_ZFLG (GET_ZFLG () & (%s == 0));\n", vstr); ! 2536: printf ("\tSET_NFLG (%s < 0);\n", vstr); ! 2537: break; ! 2538: case flag_add: ! 2539: printf ("\tSET_ZFLG (%s == 0);\n", vstr); ! 2540: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); ! 2541: printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr); ! 2542: duplicate_carry (0); ! 2543: printf ("\tSET_NFLG (flgn != 0);\n"); ! 2544: break; ! 2545: case flag_sub: ! 2546: printf ("\tSET_ZFLG (%s == 0);\n", vstr); ! 2547: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n"); ! 2548: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr); ! 2549: duplicate_carry (0); ! 2550: printf ("\tSET_NFLG (flgn != 0);\n"); ! 2551: break; ! 2552: case flag_addx: ! 2553: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */ ! 2554: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */ ! 2555: duplicate_carry (0); ! 2556: break; ! 2557: case flag_subx: ! 2558: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */ ! 2559: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */ ! 2560: duplicate_carry (0); ! 2561: break; ! 2562: case flag_cmp: ! 2563: printf ("\tSET_ZFLG (%s == 0);\n", vstr); ! 2564: printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n"); ! 2565: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr); ! 2566: printf ("\tSET_NFLG (flgn != 0);\n"); ! 2567: break; ! 2568: } ! 2569: } ! 2570: ! 2571: static void genflags (flagtypes type, wordsizes size, const char *value, const char *src, const char *dst) ! 2572: { ! 2573: /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have ! 2574: them in the appropriate m68k.h files and use just one copy of this ! 2575: code here. The API can be changed if necessary. */ ! 2576: if (optimized_flags) { ! 2577: switch (type) { ! 2578: case flag_add: ! 2579: case flag_sub: ! 2580: start_brace (); ! 2581: printf ("\tuae_u32 %s;\n", value); ! 2582: break; ! 2583: ! 2584: default: ! 2585: break; ! 2586: } ! 2587: ! 2588: /* At least some of those casts are fairly important! */ ! 2589: switch (type) { ! 2590: case flag_logical_noclobber: ! 2591: printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n"); ! 2592: if (strcmp (value, "0") == 0) { ! 2593: printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n"); ! 2594: } else { ! 2595: switch ((int)size) { ! 2596: case sz_byte: printf ("\toptflag_testb (regs, (uae_s8)(%s));\n", value); break; ! 2597: case sz_word: printf ("\toptflag_testw (regs, (uae_s16)(%s));\n", value); break; ! 2598: case sz_long: printf ("\toptflag_testl (regs, (uae_s32)(%s));\n", value); break; ! 2599: } ! 2600: printf ("\tIOR_CZNV (oldcznv);\n"); ! 2601: } ! 2602: printf ("\t}\n"); ! 2603: return; ! 2604: case flag_logical: ! 2605: if (strcmp (value, "0") == 0) { ! 2606: printf ("\tSET_CZNV (FLAGVAL_Z);\n"); ! 2607: } else { ! 2608: switch ((int)size) { ! 2609: case sz_byte: printf ("\toptflag_testb (regs, (uae_s8)(%s));\n", value); break; ! 2610: case sz_word: printf ("\toptflag_testw (regs, (uae_s16)(%s));\n", value); break; ! 2611: case sz_long: printf ("\toptflag_testl (regs, (uae_s32)(%s));\n", value); break; ! 2612: } ! 2613: } ! 2614: return; ! 2615: ! 2616: case flag_add: ! 2617: switch ((int)size) { ! 2618: case sz_byte: printf ("\toptflag_addb (regs, %s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break; ! 2619: case sz_word: printf ("\toptflag_addw (regs, %s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break; ! 2620: case sz_long: printf ("\toptflag_addl (regs, %s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break; ! 2621: } ! 2622: return; ! 2623: ! 2624: case flag_sub: ! 2625: switch ((int)size) { ! 2626: case sz_byte: printf ("\toptflag_subb (regs, %s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break; ! 2627: case sz_word: printf ("\toptflag_subw (regs, %s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break; ! 2628: case sz_long: printf ("\toptflag_subl (regs, %s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break; ! 2629: } ! 2630: return; ! 2631: ! 2632: case flag_cmp: ! 2633: switch ((int)size) { ! 2634: case sz_byte: printf ("\toptflag_cmpb (regs, (uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break; ! 2635: case sz_word: printf ("\toptflag_cmpw (regs, (uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break; ! 2636: case sz_long: printf ("\toptflag_cmpl (regs, (uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break; ! 2637: } ! 2638: return; ! 2639: ! 2640: default: ! 2641: break; ! 2642: } ! 2643: } ! 2644: ! 2645: genflags_normal (type, size, value, src, dst); 1.1.1.4 root 2646: } 2647: 2648: static void force_range_for_rox (const char *var, wordsizes size) 2649: { 1.1.1.5 ! root 2650: /* Could do a modulo operation here... which one is faster? */ ! 2651: switch ((int)size) { ! 2652: case sz_long: ! 2653: printf ("\tif (%s >= 33) %s -= 33;\n", var, var); ! 2654: break; ! 2655: case sz_word: ! 2656: printf ("\tif (%s >= 34) %s -= 34;\n", var, var); ! 2657: printf ("\tif (%s >= 17) %s -= 17;\n", var, var); ! 2658: break; ! 2659: case sz_byte: ! 2660: printf ("\tif (%s >= 36) %s -= 36;\n", var, var); ! 2661: printf ("\tif (%s >= 18) %s -= 18;\n", var, var); ! 2662: printf ("\tif (%s >= 9) %s -= 9;\n", var, var); ! 2663: break; ! 2664: } 1.1.1.4 root 2665: } 2666: 2667: static const char *cmask (wordsizes size) 2668: { 1.1.1.5 ! root 2669: switch (size) { ! 2670: case sz_byte: return "0x80"; ! 2671: case sz_word: return "0x8000"; ! 2672: case sz_long: return "0x80000000"; ! 2673: default: term (); return 0; ! 2674: } 1.1.1.4 root 2675: } 2676: 2677: static int source_is_imm1_8 (struct instr *i) 2678: { 1.1.1.5 ! root 2679: return i->stype == 3; 1.1.1.4 root 2680: } 2681: 2682: static void shift_ce (amodes dmode, int size) 2683: { 1.1.1.5 ! root 2684: if (isreg (dmode)) { ! 2685: int c = size == sz_long ? 4 : 2; ! 2686: if (using_ce) { ! 2687: printf ("\t{\n"); ! 2688: printf ("\t\tint cycles = %d;\n", c); ! 2689: printf ("\t\tcycles += 2 * ccnt;\n"); ! 2690: addcycles000_3 ("\t\t"); ! 2691: printf ("\t}\n"); ! 2692: } ! 2693: addcycles000_nonces("\t", "2 * ccnt"); ! 2694: count_cycles += c; ! 2695: count_ncycles++; ! 2696: } 1.1.1.4 root 2697: } 2698: 1.1.1.5 ! root 2699: // BCHG/BSET/BCLR Dx,Dx or #xx,Dx adds 2 cycles if bit number > 15 1.1.1.4 root 2700: static void bsetcycles (struct instr *curi) 2701: { 1.1.1.5 ! root 2702: if (curi->size == sz_byte) { ! 2703: printf ("\tsrc &= 7;\n"); ! 2704: } else { ! 2705: printf ("\tsrc &= 31;\n"); ! 2706: if (isreg (curi->dmode)) { ! 2707: addcycles000 (2); ! 2708: if (curi->mnemo != i_BTST) { ! 2709: if (using_ce) ! 2710: printf ("\tif (src > 15) %s (2);\n", do_cycles); ! 2711: addcycles000_nonce("\tif (src > 15) ", 2); ! 2712: count_ncycles++; ! 2713: } ! 2714: } ! 2715: } 1.1.1.4 root 2716: } 2717: 2718: static int islongimm (struct instr *curi) 2719: { 1.1.1.5 ! root 2720: return (curi->size == sz_long && (curi->smode == Dreg || curi->smode == imm || curi->smode == Areg)); 1.1.1.4 root 2721: } 2722: 2723: 2724: static void resetvars (void) 2725: { 1.1.1.5 ! root 2726: insn_n_cycles = using_prefetch ? 0 : 4; ! 2727: insn_n_cycles020 = 0; ! 2728: genamode_cnt = 0; ! 2729: genamode8r_offset[0] = genamode8r_offset[1] = 0; ! 2730: m68k_pc_total = 0; ! 2731: branch_inst = 0; ! 2732: ! 2733: ir2irc = 0; ! 2734: mmufixupcnt = 0; ! 2735: mmufixupstate = 0; ! 2736: disp020cnt = 0; ! 2737: candormw = false; ! 2738: genastore_done = false; ! 2739: rmw_varname[0] = 0; ! 2740: tail_ce020 = 0; ! 2741: total_ce020 = 0; ! 2742: tail_ce020_done = false; ! 2743: head_in_ea_ce020 = 0; ! 2744: head_ce020_cycs_done = false; ! 2745: no_prefetch_ce020 = false; ! 2746: got_ea_ce020 = false; ! 2747: ! 2748: prefetch_long = NULL; ! 2749: srcli = NULL; ! 2750: srcbi = NULL; ! 2751: disp000 = "get_disp_ea_000"; ! 2752: disp020 = "get_disp_ea_020"; ! 2753: nextw = NULL; ! 2754: nextl = NULL; ! 2755: do_cycles = "do_cycles"; ! 2756: srcwd = srcld = NULL; ! 2757: dstwd = dstld = NULL; ! 2758: srcblrmw = NULL; ! 2759: srcwlrmw = NULL; ! 2760: srcllrmw = NULL; ! 2761: dstblrmw = NULL; ! 2762: dstwlrmw = NULL; ! 2763: dstllrmw = NULL; ! 2764: getpc = "m68k_getpc ()"; ! 2765: ! 2766: if (using_indirect > 0) { ! 2767: // tracer ! 2768: getpc = "m68k_getpci ()"; ! 2769: if (!using_ce020 && !using_prefetch_020 && !using_ce) { ! 2770: // generic + indirect ! 2771: disp020 = "x_get_disp_ea_020"; ! 2772: prefetch_long = "get_iilong_jit"; ! 2773: prefetch_word = "get_iiword_jit"; ! 2774: nextw = "next_iiword_jit"; ! 2775: nextl = "next_iilong_jit"; ! 2776: srcli = "get_iilong_jit"; ! 2777: srcwi = "get_iiword_jit"; ! 2778: srcbi = "get_iibyte_jit"; ! 2779: srcl = "x_get_long"; ! 2780: dstl = "x_put_long"; ! 2781: srcw = "x_get_word"; ! 2782: dstw = "x_put_word"; ! 2783: srcb = "x_get_byte"; ! 2784: dstb = "x_put_byte"; ! 2785: getpc = "m68k_getpc()"; // special jit support ! 2786: } else if (!using_ce020 && !using_prefetch_020) { ! 2787: prefetch_word = "get_word_ce000_prefetch"; ! 2788: srcli = "x_get_ilong"; ! 2789: srcwi = "x_get_iword"; ! 2790: srcbi = "x_get_ibyte"; ! 2791: srcl = "x_get_long"; ! 2792: dstl = "x_put_long"; ! 2793: srcw = "x_get_word"; ! 2794: dstw = "x_put_word"; ! 2795: srcb = "x_get_byte"; ! 2796: dstb = "x_put_byte"; ! 2797: do_cycles = "do_cycles_ce000_internal"; ! 2798: } else if (using_ce020 == 1) { ! 2799: /* x_ not used if it redirects to ! 2800: * get_word_ce020_prefetch() ! 2801: */ ! 2802: disp020 = "x_get_disp_ea_ce020"; ! 2803: prefetch_word = "get_word_ce020_prefetch"; ! 2804: prefetch_long = "get_long_ce020_prefetch"; ! 2805: srcli = "x_get_ilong"; ! 2806: srcwi = "x_get_iword"; ! 2807: srcbi = "x_get_ibyte"; ! 2808: srcl = "x_get_long"; ! 2809: dstl = "x_put_long"; ! 2810: srcw = "x_get_word"; ! 2811: dstw = "x_put_word"; ! 2812: srcb = "x_get_byte"; ! 2813: dstb = "x_put_byte"; ! 2814: do_cycles = "do_cycles_ce020_internal"; ! 2815: nextw = "next_iword_020ce"; ! 2816: nextl = "next_ilong_020ce"; ! 2817: } else if (using_ce020 == 2) { ! 2818: // 68030 CE ! 2819: disp020 = "x_get_disp_ea_ce030"; ! 2820: prefetch_long = "get_long_ce030_prefetch"; ! 2821: prefetch_word = "get_word_ce030_prefetch"; ! 2822: srcli = "x_get_ilong"; ! 2823: srcwi = "x_get_iword"; ! 2824: srcbi = "x_get_ibyte"; ! 2825: srcl = "x_get_long"; ! 2826: dstl = "x_put_long"; ! 2827: srcw = "x_get_word"; ! 2828: dstw = "x_put_word"; ! 2829: srcb = "x_get_byte"; ! 2830: dstb = "x_put_byte"; ! 2831: do_cycles = "do_cycles_ce020_internal"; ! 2832: nextw = "next_iword_030ce"; ! 2833: nextl = "next_ilong_030ce"; ! 2834: } else if (using_ce020 == 3) { ! 2835: // 68040/060 CE ! 2836: disp020 = "x_get_disp_ea_040"; ! 2837: prefetch_long = "get_ilong_cache_040"; ! 2838: prefetch_word = "get_iword_cache_040"; ! 2839: srcli = "x_get_ilong"; ! 2840: srcwi = "x_get_iword"; ! 2841: srcbi = "x_get_ibyte"; ! 2842: srcl = "x_get_long"; ! 2843: dstl = "x_put_long"; ! 2844: srcw = "x_get_word"; ! 2845: dstw = "x_put_word"; ! 2846: srcb = "x_get_byte"; ! 2847: dstb = "x_put_byte"; ! 2848: do_cycles = "do_cycles_ce020_internal"; ! 2849: nextw = "next_iword_cache040"; ! 2850: nextl = "next_ilong_cache040"; ! 2851: } else if (using_prefetch_020 == 1) { ! 2852: disp020 = "x_get_disp_ea_020"; ! 2853: prefetch_word = "get_word_020_prefetch"; ! 2854: prefetch_long = "get_long_020_prefetch"; ! 2855: srcli = "x_get_ilong"; ! 2856: srcwi = "x_get_iword"; ! 2857: srcbi = "x_get_ibyte"; ! 2858: srcl = "x_get_long"; ! 2859: dstl = "x_put_long"; ! 2860: srcw = "x_get_word"; ! 2861: dstw = "x_put_word"; ! 2862: srcb = "x_get_byte"; ! 2863: dstb = "x_put_byte"; ! 2864: nextw = "next_iword_020_prefetch"; ! 2865: nextl = "next_ilong_020_prefetch"; ! 2866: } else if (using_prefetch_020 == 2) { ! 2867: disp020 = "x_get_disp_ea_020"; ! 2868: prefetch_word = "get_word_030_prefetch"; ! 2869: prefetch_long = "get_long_030_prefetch"; ! 2870: srcli = "x_get_ilong"; ! 2871: srcwi = "x_get_iword"; ! 2872: srcbi = "x_get_ibyte"; ! 2873: srcl = "x_get_long"; ! 2874: dstl = "x_put_long"; ! 2875: srcw = "x_get_word"; ! 2876: dstw = "x_put_word"; ! 2877: srcb = "x_get_byte"; ! 2878: dstb = "x_put_byte"; ! 2879: nextw = "next_iword_030_prefetch"; ! 2880: nextl = "next_ilong_030_prefetch"; ! 2881: } 1.1.1.4 root 2882: #if 0 1.1.1.5 ! root 2883: } else if (using_ce020) { ! 2884: disp020 = "x_get_disp_ea_020"; ! 2885: do_cycles = "do_cycles_ce020"; ! 2886: if (using_ce020 == 2) { ! 2887: // 68030/40/60 CE ! 2888: prefetch_long = "get_long_ce030_prefetch"; ! 2889: prefetch_word = "get_word_ce030_prefetch"; ! 2890: nextw = "next_iword_030ce"; ! 2891: nextl = "next_ilong_030ce"; ! 2892: srcli = "get_word_ce030_prefetch"; ! 2893: srcwi = "get_long_ce030_prefetch"; ! 2894: srcl = "get_long_ce030"; ! 2895: dstl = "put_long_ce030"; ! 2896: srcw = "get_word_ce030"; ! 2897: dstw = "put_word_ce030"; ! 2898: srcb = "get_byte_ce030"; ! 2899: dstb = "put_byte_ce030"; ! 2900: } else { ! 2901: // 68020 CE ! 2902: prefetch_long = "get_long_ce020_prefetch"; ! 2903: prefetch_word = "get_word_ce020_prefetch"; ! 2904: nextw = "next_iword_020ce"; ! 2905: nextl = "next_ilong_020ce"; ! 2906: srcli = "get_word_ce020_prefetch"; ! 2907: srcwi = "get_long_ce020_prefetch"; ! 2908: srcl = "get_long_ce020"; ! 2909: dstl = "put_long_ce020"; ! 2910: srcw = "get_word_ce020"; ! 2911: dstw = "put_word_ce020"; ! 2912: srcb = "get_byte_ce020"; ! 2913: dstb = "put_byte_ce020"; ! 2914: } ! 2915: #endif ! 2916: } else if (using_mmu == 68030) { ! 2917: // 68030 MMU ! 2918: disp020 = "get_disp_ea_020_mmu030"; ! 2919: prefetch_long = "get_ilong_mmu030_state"; ! 2920: prefetch_word = "get_iword_mmu030_state"; ! 2921: nextw = "next_iword_mmu030_state"; ! 2922: nextl = "next_ilong_mmu030_state"; ! 2923: srcli = "get_ilong_mmu030_state"; ! 2924: srcwi = "get_iword_mmu030_state"; ! 2925: srcbi = "get_ibyte_mmu030_state"; ! 2926: srcl = "get_long_mmu030_state"; ! 2927: dstl = "put_long_mmu030_state"; ! 2928: srcw = "get_word_mmu030_state"; ! 2929: dstw = "put_word_mmu030_state"; ! 2930: srcb = "get_byte_mmu030_state"; ! 2931: dstb = "put_byte_mmu030_state"; ! 2932: srcblrmw = "get_lrmw_byte_mmu030_state"; ! 2933: srcwlrmw = "get_lrmw_word_mmu030_state"; ! 2934: srcllrmw = "get_lrmw_long_mmu030_state"; ! 2935: dstblrmw = "put_lrmw_byte_mmu030_state"; ! 2936: dstwlrmw = "put_lrmw_word_mmu030_state"; ! 2937: dstllrmw = "put_lrmw_long_mmu030_state"; ! 2938: srcld = "get_long_mmu030"; ! 2939: srcwd = "get_word_mmu030"; ! 2940: dstld = "put_long_mmu030"; ! 2941: dstwd = "put_word_mmu030"; ! 2942: getpc = "m68k_getpci ()"; ! 2943: } else if (using_mmu == 68040) { ! 2944: // 68040 MMU ! 2945: disp020 = "x_get_disp_ea_020"; ! 2946: prefetch_long = "get_ilong_mmu040"; ! 2947: prefetch_word = "get_iword_mmu040"; ! 2948: nextw = "next_iword_mmu040"; ! 2949: nextl = "next_ilong_mmu040"; ! 2950: srcli = "get_ilong_mmu040"; ! 2951: srcwi = "get_iword_mmu040"; ! 2952: srcbi = "get_ibyte_mmu040"; ! 2953: srcl = "get_long_mmu040"; ! 2954: dstl = "put_long_mmu040"; ! 2955: srcw = "get_word_mmu040"; ! 2956: dstw = "put_word_mmu040"; ! 2957: srcb = "get_byte_mmu040"; ! 2958: dstb = "put_byte_mmu040"; ! 2959: srcblrmw = "get_lrmw_byte_mmu040"; ! 2960: srcwlrmw = "get_lrmw_word_mmu040"; ! 2961: srcllrmw = "get_lrmw_long_mmu040"; ! 2962: dstblrmw = "put_lrmw_byte_mmu040"; ! 2963: dstwlrmw = "put_lrmw_word_mmu040"; ! 2964: dstllrmw = "put_lrmw_long_mmu040"; ! 2965: getpc = "m68k_getpci ()"; ! 2966: } else if (using_mmu) { ! 2967: // 68060 MMU ! 2968: disp020 = "x_get_disp_ea_020"; ! 2969: prefetch_long = "get_ilong_mmu060"; ! 2970: prefetch_word = "get_iword_mmu060"; ! 2971: nextw = "next_iword_mmu060"; ! 2972: nextl = "next_ilong_mmu060"; ! 2973: srcli = "get_ilong_mmu060"; ! 2974: srcwi = "get_iword_mmu060"; ! 2975: srcbi = "get_ibyte_mmu060"; ! 2976: srcl = "get_long_mmu060"; ! 2977: dstl = "put_long_mmu060"; ! 2978: srcw = "get_word_mmu060"; ! 2979: dstw = "put_word_mmu060"; ! 2980: srcb = "get_byte_mmu060"; ! 2981: dstb = "put_byte_mmu060"; ! 2982: srcblrmw = "get_lrmw_byte_mmu060"; ! 2983: srcwlrmw = "get_lrmw_word_mmu060"; ! 2984: srcllrmw = "get_lrmw_long_mmu060"; ! 2985: dstblrmw = "put_lrmw_byte_mmu060"; ! 2986: dstwlrmw = "put_lrmw_word_mmu060"; ! 2987: dstllrmw = "put_lrmw_long_mmu060"; ! 2988: // 68060 only: also non-locked read-modify-write accesses are reported ! 2989: srcbrmw = "get_rmw_byte_mmu060"; ! 2990: srcwrmw = "get_rmw_word_mmu060"; ! 2991: srclrmw = "get_rmw_long_mmu060"; ! 2992: dstbrmw = "put_rmw_byte_mmu060"; ! 2993: dstwrmw = "put_rmw_word_mmu060"; ! 2994: dstlrmw = "put_rmw_long_mmu060"; ! 2995: getpc = "m68k_getpci ()"; ! 2996: } else if (using_ce) { ! 2997: // 68000 ce ! 2998: prefetch_word = "get_word_ce000_prefetch"; ! 2999: srcwi = "get_wordi_ce000"; ! 3000: srcl = "get_long_ce000"; ! 3001: dstl = "put_long_ce000"; ! 3002: srcw = "get_word_ce000"; ! 3003: dstw = "put_word_ce000"; ! 3004: srcb = "get_byte_ce000"; ! 3005: dstb = "put_byte_ce000"; ! 3006: do_cycles = "do_cycles_ce000"; ! 3007: getpc = "m68k_getpci ()"; ! 3008: } else if (using_prefetch) { ! 3009: // 68000 prefetch ! 3010: prefetch_word = "get_word_000_prefetch"; ! 3011: prefetch_long = "get_long_000_prefetch"; ! 3012: srcwi = "get_wordi_000"; ! 3013: srcl = "get_long_000"; ! 3014: dstl = "put_long_000"; ! 3015: srcw = "get_word_000"; ! 3016: dstw = "put_word_000"; ! 3017: srcb = "get_byte_000"; ! 3018: dstb = "put_byte_000"; ! 3019: getpc = "m68k_getpci ()"; ! 3020: } else { ! 3021: // generic + direct ! 3022: prefetch_long = "get_dilong"; ! 3023: prefetch_word = "get_diword"; ! 3024: nextw = "next_diword"; ! 3025: nextl = "next_dilong"; ! 3026: srcli = "get_dilong"; ! 3027: srcwi = "get_diword"; ! 3028: srcbi = "get_dibyte"; ! 3029: if (using_indirect < 0) { ! 3030: srcl = "get_long_jit"; ! 3031: dstl = "put_long_jit"; ! 3032: srcw = "get_word_jit"; ! 3033: dstw = "put_word_jit"; ! 3034: srcb = "get_byte_jit"; ! 3035: dstb = "put_byte_jit"; ! 3036: } else { ! 3037: srcl = "get_long"; ! 3038: dstl = "put_long"; ! 3039: srcw = "get_word"; ! 3040: dstw = "put_word"; ! 3041: srcb = "get_byte"; ! 3042: dstb = "put_byte"; ! 3043: } ! 3044: } ! 3045: if (!dstld) ! 3046: dstld = dstl; ! 3047: if (!dstwd) ! 3048: dstwd = dstw; ! 3049: if (!srcld) ! 3050: srcld = srcl; ! 3051: if (!srcwd) ! 3052: srcwd = srcw; ! 3053: if (!srcblrmw) { ! 3054: srcblrmw = srcb; ! 3055: srcwlrmw = srcw; ! 3056: srcllrmw = srcl; ! 3057: dstblrmw = dstb; ! 3058: dstwlrmw = dstw; ! 3059: dstllrmw = dstl; ! 3060: } ! 3061: ! 3062: } ! 3063: ! 3064: static void gen_opcode (unsigned int opcode) ! 3065: { ! 3066: current_opcode = opcode; ! 3067: struct instr *curi = table68k + opcode; ! 3068: ! 3069: resetvars (); ! 3070: ! 3071: #ifdef WINUAE_FOR_HATARI ! 3072: /* Hatari : Store the family of the instruction (used to check for pairing on ST, ! 3073: * for non-CPU cycles calculation and profiling) ! 3074: */ ! 3075: printf ("\tOpcodeFamily = %d;\n", curi->mnemo); ! 3076: /* leave some space for patching in the current cycles later */ ! 3077: if (!using_ce020) { ! 3078: printf("\tCurrentInstrCycles = \n"); ! 3079: nCurInstrCycPos = ftell(stdout) - 5; ! 3080: } ! 3081: #endif ! 3082: ! 3083: start_brace (); ! 3084: ! 3085: m68k_pc_offset = 2; ! 3086: ! 3087: // do not unnecessarily create useless mmuop030 ! 3088: // functions when CPU is not 68030 ! 3089: if (curi->mnemo == i_MMUOP030 && cpu_level != 3 && !cpu_generic) { ! 3090: printf("\top_illg (opcode);\n"); ! 3091: did_prefetch = -1; ! 3092: goto end; ! 3093: } ! 3094: ! 3095: switch (curi->plev) { ! 3096: case 0: /* not privileged */ ! 3097: break; ! 3098: case 1: /* unprivileged only on 68000 */ ! 3099: if (cpu_level == 0) ! 3100: break; ! 3101: if (next_cpu_level < 0) ! 3102: next_cpu_level = 0; ! 3103: ! 3104: /* fall through */ ! 3105: case 2: /* priviledged */ ! 3106: printf ("if (!regs.s) { Exception (8); goto %s; }\n", endlabelstr); ! 3107: need_endlabel = 1; ! 3108: start_brace (); ! 3109: break; ! 3110: case 3: /* privileged if size == word */ ! 3111: if (curi->size == sz_byte) ! 3112: break; ! 3113: printf ("if (!regs.s) { Exception (8); goto %s; }\n", endlabelstr); ! 3114: need_endlabel = 1; ! 3115: start_brace (); ! 3116: break; ! 3117: } ! 3118: switch (curi->mnemo) { ! 3119: case i_OR: ! 3120: case i_AND: ! 3121: case i_EOR: ! 3122: { ! 3123: // documentaion error: and.l #imm,dn = 2 idle, not 1 idle (same as OR and EOR) ! 3124: int c = 0; ! 3125: genamodedual (curi, ! 3126: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3127: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW); ! 3128: // genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3129: // genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW); ! 3130: printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^'); ! 3131: genflags (flag_logical, curi->size, "src", "", ""); ! 3132: if (curi->dmode == Dreg && curi->size == sz_long) { ! 3133: c += 2; ! 3134: if (curi->smode == imm || curi->smode == Dreg) ! 3135: c += 2; ! 3136: } ! 3137: fill_prefetch_next (); ! 3138: if (c > 0) ! 3139: addcycles000 (c); ! 3140: genastore_rev ("src", curi->dmode, "dstreg", curi->size, "dst"); ! 3141: break; ! 3142: } ! 3143: // all SR/CCR modifications does full prefetch ! 3144: case i_ORSR: ! 3145: case i_EORSR: ! 3146: printf ("\tMakeSR ();\n"); ! 3147: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3148: if (curi->size == sz_byte) { ! 3149: printf ("\tsrc &= 0xFF;\n"); ! 3150: } ! 3151: addcycles000 (8); ! 3152: if (cpu_level <= 1) { ! 3153: sync_m68k_pc (); ! 3154: fill_prefetch_full (); ! 3155: } else { ! 3156: fill_prefetch_next (); ! 3157: } ! 3158: printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|'); ! 3159: makefromsr (); ! 3160: break; ! 3161: case i_ANDSR: ! 3162: printf ("\tMakeSR ();\n"); ! 3163: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3164: if (curi->size == sz_byte) { ! 3165: printf ("\tsrc |= 0xFF00;\n"); ! 3166: } ! 3167: addcycles000 (8); ! 3168: if (cpu_level <= 1) { ! 3169: sync_m68k_pc (); ! 3170: fill_prefetch_full (); ! 3171: } else { ! 3172: fill_prefetch_next (); ! 3173: } ! 3174: printf ("\tregs.sr &= src;\n"); ! 3175: makefromsr (); ! 3176: break; ! 3177: case i_SUB: ! 3178: { ! 3179: int c = 0; ! 3180: genamodedual (curi, ! 3181: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3182: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW); ! 3183: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3184: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW); ! 3185: if (curi->dmode == Dreg) { ! 3186: if (curi->size == sz_long) { ! 3187: c += 2; ! 3188: if (curi->smode == imm || curi->smode == immi || curi->smode == Dreg || curi->smode == Areg) ! 3189: c += 2; ! 3190: } ! 3191: } ! 3192: fill_prefetch_next (); ! 3193: if (c > 0) ! 3194: addcycles000 (c); ! 3195: start_brace (); ! 3196: genflags (flag_sub, curi->size, "newv", "src", "dst"); ! 3197: genastore_rev ("newv", curi->dmode, "dstreg", curi->size, "dst"); ! 3198: break; ! 3199: } ! 3200: case i_SUBA: ! 3201: { ! 3202: int c = 0; ! 3203: genamodedual (curi, ! 3204: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3205: curi->dmode, "dstreg", sz_long, "dst", 1, GF_RMW); ! 3206: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3207: //genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 1, 0, GF_RMW); ! 3208: if (curi->smode == immi) { ! 3209: // SUBAQ.x is always 8 cycles ! 3210: c += 4; ! 3211: } else { ! 3212: c = curi->size == sz_long ? 2 : 4; ! 3213: if (islongimm (curi)) ! 3214: c += 2; ! 3215: } ! 3216: fill_prefetch_next (); ! 3217: if (c > 0) ! 3218: addcycles000 (c); ! 3219: start_brace (); ! 3220: printf ("\tuae_u32 newv = dst - src;\n"); ! 3221: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); ! 3222: break; ! 3223: } ! 3224: case i_SUBX: ! 3225: if (!isreg (curi->smode)) ! 3226: addcycles000 (2); ! 3227: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); ! 3228: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW); ! 3229: fill_prefetch_next (); ! 3230: if (curi->size == sz_long && isreg (curi->smode)) ! 3231: addcycles000 (4); ! 3232: start_brace (); ! 3233: printf ("\tuae_u32 newv = dst - src - (GET_XFLG () ? 1 : 0);\n"); ! 3234: genflags (flag_subx, curi->size, "newv", "src", "dst"); ! 3235: genflags (flag_zn, curi->size, "newv", "", ""); ! 3236: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); ! 3237: break; ! 3238: case i_SBCD: ! 3239: if (!isreg (curi->smode)) ! 3240: addcycles000 (2); ! 3241: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); ! 3242: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW); ! 3243: fill_prefetch_next (); ! 3244: start_brace (); ! 3245: printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG () ? 1 : 0);\n"); ! 3246: printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n"); ! 3247: printf ("\tuae_u16 newv, tmp_newv;\n"); ! 3248: printf ("\tint bcd = 0;\n"); ! 3249: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n"); ! 3250: printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n"); ! 3251: printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG () ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n"); ! 3252: printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG () ? 1 : 0)) & 0x300) > 0xFF);\n"); ! 3253: duplicate_carry (0); ! 3254: /* Manual says bits NV are undefined though a real 68040/060 don't change them */ ! 3255: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { ! 3256: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS) ! 3257: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1; ! 3258: genflags (flag_z, curi->size, "newv", "", ""); ! 3259: } else { ! 3260: genflags (flag_zn, curi->size, "newv", "", ""); ! 3261: printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n"); ! 3262: } ! 3263: if (isreg (curi->smode)) { ! 3264: addcycles000 (2); ! 3265: } ! 3266: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); ! 3267: break; ! 3268: case i_ADD: ! 3269: { ! 3270: int c = 0; ! 3271: genamodedual (curi, ! 3272: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3273: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW); ! 3274: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3275: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW); ! 3276: if (curi->dmode == Dreg) { ! 3277: if (curi->size == sz_long) { ! 3278: c += 2; ! 3279: if (curi->smode == imm || curi->smode == immi || curi->smode == Dreg || curi->smode == Areg) ! 3280: c += 2; ! 3281: } ! 3282: } ! 3283: fill_prefetch_next (); ! 3284: if (c > 0) ! 3285: addcycles000 (c); ! 3286: start_brace (); ! 3287: genflags (flag_add, curi->size, "newv", "src", "dst"); ! 3288: genastore_rev ("newv", curi->dmode, "dstreg", curi->size, "dst"); ! 3289: break; ! 3290: } ! 3291: case i_ADDA: ! 3292: { ! 3293: int c = 0; ! 3294: genamodedual (curi, ! 3295: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3296: curi->dmode, "dstreg", sz_long, "dst", 1, GF_RMW); ! 3297: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3298: //genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 1, 0, GF_RMW); ! 3299: if (curi->smode == immi) { ! 3300: // ADDAQ.x is always 8 cycles ! 3301: c += 4; ! 3302: } else { ! 3303: c = curi->size == sz_long ? 2 : 4; ! 3304: if (islongimm (curi)) ! 3305: c += 2; ! 3306: } ! 3307: fill_prefetch_next (); ! 3308: if (c > 0) ! 3309: addcycles000 (c); ! 3310: start_brace (); ! 3311: printf ("\tuae_u32 newv = dst + src;\n"); ! 3312: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); ! 3313: break; ! 3314: } ! 3315: case i_ADDX: ! 3316: if (!isreg (curi->smode)) ! 3317: addcycles000 (2); ! 3318: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); ! 3319: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW); ! 3320: fill_prefetch_next (); ! 3321: if (curi->size == sz_long && isreg (curi->smode)) ! 3322: addcycles000 (4); ! 3323: start_brace (); ! 3324: printf ("\tuae_u32 newv = dst + src + (GET_XFLG () ? 1 : 0);\n"); ! 3325: genflags (flag_addx, curi->size, "newv", "src", "dst"); ! 3326: genflags (flag_zn, curi->size, "newv", "", ""); ! 3327: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); ! 3328: break; ! 3329: case i_ABCD: ! 3330: if (!isreg (curi->smode)) ! 3331: addcycles000 (2); ! 3332: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); ! 3333: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW); ! 3334: fill_prefetch_next (); ! 3335: start_brace (); ! 3336: printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG () ? 1 : 0);\n"); ! 3337: printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n"); ! 3338: printf ("\tuae_u16 newv, tmp_newv;\n"); ! 3339: printf ("\tint cflg;\n"); ! 3340: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;"); ! 3341: printf ("\tif (newv_lo > 9) { newv += 6; }\n"); ! 3342: printf ("\tcflg = (newv & 0x3F0) > 0x90;\n"); ! 3343: printf ("\tif (cflg) newv += 0x60;\n"); ! 3344: printf ("\tSET_CFLG (cflg);\n"); ! 3345: duplicate_carry (0); ! 3346: /* Manual says bits NV are undefined though a real 68040 don't change them */ ! 3347: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { ! 3348: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS) ! 3349: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1; ! 3350: genflags (flag_z, curi->size, "newv", "", ""); ! 3351: } ! 3352: else { ! 3353: genflags (flag_zn, curi->size, "newv", "", ""); ! 3354: printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n"); ! 3355: } ! 3356: if (isreg (curi->smode)) { ! 3357: addcycles000 (2); ! 3358: } ! 3359: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst"); ! 3360: break; ! 3361: case i_NEG: ! 3362: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW); ! 3363: fill_prefetch_next (); ! 3364: if (isreg (curi->smode) && curi->size == sz_long) ! 3365: addcycles000 (2); ! 3366: start_brace (); ! 3367: genflags (flag_sub, curi->size, "dst", "src", "0"); ! 3368: genastore_rev ("dst", curi->smode, "srcreg", curi->size, "src"); ! 3369: break; ! 3370: case i_NEGX: ! 3371: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW); ! 3372: fill_prefetch_next (); ! 3373: if (isreg (curi->smode) && curi->size == sz_long) ! 3374: addcycles000 (2); ! 3375: start_brace (); ! 3376: printf ("\tuae_u32 newv = 0 - src - (GET_XFLG () ? 1 : 0);\n"); ! 3377: genflags (flag_subx, curi->size, "newv", "src", "0"); ! 3378: genflags (flag_zn, curi->size, "newv", "", ""); ! 3379: genastore_rev ("newv", curi->smode, "srcreg", curi->size, "src"); ! 3380: break; ! 3381: case i_NBCD: ! 3382: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW); ! 3383: if (isreg (curi->smode)) ! 3384: addcycles000 (2); ! 3385: fill_prefetch_next (); ! 3386: start_brace (); ! 3387: printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG () ? 1 : 0);\n"); ! 3388: printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n"); ! 3389: printf ("\tuae_u16 newv;\n"); ! 3390: #ifndef WINUAE_FOR_HATARI ! 3391: printf ("\tint cflg, tmp_newv;\n"); ! 3392: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n"); ! 3393: printf ("\ttmp_newv = newv = newv_hi + newv_lo;\n"); ! 3394: #else ! 3395: /* Hatari : use 2 cases to avoid 'tmp_newv' set but not used */ ! 3396: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { ! 3397: printf ("\tint cflg;\n"); ! 3398: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n"); ! 3399: printf ("\tnewv = newv_hi + newv_lo;\n"); ! 3400: } ! 3401: else { ! 3402: printf ("\tint cflg, tmp_newv;\n"); ! 3403: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n"); ! 3404: printf ("\ttmp_newv = newv = newv_hi + newv_lo;\n"); ! 3405: } 1.1.1.4 root 3406: #endif 1.1.1.5 ! root 3407: printf ("\tcflg = (newv & 0x1F0) > 0x90;\n"); ! 3408: printf ("\tif (cflg) newv -= 0x60;\n"); ! 3409: printf ("\tSET_CFLG (cflg);\n"); ! 3410: duplicate_carry(0); ! 3411: /* Manual says bits NV are undefined though a real 68040 don't change them */ ! 3412: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) { ! 3413: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS) ! 3414: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1; ! 3415: genflags (flag_z, curi->size, "newv", "", ""); ! 3416: } ! 3417: else { ! 3418: genflags (flag_zn, curi->size, "newv", "", ""); ! 3419: printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n"); ! 3420: } ! 3421: genastore ("newv", curi->smode, "srcreg", curi->size, "src"); ! 3422: break; ! 3423: case i_CLR: ! 3424: next_level_000 (); ! 3425: genamode (curi, curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0); ! 3426: fill_prefetch_next (); ! 3427: if (isreg (curi->smode) && curi->size == sz_long) ! 3428: addcycles000 (2); ! 3429: genflags (flag_logical, curi->size, "0", "", ""); ! 3430: genastore_rev ("0", curi->smode, "srcreg", curi->size, "src"); ! 3431: break; ! 3432: case i_NOT: ! 3433: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW); ! 3434: fill_prefetch_next (); ! 3435: if (isreg (curi->smode) && curi->size == sz_long) ! 3436: addcycles000 (2); ! 3437: start_brace (); ! 3438: printf ("\tuae_u32 dst = ~src;\n"); ! 3439: genflags (flag_logical, curi->size, "dst", "", ""); ! 3440: genastore_rev ("dst", curi->smode, "srcreg", curi->size, "src"); ! 3441: break; ! 3442: case i_TST: ! 3443: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3444: fill_prefetch_next (); ! 3445: genflags (flag_logical, curi->size, "src", "", ""); ! 3446: break; ! 3447: case i_BTST: ! 3448: genamodedual (curi, ! 3449: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3450: curi->dmode, "dstreg", curi->size, "dst", 1, 0); ! 3451: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3452: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_IR2IRC); ! 3453: fill_prefetch_next (); ! 3454: bsetcycles (curi); ! 3455: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); ! 3456: break; ! 3457: case i_BCHG: ! 3458: case i_BCLR: ! 3459: case i_BSET: ! 3460: // on 68000 these have weird side-effect, if EA points to write-only custom register ! 3461: //during instruction's read access CPU data lines appear as zero to outside world, ! 3462: // (normally previously fetched data appears in data lines if reading write-only register) ! 3463: // this allows stupid things like bset #2,$dff096 to work "correctly" ! 3464: // NOTE: above can't be right. ! 3465: genamodedual (curi, ! 3466: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3467: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW); ! 3468: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3469: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_IR2IRC | GF_RMW); ! 3470: fill_prefetch_next (); ! 3471: bsetcycles (curi); ! 3472: // bclr needs 1 extra cycle ! 3473: if (curi->mnemo == i_BCLR && curi->dmode == Dreg) ! 3474: addcycles000 (2); ! 3475: if (curi->mnemo == i_BCHG) { ! 3476: printf ("\tdst ^= (1 << src);\n"); ! 3477: printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n"); ! 3478: } else if (curi->mnemo == i_BCLR) { ! 3479: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); ! 3480: printf ("\tdst &= ~(1 << src);\n"); ! 3481: } else if (curi->mnemo == i_BSET) { ! 3482: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n"); ! 3483: printf ("\tdst |= (1 << src);\n"); ! 3484: } ! 3485: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst"); ! 3486: break; ! 3487: case i_CMPM: ! 3488: // confirmed ! 3489: genamodedual (curi, ! 3490: curi->smode, "srcreg", curi->size, "src", 1, GF_AA, ! 3491: curi->dmode, "dstreg", curi->size, "dst", 1, GF_AA); ! 3492: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA); ! 3493: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA); ! 3494: fill_prefetch_next (); ! 3495: start_brace (); ! 3496: genflags (flag_cmp, curi->size, "newv", "src", "dst"); ! 3497: break; ! 3498: case i_CMP: ! 3499: genamodedual (curi, ! 3500: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3501: curi->dmode, "dstreg", curi->size, "dst", 1, 0); ! 3502: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3503: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); ! 3504: fill_prefetch_next (); ! 3505: if (curi->dmode == Dreg && curi->size == sz_long) ! 3506: addcycles000 (2); ! 3507: start_brace (); ! 3508: genflags (flag_cmp, curi->size, "newv", "src", "dst"); ! 3509: break; ! 3510: case i_CMPA: ! 3511: genamodedual (curi, ! 3512: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3513: curi->dmode, "dstreg", sz_long, "dst", 1, 0); ! 3514: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3515: //genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0); ! 3516: fill_prefetch_next (); ! 3517: addcycles000 (2); ! 3518: start_brace (); ! 3519: genflags (flag_cmp, sz_long, "newv", "src", "dst"); ! 3520: break; ! 3521: /* The next two are coded a little unconventional, but they are doing ! 3522: * weird things... */ ! 3523: case i_MVPRM: // MOVEP R->M ! 3524: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3525: printf ("\tuaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0)); ! 3526: if (curi->size == sz_word) { ! 3527: printf ("\t%s (memp, src >> 8);\n\t%s (memp + 2, src);\n", dstb, dstb); ! 3528: count_write += 2; ! 3529: } else { ! 3530: printf ("\t%s (memp, src >> 24);\n\t%s (memp + 2, src >> 16);\n", dstb, dstb); ! 3531: printf ("\t%s (memp + 4, src >> 8);\n\t%s (memp + 6, src);\n", dstb, dstb); ! 3532: count_write += 4; ! 3533: } ! 3534: fill_prefetch_next (); ! 3535: break; ! 3536: case i_MVPMR: // MOVEP M->R ! 3537: printf ("\tuaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0)); ! 3538: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0); ! 3539: if (curi->size == sz_word) { ! 3540: printf ("\tuae_u16 val = (%s (memp) & 0xff) << 8;\n", srcb); ! 3541: printf ("\t val |= (%s (memp + 2) & 0xff);\n", srcb); ! 3542: count_read += 2; ! 3543: } else { ! 3544: printf ("\tuae_u32 val = (%s (memp) & 0xff) << 24;\n", srcb); ! 3545: printf ("\t val |= (%s (memp + 2) & 0xff) << 16;\n", srcb); ! 3546: printf ("\t val |= (%s (memp + 4) & 0xff) << 8;\n", srcb); ! 3547: printf ("\t val |= (%s (memp + 6) & 0xff);\n", srcb); ! 3548: count_read += 4; ! 3549: } ! 3550: fill_prefetch_next (); ! 3551: genastore ("val", curi->dmode, "dstreg", curi->size, "dst"); ! 3552: break; ! 3553: case i_MOVE: ! 3554: case i_MOVEA: ! 3555: { ! 3556: /* 2 MOVE instruction variants have special prefetch sequence: ! 3557: * - MOVE <ea>,-(An) = prefetch is before writes (Apdi) ! 3558: * - MOVE memory,(xxx).L = 2 prefetches after write ! 3559: * - move.x #imm = prefetch is done before write ! 3560: * - all others = prefetch is done after writes ! 3561: * ! 3562: * - move.x xxx,[at least 1 extension word here] = fetch 1 extension word before (xxx) ! 3563: * ! 3564: */ ! 3565: if (isce020()) { ! 3566: // MOVE is too complex to handle in table68k ! 3567: int h = 0, t = 0, c = 0, subhead = 0; ! 3568: bool fea = false; ! 3569: if (curi->smode == immi && isreg (curi->dmode)) { ! 3570: // MOVEQ ! 3571: h = 2; t = 0; c = 0; ! 3572: } else if (isreg (curi->smode) && isreg (curi->dmode)) { ! 3573: // MOVE Rn,Rn ! 3574: h = 2; t = 0; c = 2; ! 3575: } else if (isreg (curi->dmode)) { ! 3576: // MOVE EA,Rn ! 3577: h = 0; t = 0; c = 2; ! 3578: fea = true; ! 3579: } else if (curi->dmode == Aind) { ! 3580: if (isreg (curi->smode)) { ! 3581: // MOVE Rn,(An) ! 3582: h = 0; t = 1; c = 3; ! 3583: } else { ! 3584: // MOVE SOURCE,(An) ! 3585: h = 2; t = 0; c = 4; ! 3586: fea = true; ! 3587: } ! 3588: } else if (curi->dmode == Aipi) { ! 3589: if (isreg (curi->smode)) { ! 3590: // MOVE Rn,(An)+ ! 3591: h = 0; t = 1; c = 3; ! 3592: } else { ! 3593: // MOVE SOURCE,(An)+ ! 3594: h = 2; t = 0; c = 4; ! 3595: fea = true; ! 3596: } ! 3597: } else if (curi->dmode == Apdi) { ! 3598: if (isreg (curi->smode)) { ! 3599: // MOVE Rn,-(An) ! 3600: h = 0; t = 2; c = 4; ! 3601: } else { ! 3602: // MOVE SOURCE,-(An) ! 3603: h = 2; t = 0; c = 4; ! 3604: fea = true; ! 3605: } ! 3606: } else if (curi->dmode == Ad16) { ! 3607: // MOVE EA,(d16,An) ! 3608: h = 2; t = 0; c = 4; ! 3609: fea = true; ! 3610: } else if (curi->dmode == Ad8r) { ! 3611: h = 4; t = 0; c = 6; ! 3612: fea = true; ! 3613: } else if (curi->dmode == absw) { ! 3614: // MOVE EA,xxx.W ! 3615: h = 2; t = 0; c = 4; ! 3616: fea = true; ! 3617: } else if (curi->dmode == absl) { ! 3618: // MOVE EA,xxx.L ! 3619: h = 0; t = 0; c = 6; ! 3620: fea = true; ! 3621: } else { ! 3622: h = 4; t = 0; c = 6; ! 3623: fea = true; ! 3624: } ! 3625: if (fea) { ! 3626: if (curi->smode == imm) ! 3627: subhead = gence020cycles_fiea (curi, curi->size, Dreg); ! 3628: else ! 3629: subhead = gence020cycles_fea (curi->smode); ! 3630: } ! 3631: genamode2x (curi->smode, "srcreg", curi->size, "src", 1, 0, 0, fea ? fetchmode_fea : -1); ! 3632: genamode2 (curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_MOVE); ! 3633: addopcycles_ce20 (h, t, c, -subhead); ! 3634: if (curi->mnemo == i_MOVEA && curi->size == sz_word) ! 3635: printf ("\tsrc = (uae_s32)(uae_s16)src;\n"); ! 3636: if (curi->mnemo == i_MOVE) ! 3637: genflags (flag_logical, curi->size, "src", "", ""); ! 3638: genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); ! 3639: sync_m68k_pc (); ! 3640: ! 3641: } else { ! 3642: int prefetch_done = 0, flags; ! 3643: int dualprefetch = curi->dmode == absl && (curi->smode != Dreg && curi->smode != Areg && curi->smode != imm); ! 3644: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3645: flags = GF_MOVE | GF_APDI; ! 3646: //if (curi->size == sz_long && (curi->smode == Dreg || curi->smode == Areg)) ! 3647: // flags &= ~GF_APDI; ! 3648: flags |= dualprefetch ? GF_NOREFILL : 0; ! 3649: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, flags); ! 3650: if (curi->mnemo == i_MOVEA && curi->size == sz_word) ! 3651: printf ("\tsrc = (uae_s32)(uae_s16)src;\n"); ! 3652: if (curi->dmode == Apdi) { ! 3653: fill_prefetch_next (); ! 3654: prefetch_done = 1; ! 3655: } ! 3656: if (curi->mnemo == i_MOVE) ! 3657: genflags (flag_logical, curi->size, "src", "", ""); ! 3658: ! 3659: if (curi->size == sz_long) { ! 3660: if ((curi->dmode == Ad16 || curi->dmode == PC16) && curi->smode == imm) { ! 3661: // lots more needed.. ! 3662: // move.l x,absl ! 3663: // move.l (an),x(an) ! 3664: single_check_ipl(); ! 3665: } ! 3666: } ! 3667: genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); ! 3668: sync_m68k_pc (); ! 3669: if (dualprefetch) { ! 3670: fill_prefetch_full_000 (); ! 3671: prefetch_done = 1; ! 3672: } ! 3673: if (!prefetch_done) ! 3674: fill_prefetch_next (); ! 3675: } ! 3676: } ! 3677: break; ! 3678: case i_MVSR2: // MOVE FROM SR ! 3679: genamode (curi, curi->smode, "srcreg", sz_word, "src", 2, 0, 0); ! 3680: if (isreg (curi->smode)) { ! 3681: fill_prefetch_next (); ! 3682: addcycles000 (2); ! 3683: } else { ! 3684: // write to memory, dummy write to same address, X-flag seems to be always set ! 3685: if (cpu_level <= 1 && curi->size == sz_word) { ! 3686: printf ("\t%s (srca, regs.sr | 0x0010);\n", dstw); ! 3687: count_write++; ! 3688: } ! 3689: fill_prefetch_next (); ! 3690: } ! 3691: printf ("\tMakeSR ();\n"); ! 3692: // real write ! 3693: if (curi->size == sz_byte) ! 3694: genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src"); ! 3695: else ! 3696: genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src"); ! 3697: break; ! 3698: case i_MV2SR: // MOVE TO SR ! 3699: genamode (curi, curi->smode, "srcreg", sz_word, "src", 1, 0, 0); ! 3700: if (curi->size == sz_byte) { ! 3701: // MOVE TO CCR ! 3702: addcycles000 (4); ! 3703: printf ("\tMakeSR ();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n"); ! 3704: } else { ! 3705: // MOVE TO SR ! 3706: addcycles000 (4); ! 3707: printf ("\tregs.sr = src;\n"); ! 3708: } ! 3709: makefromsr (); ! 3710: if (cpu_level <= 1) { ! 3711: // 68000 does 2xprefetch ! 3712: sync_m68k_pc (); ! 3713: fill_prefetch_full (); ! 3714: } else { ! 3715: fill_prefetch_next (); ! 3716: } ! 3717: break; ! 3718: case i_SWAP: ! 3719: genamode (curi, curi->smode, "srcreg", sz_long, "src", 1, 0, 0); ! 3720: fill_prefetch_next (); ! 3721: start_brace (); ! 3722: printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n"); ! 3723: genflags (flag_logical, sz_long, "dst", "", ""); ! 3724: genastore ("dst", curi->smode, "srcreg", sz_long, "src"); ! 3725: break; ! 3726: case i_EXG: ! 3727: // confirmed ! 3728: genamodedual (curi, ! 3729: curi->smode, "srcreg", curi->size, "src", 1, 0, ! 3730: curi->dmode, "dstreg", curi->size, "dst", 1, 0); ! 3731: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3732: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); ! 3733: fill_prefetch_next (); ! 3734: addcycles000 (2); ! 3735: genastore ("dst", curi->smode, "srcreg", curi->size, "src"); ! 3736: genastore ("src", curi->dmode, "dstreg", curi->size, "dst"); ! 3737: break; ! 3738: case i_EXT: ! 3739: // confirmed ! 3740: genamode (curi, curi->smode, "srcreg", sz_long, "src", 1, 0, 0); ! 3741: fill_prefetch_next (); ! 3742: start_brace (); ! 3743: switch (curi->size) { ! 3744: case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break; ! 3745: case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break; ! 3746: case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break; ! 3747: default: term (); ! 3748: } ! 3749: genflags (flag_logical, ! 3750: curi->size == sz_word ? sz_word : sz_long, "dst", "", ""); ! 3751: genastore ("dst", curi->smode, "srcreg", ! 3752: curi->size == sz_word ? sz_word : sz_long, "src"); ! 3753: break; ! 3754: case i_MVMEL: ! 3755: // confirmed ! 3756: if (using_ce || using_prefetch) ! 3757: genmovemel_ce (opcode); ! 3758: else ! 3759: genmovemel (opcode); ! 3760: tail_ce020_done = true; ! 3761: break; ! 3762: case i_MVMLE: ! 3763: // confirmed ! 3764: if (using_ce || using_prefetch) ! 3765: genmovemle_ce (opcode); ! 3766: else ! 3767: genmovemle (opcode); ! 3768: tail_ce020_done = true; ! 3769: break; ! 3770: case i_TRAP: ! 3771: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3772: gen_set_fault_pc (); ! 3773: sync_m68k_pc (); ! 3774: printf ("\tException (src + 32);\n"); ! 3775: did_prefetch = 1; ! 3776: clear_m68k_offset(); ! 3777: break; ! 3778: case i_MVR2USP: ! 3779: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3780: fill_prefetch_next (); ! 3781: printf ("\tregs.usp = src;\n"); ! 3782: break; ! 3783: case i_MVUSP2R: ! 3784: genamode (curi, curi->smode, "srcreg", curi->size, "src", 2, 0, 0); ! 3785: fill_prefetch_next (); ! 3786: genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src"); ! 3787: break; ! 3788: case i_RESET: ! 3789: fill_prefetch_next (); ! 3790: printf ("\tcpureset ();\n"); ! 3791: sync_m68k_pc (); ! 3792: addcycles000 (128); ! 3793: if (using_prefetch) { ! 3794: printf ("\t%s (2);\n", prefetch_word); ! 3795: clear_m68k_offset(); ! 3796: } ! 3797: break; ! 3798: case i_NOP: ! 3799: fill_prefetch_next (); ! 3800: break; ! 3801: case i_STOP: ! 3802: if (using_prefetch) { ! 3803: printf ("\tregs.sr = regs.irc;\n"); ! 3804: m68k_pc_offset += 2; ! 3805: } else { ! 3806: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3807: printf ("\tregs.sr = src;\n"); ! 3808: } ! 3809: addcycles000(2 * 4); ! 3810: makefromsr (); ! 3811: printf ("\tm68k_setstopped ();\n"); ! 3812: sync_m68k_pc (); ! 3813: // STOP does not prefetch anything ! 3814: did_prefetch = -1; ! 3815: break; ! 3816: case i_LPSTOP: /* 68060 */ ! 3817: printf ("\tuae_u16 sw = %s (2);\n", srcwi); ! 3818: printf ("\tuae_u16 sr;\n"); ! 3819: printf ("\tif (sw != (0x100|0x80|0x40)) { Exception (4); goto %s; }\n", endlabelstr); ! 3820: printf ("\tsr = %s (4);\n", srcwi); ! 3821: printf ("\tif (!(sr & 0x8000)) { Exception (8); goto %s; }\n", endlabelstr); ! 3822: printf ("\tregs.sr = sr;\n"); ! 3823: makefromsr (); ! 3824: printf ("\tm68k_setstopped();\n"); ! 3825: m68k_pc_offset += 4; ! 3826: sync_m68k_pc (); ! 3827: fill_prefetch_full (); ! 3828: break; ! 3829: case i_RTE: ! 3830: addop_ce020 (curi, 0); ! 3831: next_level_000 (); ! 3832: if (cpu_level == 0) { ! 3833: genamode (NULL, Aipi, "7", sz_word, "sr", 1, 0, GF_NOREFILL); ! 3834: genamode (NULL, Aipi, "7", sz_long, "pc", 1, 0, GF_NOREFILL); ! 3835: printf ("\tregs.sr = sr;\n"); ! 3836: printf ("\tif (pc & 1) {\n"); ! 3837: printf ("\t\texception3i (0x%04X, pc);\n", opcode); ! 3838: printf ("\t\tgoto %s;\n", endlabelstr); ! 3839: printf ("\t}\n"); ! 3840: setpc ("pc"); ! 3841: makefromsr (); ! 3842: } else if (cpu_level == 1 && using_prefetch) { ! 3843: int old_brace_level = n_braces; ! 3844: printf ("\tuae_u16 newsr; uae_u32 newpc;\n"); ! 3845: printf ("\tfor (;;) {\n"); ! 3846: printf ("\t\tuaecptr a = m68k_areg (regs, 7);\n"); ! 3847: printf ("\t\tuae_u16 sr = %s (a);\n", srcw); ! 3848: count_read++; ! 3849: printf ("\t\tuae_u32 pc = %s (a + 2) << 16; pc |= %s (a + 4);\n", srcw, srcw); ! 3850: count_read += 2; ! 3851: printf ("\t\tuae_u16 format = %s (a + 2 + 4);\n", srcw); ! 3852: count_read++; ! 3853: printf ("\t\tint frame = format >> 12;\n"); ! 3854: printf ("\t\tint offset = 8;\n"); ! 3855: printf ("\t\tnewsr = sr; newpc = pc;\n"); ! 3856: printf ("\t\tif (frame == 0x0) { m68k_areg (regs, 7) += offset; break; }\n"); ! 3857: printf ("\t\telse if (frame == 0x8) { m68k_areg (regs, 7) += offset + 50; break; }\n"); ! 3858: printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14); goto %s; }\n", endlabelstr); ! 3859: printf ("\t\tregs.sr = newsr; MakeFromSR ();\n}\n"); ! 3860: pop_braces (old_brace_level); ! 3861: printf ("\tregs.sr = newsr;\n"); ! 3862: makefromsr (); ! 3863: printf ("\tif (newpc & 1) {\n"); ! 3864: printf ("\t\texception3i (0x%04X, newpc);\n", opcode); ! 3865: printf ("\t\tgoto %s;\n", endlabelstr); ! 3866: printf ("\t}\n"); ! 3867: setpc ("newpc"); ! 3868: check_ipl (); ! 3869: need_endlabel = 1; ! 3870: } else { ! 3871: int old_brace_level = n_braces; ! 3872: printf ("\tuae_u16 newsr; uae_u32 newpc;\n"); ! 3873: printf ("\tfor (;;) {\n"); ! 3874: printf ("\t\tuaecptr a = m68k_areg (regs, 7);\n"); ! 3875: printf ("\t\tuae_u16 sr = %s (a);\n", srcw); ! 3876: count_read++; ! 3877: printf ("\t\tuae_u32 pc = %s (a + 2);\n", srcl); ! 3878: count_read += 2; ! 3879: printf ("\t\tuae_u16 format = %s (a + 2 + 4);\n", srcw); ! 3880: count_read++; ! 3881: printf ("\t\tint frame = format >> 12;\n"); ! 3882: printf ("\t\tint offset = 8;\n"); ! 3883: printf ("\t\tnewsr = sr; newpc = pc;\n"); ! 3884: addcycles_ce020 (6); ! 3885: printf ("\t\tif (frame == 0x0) { m68k_areg (regs, 7) += offset; break; }\n"); ! 3886: printf ("\t\telse if (frame == 0x1) { m68k_areg (regs, 7) += offset; }\n"); ! 3887: printf ("\t\telse if (frame == 0x2) { m68k_areg (regs, 7) += offset + 4; break; }\n"); ! 3888: if (cpu_level >= 4) { ! 3889: printf ("\t\telse if (frame == 0x3) { m68k_areg (regs, 7) += offset + 4; break; }\n"); ! 3890: } ! 3891: if (using_mmu == 68060) { ! 3892: printf ("\t\telse if (frame == 0x4) { m68k_do_rte_mmu060 (a); m68k_areg (regs, 7) += offset + 8; break; }\n"); ! 3893: } else if (cpu_level >= 4) { ! 3894: printf ("\t\telse if (frame == 0x4) { m68k_areg (regs, 7) += offset + 8; break; }\n"); ! 3895: } ! 3896: if (cpu_level == 1) // 68010 only ! 3897: printf ("\t\telse if (frame == 0x8) { m68k_areg (regs, 7) += offset + 50; break; }\n"); ! 3898: if (using_mmu == 68040) { ! 3899: printf ("\t\telse if (frame == 0x7) { m68k_do_rte_mmu040 (a); m68k_areg (regs, 7) += offset + 52; break; }\n"); ! 3900: } else if (cpu_level >= 4) { ! 3901: printf ("\t\telse if (frame == 0x7) { m68k_areg (regs, 7) += offset + 52; break; }\n"); ! 3902: } ! 3903: if (cpu_level == 2 || cpu_level == 3) { // 68020/68030 only ! 3904: printf ("\t\telse if (frame == 0x9) { m68k_areg (regs, 7) += offset + 12; break; }\n"); ! 3905: if (using_mmu == 68030) { ! 3906: printf ("\t\telse if (frame == 0xa) { m68k_do_rte_mmu030 (a); break; }\n"); ! 3907: printf ("\t\telse if (frame == 0xb) { m68k_do_rte_mmu030 (a); break; }\n"); ! 3908: } else { ! 3909: printf ("\t\telse if (frame == 0xa) { m68k_areg (regs, 7) += offset + 24; break; }\n"); ! 3910: printf ("\t\telse if (frame == 0xb) { m68k_areg (regs, 7) += offset + 84; break; }\n"); ! 3911: } ! 3912: } ! 3913: printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14); goto %s; }\n", endlabelstr); ! 3914: printf ("\t\tregs.sr = newsr;\n"); ! 3915: makefromsr (); ! 3916: printf ("}\n"); ! 3917: pop_braces (old_brace_level); ! 3918: printf ("\tregs.sr = newsr;\n"); ! 3919: addcycles_ce020 (4); ! 3920: makefromsr (); ! 3921: printf ("\tif (newpc & 1) {\n"); ! 3922: printf ("\t\texception3i (0x%04X, newpc);\n", opcode); ! 3923: printf ("\t\tgoto %s;\n", endlabelstr); ! 3924: printf ("\t}\n"); ! 3925: setpc ("newpc"); ! 3926: check_ipl (); ! 3927: need_endlabel = 1; ! 3928: } ! 3929: /* PC is set and prefetch filled. */ ! 3930: clear_m68k_offset(); ! 3931: tail_ce020_done = true; ! 3932: fill_prefetch_full (); ! 3933: branch_inst = 1; ! 3934: next_cpu_level = cpu_level - 1; ! 3935: break; ! 3936: case i_RTD: ! 3937: addop_ce020 (curi, 0); ! 3938: if (using_mmu) { ! 3939: genamode (curi, curi->smode, "srcreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); ! 3940: genamode (NULL, Aipi, "7", sz_long, "pc", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); ! 3941: printf ("\tm68k_areg(regs, 7) += offs;\n"); ! 3942: } else { ! 3943: genamode (NULL, Aipi, "7", sz_long, "pc", 1, 0, 0); ! 3944: genamode (curi, curi->smode, "srcreg", curi->size, "offs", 1, 0, 0); ! 3945: printf ("\tm68k_areg (regs, 7) += offs;\n"); ! 3946: } ! 3947: printf ("\tif (pc & 1) {\n"); ! 3948: printf ("\t\texception3i (0x%04X, pc);\n", opcode); ! 3949: printf ("\t\tgoto %s;\n", endlabelstr); ! 3950: printf ("\t}\n"); ! 3951: setpc ("pc"); ! 3952: /* PC is set and prefetch filled. */ ! 3953: clear_m68k_offset(); ! 3954: tail_ce020_done = true; ! 3955: fill_prefetch_full (); ! 3956: need_endlabel = 1; ! 3957: branch_inst = 1; ! 3958: break; ! 3959: case i_LINK: ! 3960: // ce confirmed ! 3961: if (using_mmu) { ! 3962: addmmufixup ("srcreg"); ! 3963: genamode (NULL, curi->dmode, "dstreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); ! 3964: genamode (NULL, Apdi, "7", sz_long, "old", GENA_GETV_FETCH_ALIGN, GENA_MOVEM_DO_INC, 0); ! 3965: genamode (NULL, curi->smode, "srcreg", sz_long, "src", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0); ! 3966: genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src"); ! 3967: printf ("\tm68k_areg(regs, 7) += offs;\n"); ! 3968: genastore ("src", Apdi, "7", sz_long, "old"); ! 3969: } else { ! 3970: addop_ce020 (curi, 0); ! 3971: genamode (NULL, Apdi, "7", sz_long, "old", 2, 0, GF_AA); ! 3972: genamode (NULL, curi->smode, "srcreg", sz_long, "src", 1, 0, GF_AA); ! 3973: genamode (NULL, curi->dmode, "dstreg", curi->size, "offs", 1, 0, 0); ! 3974: genastore ("src", Apdi, "7", sz_long, "old"); ! 3975: genastore ("m68k_areg (regs, 7)", curi->smode, "srcreg", sz_long, "src"); ! 3976: printf ("\tm68k_areg (regs, 7) += offs;\n"); ! 3977: fill_prefetch_next (); ! 3978: } ! 3979: break; ! 3980: case i_UNLK: ! 3981: // ce confirmed ! 3982: if (using_mmu) { ! 3983: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3984: printf ("\tuae_s32 old = %s (src);\n", srcl); ! 3985: printf ("\tm68k_areg (regs, 7) = src + 4;\n"); ! 3986: printf ("\tm68k_areg (regs, srcreg) = old;\n"); ! 3987: } else { ! 3988: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 3989: printf ("\tm68k_areg (regs, 7) = src;\n"); ! 3990: genamode (NULL, Aipi, "7", sz_long, "old", 1, 0, 0); ! 3991: fill_prefetch_next (); ! 3992: genastore ("old", curi->smode, "srcreg", curi->size, "src"); ! 3993: } ! 3994: break; ! 3995: case i_RTS: ! 3996: addop_ce020 (curi, 0); ! 3997: printf ("\tuaecptr pc = %s;\n", getpc); ! 3998: if (using_indirect > 0 && !using_ce020 && !using_prefetch_020 && !using_ce) { ! 3999: printf("\tm68k_do_rtsi_jit ();\n"); ! 4000: } else if (using_ce020 == 1) { ! 4001: add_head_cycs (1); ! 4002: printf ("\tm68k_do_rts_ce020 ();\n"); ! 4003: } else if (using_ce020 == 2) { ! 4004: add_head_cycs (1); ! 4005: printf ("\tm68k_do_rts_ce030 ();\n"); ! 4006: } else if (using_ce) { ! 4007: printf ("\tm68k_do_rts_ce ();\n"); ! 4008: } else if (using_mmu) { ! 4009: printf ("\tm68k_do_rts_mmu%s ();\n", mmu_postfix); ! 4010: } else if (using_prefetch || using_prefetch_020) { ! 4011: printf ("\tm68k_do_rtsi ();\n"); ! 4012: } else { ! 4013: printf ("\tm68k_do_rts ();\n"); ! 4014: } ! 4015: printf ("\tif (%s & 1) {\n", getpc); ! 4016: printf ("\t\tuaecptr faultpc = %s;\n", getpc); ! 4017: setpc ("pc"); ! 4018: printf ("\t\texception3i (0x%04X, faultpc);\n", opcode); ! 4019: printf ("\t\tgoto %s;\n", endlabelstr); ! 4020: printf ("\t}\n"); ! 4021: count_read += 2; ! 4022: clear_m68k_offset(); ! 4023: fill_prefetch_full (); ! 4024: need_endlabel = 1; ! 4025: branch_inst = 1; ! 4026: break; ! 4027: case i_TRAPV: ! 4028: sync_m68k_pc (); ! 4029: fill_prefetch_next (); ! 4030: printf ("\tif (GET_VFLG ()) {\n"); ! 4031: printf ("\t\tException (7);\n"); ! 4032: printf ("\t\tgoto %s;\n", endlabelstr); ! 4033: printf ("\t}\n"); ! 4034: need_endlabel = 1; ! 4035: break; ! 4036: case i_RTR: ! 4037: printf ("\tuaecptr oldpc = %s;\n", getpc); ! 4038: printf ("\tMakeSR ();\n"); ! 4039: genamode (NULL, Aipi, "7", sz_word, "sr", 1, 0, 0); ! 4040: genamode (NULL, Aipi, "7", sz_long, "pc", 1, 0, 0); ! 4041: printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n"); ! 4042: printf ("\tregs.sr |= sr;\n"); ! 4043: setpc ("pc"); ! 4044: makefromsr (); ! 4045: printf ("\tif (%s & 1) {\n", getpc); ! 4046: printf ("\t\tuaecptr faultpc = %s;\n", getpc); ! 4047: setpc ("oldpc"); ! 4048: printf ("\t\texception3i (0x%04X, faultpc);\n", opcode); ! 4049: printf ("\t\tgoto %s;\n", endlabelstr); ! 4050: printf ("\t}\n"); ! 4051: clear_m68k_offset(); ! 4052: fill_prefetch_full (); ! 4053: need_endlabel = 1; ! 4054: branch_inst = 1; ! 4055: tail_ce020_done = true; ! 4056: break; ! 4057: case i_JSR: ! 4058: // possible idle cycle, prefetch from new address, stack high return addr, stack low, prefetch ! 4059: no_prefetch_ce020 = true; ! 4060: genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL); ! 4061: start_brace (); ! 4062: printf ("\tuaecptr oldpc = %s + %d;\n", getpc, m68k_pc_offset); ! 4063: if (using_exception_3) { ! 4064: printf ("\tif (srca & 1) {\n"); ! 4065: printf ("\t\texception3i (opcode, srca);\n"); ! 4066: printf ("\t\tgoto %s;\n", endlabelstr); ! 4067: printf ("\t}\n"); ! 4068: need_endlabel = 1; ! 4069: } ! 4070: if (using_mmu) { ! 4071: printf ("\t%s (m68k_areg (regs, 7) - 4, oldpc);\n", dstl); ! 4072: printf ("\tm68k_areg (regs, 7) -= 4;\n"); ! 4073: setpc ("srca"); ! 4074: clear_m68k_offset(); ! 4075: } else { ! 4076: if (curi->smode == Ad16 || curi->smode == absw || curi->smode == PC16) ! 4077: addcycles000 (2); ! 4078: if (curi->smode == Ad8r || curi->smode == PC8r) { ! 4079: addcycles000 (6); ! 4080: #ifdef WINUAE_FOR_HATARI ! 4081: /* Hatari : JSR in Ad8r and PC8r mode takes 22 cycles, but on ST it takes 24 cycles */ ! 4082: /* because of an unaligned memory prefetch in this EA mode */ ! 4083: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */ ! 4084: if ( using_prefetch && !using_ce ) ! 4085: addcycles000 (2); ! 4086: #endif ! 4087: if (cpu_level <= 1 && using_prefetch) ! 4088: printf ("\toldpc += 2;\n"); ! 4089: } ! 4090: setpc ("srca"); ! 4091: clear_m68k_offset(); ! 4092: fill_prefetch_1 (0); ! 4093: printf ("\tm68k_areg (regs, 7) -= 4;\n"); ! 4094: if (using_ce || using_prefetch) { ! 4095: printf ("\t%s (m68k_areg (regs, 7), oldpc >> 16);\n", dstw); ! 4096: printf ("\t%s (m68k_areg (regs, 7) + 2, oldpc);\n", dstw); ! 4097: } else { ! 4098: printf ("\t%s (m68k_areg (regs, 7), oldpc);\n", dstl); ! 4099: } ! 4100: } ! 4101: count_write += 2; ! 4102: fill_prefetch_full_020 (); ! 4103: fill_prefetch_next (); ! 4104: branch_inst = 1; ! 4105: break; ! 4106: case i_JMP: ! 4107: no_prefetch_ce020 = true; ! 4108: genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL); ! 4109: if (using_exception_3) { ! 4110: printf ("\tif (srca & 1) {\n"); ! 4111: printf ("\t\texception3i (opcode, srca);\n"); ! 4112: printf ("\t\tgoto %s;\n", endlabelstr); ! 4113: printf ("\t}\n"); ! 4114: need_endlabel = 1; ! 4115: } ! 4116: if (curi->smode == Ad16 || curi->smode == absw || curi->smode == PC16) ! 4117: addcycles000 (2); ! 4118: if (curi->smode == Ad8r || curi->smode == PC8r) { ! 4119: addcycles000 (6); ! 4120: #ifdef WINUAE_FOR_HATARI ! 4121: /* Hatari : JMP in Ad8r and PC8r mode takes 22 cycles, but on ST it takes 24 cycles */ ! 4122: /* because of an unaligned memory prefetch in this EA mode */ ! 4123: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */ ! 4124: if ( using_prefetch && !using_ce ) ! 4125: addcycles000 (2); ! 4126: #endif ! 4127: } ! 4128: setpc ("srca"); ! 4129: clear_m68k_offset(); ! 4130: fill_prefetch_full (); ! 4131: branch_inst = 1; ! 4132: break; ! 4133: case i_BSR: ! 4134: // .b/.w = idle cycle, store high, store low, 2xprefetch ! 4135: if (isce020()) ! 4136: no_prefetch_ce020 = true; ! 4137: printf ("\tuae_s32 s;\n"); ! 4138: if (curi->size == sz_long) { ! 4139: if (next_cpu_level < 1) ! 4140: next_cpu_level = 1; ! 4141: } ! 4142: if (curi->size == sz_long && cpu_level < 2) { ! 4143: printf ("\tuae_u32 src = 0xffffffff;\n"); ! 4144: } else { ! 4145: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA|GF_NOREFILL); ! 4146: } ! 4147: printf ("\ts = (uae_s32)src + 2;\n"); ! 4148: if (using_exception_3) { ! 4149: printf ("\tif (src & 1) {\n"); ! 4150: printf ("\t\texception3b (opcode, %s + s, 0, 1, %s + s);\n", getpc, getpc); ! 4151: printf ("\t\tgoto %s;\n", endlabelstr); ! 4152: printf ("\t}\n"); ! 4153: need_endlabel = 1; ! 4154: } ! 4155: addcycles000 (2); ! 4156: if (using_indirect > 0 && !using_ce020 && !using_prefetch_020 && !using_ce) { ! 4157: printf("\tm68k_do_bsri_jit (%s + %d, s);\n", getpc, m68k_pc_offset); ! 4158: } else if (using_ce020 == 1) { ! 4159: printf ("\tm68k_do_bsr_ce020 (%s + %d, s);\n", getpc, m68k_pc_offset); ! 4160: } else if (using_ce020 == 2) { ! 4161: printf ("\tm68k_do_bsr_ce030 (%s + %d, s);\n", getpc, m68k_pc_offset); ! 4162: } else if (using_ce) { ! 4163: printf ("\tm68k_do_bsr_ce (%s + %d, s);\n", getpc, m68k_pc_offset); ! 4164: } else if (using_mmu) { ! 4165: printf ("\tm68k_do_bsr_mmu%s (%s + %d, s);\n", mmu_postfix, getpc, m68k_pc_offset); ! 4166: } else if (using_prefetch || using_prefetch_020) { ! 4167: printf ("\tm68k_do_bsri (%s + %d, s);\n", getpc, m68k_pc_offset); ! 4168: } else { ! 4169: printf ("\tm68k_do_bsr (%s + %d, s);\n", getpc, m68k_pc_offset); ! 4170: } ! 4171: count_write += 2; ! 4172: clear_m68k_offset(); ! 4173: fill_prefetch_full (); ! 4174: branch_inst = 1; ! 4175: break; ! 4176: case i_Bcc: ! 4177: tail_ce020_done = true; ! 4178: if (curi->size == sz_long) { ! 4179: if (cpu_level < 2) { ! 4180: addcycles000 (2); ! 4181: printf ("\tif (cctrue (%d)) {\n", curi->cc); ! 4182: printf ("\t\texception3i (opcode, %s + 1);\n", getpc); ! 4183: printf ("\t\tgoto %s;\n", endlabelstr); ! 4184: printf ("\t}\n"); ! 4185: sync_m68k_pc (); ! 4186: addcycles000 (2); ! 4187: irc2ir (); ! 4188: fill_prefetch_2 (); ! 4189: need_endlabel = 1; ! 4190: goto bccl_not68020; ! 4191: } else { ! 4192: if (next_cpu_level < 1) ! 4193: next_cpu_level = 1; ! 4194: } ! 4195: } ! 4196: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | (cpu_level < 2 ? GF_NOREFILL : 0)); ! 4197: addcycles000 (2); ! 4198: printf ("\tif (!cctrue (%d)) goto didnt_jump;\n", curi->cc); ! 4199: if (using_exception_3) { ! 4200: printf ("\tif (src & 1) {\n"); ! 4201: printf ("\t\texception3i (opcode, %s + 2 + (uae_s32)src);\n", getpc); ! 4202: printf ("\t\tgoto %s;\n", endlabelstr); ! 4203: printf ("\t}\n"); ! 4204: need_endlabel = 1; ! 4205: } ! 4206: push_ins_cnt(); ! 4207: if (using_prefetch) { ! 4208: incpc ("(uae_s32)src + 2"); ! 4209: fill_prefetch_full_000 (); ! 4210: if (using_ce) ! 4211: printf ("\treturn;\n"); ! 4212: else ! 4213: printf ("\treturn %d;\n", adjust_cycles(10)); ! 4214: } else { ! 4215: incpc ("(uae_s32)src + 2"); ! 4216: add_head_cycs (6); ! 4217: fill_prefetch_full_020 (); ! 4218: returncycles ("\t", 10); ! 4219: } ! 4220: pop_ins_cnt(); ! 4221: printf ("didnt_jump:;\n"); ! 4222: need_endlabel = 1; ! 4223: sync_m68k_pc (); ! 4224: addcycles000 (2); ! 4225: get_prefetch_020_continue (); ! 4226: if (curi->size == sz_byte) { ! 4227: irc2ir (); ! 4228: add_head_cycs (4); ! 4229: fill_prefetch_2 (); ! 4230: } else if (curi->size == sz_word) { ! 4231: add_head_cycs (6); ! 4232: fill_prefetch_full_000 (); ! 4233: } else { ! 4234: add_head_cycs (6); ! 4235: fill_prefetch_full_000 (); ! 4236: } ! 4237: insn_n_cycles = curi->size == sz_byte ? 8 : 12; ! 4238: branch_inst = 1; ! 4239: bccl_not68020: ! 4240: break; ! 4241: case i_LEA: ! 4242: if (curi->smode == Ad8r || curi->smode == PC8r) ! 4243: addcycles000 (2); ! 4244: genamodedual (curi, ! 4245: curi->smode, "srcreg", curi->size, "src", 0, GF_AA, ! 4246: curi->dmode, "dstreg", curi->size, "dst", 2, GF_AA); ! 4247: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA); ! 4248: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_AA); ! 4249: if (curi->smode == Ad8r || curi->smode == PC8r) { ! 4250: addcycles000 (2); ! 4251: #ifdef WINUAE_FOR_HATARI ! 4252: /* Hatari : LEA in Ad8r and PC8r mode takes 12 cycles, but on ST it takes 14 cycles */ ! 4253: /* because of an unaligned memory prefetch in this EA mode */ ! 4254: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */ ! 4255: if ( using_prefetch && !using_ce ) ! 4256: addcycles000 (2); ! 4257: #endif ! 4258: } ! 4259: fill_prefetch_next (); ! 4260: genastore ("srca", curi->dmode, "dstreg", curi->size, "dst"); ! 4261: break; ! 4262: case i_PEA: ! 4263: if (curi->smode == Ad8r || curi->smode == PC8r) ! 4264: addcycles000 (2); ! 4265: genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA); ! 4266: genamode (NULL, Apdi, "7", sz_long, "dst", 2, 0, GF_AA); ! 4267: if (!(curi->smode == absw || curi->smode == absl)) ! 4268: fill_prefetch_next (); ! 4269: if (curi->smode == Ad8r || curi->smode == PC8r) { ! 4270: addcycles000 (2); ! 4271: #ifdef WINUAE_FOR_HATARI ! 4272: /* Hatari : PEA in Ad8r and PC8r mode takes 20 cycles, but on ST it takes 22 cycles */ ! 4273: /* because of an unaligned memory prefetch in this EA mode */ ! 4274: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */ ! 4275: if ( using_prefetch && !using_ce ) ! 4276: addcycles000 (2); ! 4277: #endif ! 4278: } ! 4279: genastore ("srca", Apdi, "7", sz_long, "dst"); ! 4280: if ((curi->smode == absw || curi->smode == absl)) ! 4281: fill_prefetch_next (); ! 4282: break; ! 4283: case i_DBcc: ! 4284: // cc true: idle cycle, prefetch ! 4285: // cc false, counter expired: idle cycle, prefetch (from branch address), 2xprefetch (from next address) ! 4286: // cc false, counter not expired: idle cycle, prefetch ! 4287: tail_ce020_done = true; ! 4288: genamodedual (curi, ! 4289: curi->smode, "srcreg", curi->size, "src", 1, GF_AA | (cpu_level < 2 ? GF_NOREFILL : 0), ! 4290: curi->dmode, "dstreg", curi->size, "offs", 1, GF_AA | (cpu_level < 2 ? GF_NOREFILL : 0)); ! 4291: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | GF_NOREFILL); ! 4292: //genamode (curi, curi->dmode, "dstreg", curi->size, "offs", 1, 0, GF_AA | GF_NOREFILL); ! 4293: printf ("\tuaecptr oldpc = %s;\n", getpc); ! 4294: addcycles000 (2); ! 4295: push_ins_cnt(); ! 4296: printf ("\tif (!cctrue (%d)) {\n", curi->cc); ! 4297: incpc ("(uae_s32)offs + 2"); ! 4298: printf ("\t"); ! 4299: fill_prefetch_1 (0); ! 4300: printf ("\t"); ! 4301: genastore ("(src - 1)", curi->smode, "srcreg", curi->size, "src"); ! 4302: ! 4303: printf ("\t\tif (src) {\n"); ! 4304: if (using_exception_3) { ! 4305: printf ("\t\t\tif (offs & 1) {\n"); ! 4306: printf ("\t\t\t\texception3i (opcode, %s + 2 + (uae_s32)offs + 2);\n", getpc); ! 4307: printf ("\t\t\t\tgoto %s;\n", endlabelstr); ! 4308: printf ("\t\t\t}\n"); ! 4309: need_endlabel = 1; ! 4310: } ! 4311: irc2ir (); ! 4312: add_head_cycs (6); ! 4313: fill_prefetch_1 (2); ! 4314: fill_prefetch_full_020 (); ! 4315: returncycles ("\t\t\t", 10); ! 4316: printf ("\t\t}\n"); ! 4317: add_head_cycs (10); ! 4318: addcycles000_nonce("\t\t", 2 + 2); ! 4319: printf ("\t} else {\n"); ! 4320: addcycles000_onlyce(2); ! 4321: addcycles000_nonce("\t\t", 2); ! 4322: printf ("\t}\n"); ! 4323: pop_ins_cnt(); ! 4324: setpc ("oldpc + %d", m68k_pc_offset); ! 4325: clear_m68k_offset(); ! 4326: get_prefetch_020_continue (); ! 4327: fill_prefetch_full_000 (); ! 4328: insn_n_cycles = 12; ! 4329: need_endlabel = 1; ! 4330: branch_inst = 1; ! 4331: break; ! 4332: case i_Scc: ! 4333: // confirmed ! 4334: next_level_000 (); ! 4335: genamode (curi, curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0); ! 4336: start_brace (); ! 4337: fill_prefetch_next(); ! 4338: start_brace (); ! 4339: printf ("\tint val = cctrue (%d) ? 0xff : 0;\n", curi->cc); ! 4340: if (isreg (curi->smode)) { ! 4341: if (using_ce) ! 4342: printf ("\tint cycles = val ? 2 : 0;\n"); ! 4343: addcycles000_3 ("\t"); ! 4344: addcycles000_nonces("\t", "(val ? 2 : 0)"); ! 4345: } ! 4346: genastore ("val", curi->smode, "srcreg", curi->size, "src"); ! 4347: break; ! 4348: case i_DIVU: ! 4349: tail_ce020_done = true; ! 4350: genamodedual (curi, ! 4351: curi->smode, "srcreg", sz_word, "src", 1, 0, ! 4352: curi->dmode, "dstreg", sz_long, "dst", 1, 0); ! 4353: printf ("\tCLEAR_CZNV ();\n"); ! 4354: printf ("\tif (src == 0) {\n"); ! 4355: if (cpu_level > 1) ! 4356: printf ("\t\tdivbyzero_special (0, dst);\n"); ! 4357: incpc ("%d", m68k_pc_offset); ! 4358: printf ("\t\tException (5);\n"); ! 4359: printf ("\t\tgoto %s;\n", endlabelstr); ! 4360: printf ("\t} else {\n"); ! 4361: printf ("\t\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n"); ! 4362: printf ("\t\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n"); ! 4363: if (using_ce) { ! 4364: start_brace (); ! 4365: printf ("\t\tint cycles = (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) - 4;\n"); ! 4366: addcycles000_3 ("\t\t"); ! 4367: } ! 4368: addcycles000_nonces("\t\t", "(getDivu68kCycles((uae_u32)dst, (uae_u16)src)) - 4"); ! 4369: fill_prefetch_next (); ! 4370: /* The N flag appears to be set each time there is an overflow. ! 4371: * Weird. but 68020 only sets N when dst is negative.. */ ! 4372: printf ("\t\tif (newv > 0xffff) {\n"); ! 4373: printf ("\t\t\tSET_VFLG (1);\n"); 1.1.1.4 root 4374: #ifdef UNDEF68020 1.1.1.5 ! root 4375: if (cpu_level >= 2) ! 4376: printf ("\t\t\tif (currprefs.cpu_level == 0 || dst < 0) SET_NFLG (®s, 1);\n"); ! 4377: else /* ??? some 68000 revisions may not set NFLG when overflow happens.. */ 1.1.1.4 root 4378: #endif 1.1.1.5 ! root 4379: printf ("\t\t\tSET_NFLG (1);\n"); ! 4380: printf ("\t\t} else {\n"); ! 4381: printf ("\t\t"); genflags (flag_logical, sz_word, "newv", "", ""); ! 4382: printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); ! 4383: printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); ! 4384: printf ("\t\t}\n"); ! 4385: sync_m68k_pc (); ! 4386: printf ("\t}\n"); ! 4387: count_ncycles++; ! 4388: insn_n_cycles += 136 - (136 - 76) / 2; /* average */ ! 4389: need_endlabel = 1; ! 4390: tail_ce020_done = false; ! 4391: returntail (false); ! 4392: break; ! 4393: case i_DIVS: ! 4394: tail_ce020_done = true; ! 4395: genamodedual (curi, ! 4396: curi->smode, "srcreg", sz_word, "src", 1, 0, ! 4397: curi->dmode, "dstreg", sz_long, "dst", 1, 0); ! 4398: printf ("\tif (src == 0) {\n"); ! 4399: if (cpu_level > 1) ! 4400: printf ("\t\tdivbyzero_special (1, dst);\n"); ! 4401: incpc ("%d", m68k_pc_offset); ! 4402: printf ("\t\tException (5);\n"); ! 4403: printf ("\t\tgoto %s;\n", endlabelstr); ! 4404: printf ("\t}\n"); ! 4405: printf ("\tCLEAR_CZNV ();\n"); ! 4406: if (using_ce) { ! 4407: start_brace (); ! 4408: printf ("\t\tint cycles = (getDivs68kCycles((uae_s32)dst, (uae_s16)src)) - 4;\n"); ! 4409: addcycles000_3 ("\t\t"); ! 4410: } ! 4411: addcycles000_nonces("\t\t", "(getDivs68kCycles((uae_s32)dst, (uae_s16)src)) - 4"); ! 4412: fill_prefetch_next (); ! 4413: printf ("\tif (dst == 0x80000000 && src == -1) {\n"); ! 4414: printf ("\t\tSET_VFLG (1);\n"); ! 4415: printf ("\t\tSET_NFLG (1);\n"); ! 4416: printf ("\t} else {\n"); ! 4417: printf ("\t\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n"); ! 4418: printf ("\t\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n"); ! 4419: printf ("\t\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {\n"); ! 4420: printf ("\t\t\tSET_VFLG (1);\n"); 1.1.1.4 root 4421: #ifdef UNDEF68020 1.1.1.5 ! root 4422: if (cpu_level > 0) ! 4423: printf ("\t\t\tif (currprefs.cpu_level == 0) SET_NFLG (®s, 1);\n"); ! 4424: else 1.1.1.4 root 4425: #endif 1.1.1.5 ! root 4426: printf ("\t\t\tSET_NFLG (1);\n"); ! 4427: printf ("\t\t} else {\n"); ! 4428: printf ("\t\t\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n"); ! 4429: genflags (flag_logical, sz_word, "newv", "", ""); ! 4430: printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n"); ! 4431: printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); ! 4432: printf ("\t\t}\n"); ! 4433: printf ("\t}\n"); ! 4434: sync_m68k_pc (); ! 4435: count_ncycles++; ! 4436: insn_n_cycles += 156 - (156 - 120) / 2; /* average */ ! 4437: need_endlabel = 1; ! 4438: tail_ce020_done = false; ! 4439: returntail (false); ! 4440: break; ! 4441: case i_MULU: ! 4442: genamodedual (curi, ! 4443: curi->smode, "srcreg", sz_word, "src", 1, 0, ! 4444: curi->dmode, "dstreg", sz_word, "dst", 1, 0); ! 4445: fill_prefetch_next(); ! 4446: start_brace (); ! 4447: printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n"); ! 4448: if (using_ce) ! 4449: printf ("\tint cycles = 38 - 4, bits;\n"); ! 4450: else if (using_prefetch) ! 4451: printf ("\tint bits;\n"); ! 4452: genflags (flag_logical, sz_long, "newv", "", ""); ! 4453: if (using_ce) { ! 4454: printf ("\tfor(bits = 0; bits < 16 && src; bits++, src >>= 1)\n"); ! 4455: printf ("\t\tif (src & 1) cycles += 2;\n"); ! 4456: addcycles000_3 ("\t"); ! 4457: } ! 4458: addcycles000_nonce("\tfor(bits = 0; bits < 16 && src; bits++, src >>= 1)\n\t\tif (src & 1) ", 2); ! 4459: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); ! 4460: sync_m68k_pc (); ! 4461: count_cycles += 38 - 4; ! 4462: count_ncycles++; ! 4463: insn_n_cycles += (70 - 38) / 2 + 38; /* average */ ! 4464: break; ! 4465: case i_MULS: ! 4466: genamodedual (curi, ! 4467: curi->smode, "srcreg", sz_word, "src", 1, 0, ! 4468: curi->dmode, "dstreg", sz_word, "dst", 1, 0); ! 4469: fill_prefetch_next(); ! 4470: start_brace (); ! 4471: printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n"); ! 4472: if (using_ce) { ! 4473: printf ("\tint cycles = 38 - 4, bits;\n"); ! 4474: printf ("\tuae_u32 usrc;\n"); ! 4475: } else if (using_prefetch) { ! 4476: printf ("\tint bits;\n"); ! 4477: printf ("\tuae_u32 usrc;\n"); ! 4478: } ! 4479: genflags (flag_logical, sz_long, "newv", "", ""); ! 4480: if (using_ce) { ! 4481: printf ("\tusrc = ((uae_u32)src) << 1;\n"); ! 4482: printf ("\tfor(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1)\n"); ! 4483: printf ("\t\tif ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2;\n"); ! 4484: addcycles000_3 ("\t"); ! 4485: } ! 4486: addcycles000_nonce("\tusrc = ((uae_u32)src) << 1;\n\tfor(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1)\n\t\tif ((usrc & 3) == 1 || (usrc & 3) == 2) ", 2); ! 4487: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst"); ! 4488: count_cycles += 38 - 4; ! 4489: count_ncycles++; ! 4490: insn_n_cycles += (70 - 38) / 2 + 38; /* average */ ! 4491: break; ! 4492: case i_CHK: ! 4493: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 4494: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); ! 4495: sync_m68k_pc (); ! 4496: addcycles000 (4); ! 4497: printf ("\tif (dst > src) {\n"); ! 4498: printf ("\t\tSET_NFLG (0);\n"); ! 4499: printf ("\t\tException (6);\n"); ! 4500: printf ("\t\tgoto %s;\n", endlabelstr); ! 4501: printf ("\t}\n"); ! 4502: addcycles000 (2); ! 4503: printf ("\tif ((uae_s32)dst < 0) {\n"); ! 4504: printf ("\t\tSET_NFLG (1);\n"); ! 4505: printf ("\t\tException (6);\n"); ! 4506: printf ("\t\tgoto %s;\n", endlabelstr); ! 4507: printf ("\t}\n"); ! 4508: fill_prefetch_next (); ! 4509: need_endlabel = 1; ! 4510: break; ! 4511: case i_CHK2: ! 4512: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 4513: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0); ! 4514: fill_prefetch_0 (); ! 4515: printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n"); ! 4516: switch (curi->size) { ! 4517: case sz_byte: ! 4518: printf ("\tlower = (uae_s32)(uae_s8)%s (dsta); upper = (uae_s32)(uae_s8)%s (dsta + 1);\n", srcb, srcb); ! 4519: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n"); ! 4520: break; ! 4521: case sz_word: ! 4522: printf ("\tlower = (uae_s32)(uae_s16)%s (dsta); upper = (uae_s32)(uae_s16)%s (dsta + 2);\n", srcw, srcw); ! 4523: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n"); ! 4524: break; ! 4525: case sz_long: ! 4526: printf ("\tlower = %s (dsta); upper = %s (dsta + 4);\n", srcl, srcl); ! 4527: break; ! 4528: default: ! 4529: term (); ! 4530: } ! 4531: printf ("\tSET_ZFLG (upper == reg || lower == reg);\n"); ! 4532: printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n"); ! 4533: printf ("\tif ((extra & 0x800) && GET_CFLG ()) { Exception (6); goto %s; }\n}\n", endlabelstr); ! 4534: need_endlabel = 1; ! 4535: break; ! 4536: ! 4537: case i_ASR: ! 4538: genamodedual (curi, ! 4539: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4540: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4541: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4542: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4543: fill_prefetch_next(); ! 4544: start_brace (); ! 4545: switch (curi->size) { ! 4546: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4547: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4548: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4549: default: term (); ! 4550: } ! 4551: printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1); ! 4552: printf ("\tint ccnt = cnt & 63;\n"); ! 4553: printf ("\tcnt &= 63;\n"); ! 4554: printf ("\tCLEAR_CZNV ();\n"); ! 4555: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); ! 4556: printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size)); ! 4557: printf ("\t\tSET_CFLG (sign);\n"); ! 4558: duplicate_carry (1); ! 4559: if (source_is_imm1_8 (curi)) ! 4560: printf ("\t} else {\n"); ! 4561: else ! 4562: printf ("\t} else if (cnt > 0) {\n"); ! 4563: printf ("\t\tval >>= cnt - 1;\n"); ! 4564: printf ("\t\tSET_CFLG (val & 1);\n"); ! 4565: duplicate_carry (1); ! 4566: printf ("\t\tval >>= 1;\n"); ! 4567: printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n", ! 4568: bit_mask (curi->size), ! 4569: bit_size (curi->size)); ! 4570: printf ("\t\tval &= %s;\n", bit_mask (curi->size)); ! 4571: printf ("\t}\n"); ! 4572: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4573: shift_ce (curi->dmode, curi->size); ! 4574: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4575: break; ! 4576: case i_ASL: ! 4577: genamodedual (curi, ! 4578: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4579: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4580: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4581: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4582: fill_prefetch_next(); ! 4583: start_brace (); ! 4584: switch (curi->size) { ! 4585: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4586: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4587: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4588: default: term (); ! 4589: } ! 4590: printf ("\tint ccnt = cnt & 63;\n"); ! 4591: printf ("\tcnt &= 63;\n"); ! 4592: printf ("\tCLEAR_CZNV ();\n"); ! 4593: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); ! 4594: printf ("\t\tSET_VFLG (val != 0);\n"); ! 4595: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", ! 4596: bit_size (curi->size)); ! 4597: duplicate_carry (1); ! 4598: printf ("\t\tval = 0;\n"); ! 4599: if (source_is_imm1_8 (curi)) ! 4600: printf ("\t} else {\n"); ! 4601: else ! 4602: printf ("\t} else if (cnt > 0) {\n"); ! 4603: printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n", ! 4604: bit_mask (curi->size), ! 4605: bit_size (curi->size) - 1, ! 4606: bit_mask (curi->size)); ! 4607: printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n"); ! 4608: printf ("\t\tval <<= cnt - 1;\n"); ! 4609: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); ! 4610: duplicate_carry (1); ! 4611: printf ("\t\tval <<= 1;\n"); ! 4612: printf ("\t\tval &= %s;\n", bit_mask (curi->size)); ! 4613: printf ("\t}\n"); ! 4614: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4615: shift_ce (curi->dmode, curi->size); ! 4616: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4617: break; ! 4618: case i_LSR: ! 4619: genamodedual (curi, ! 4620: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4621: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4622: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4623: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4624: fill_prefetch_next(); ! 4625: start_brace (); ! 4626: switch (curi->size) { ! 4627: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4628: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4629: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4630: default: term (); ! 4631: } ! 4632: printf ("\tint ccnt = cnt & 63;\n"); ! 4633: printf ("\tcnt &= 63;\n"); ! 4634: printf ("\tCLEAR_CZNV ();\n"); ! 4635: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); ! 4636: printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n", ! 4637: bit_size (curi->size), bit_size (curi->size) - 1); ! 4638: duplicate_carry (1); ! 4639: printf ("\t\tval = 0;\n"); ! 4640: if (source_is_imm1_8 (curi)) ! 4641: printf ("\t} else {\n"); ! 4642: else ! 4643: printf ("\t} else if (cnt > 0) {\n"); ! 4644: printf ("\t\tval >>= cnt - 1;\n"); ! 4645: printf ("\t\tSET_CFLG (val & 1);\n"); ! 4646: duplicate_carry (1); ! 4647: printf ("\t\tval >>= 1;\n"); ! 4648: printf ("\t}\n"); ! 4649: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4650: shift_ce (curi->dmode, curi->size); ! 4651: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4652: break; ! 4653: case i_LSL: ! 4654: genamodedual (curi, ! 4655: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4656: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4657: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4658: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4659: fill_prefetch_next(); ! 4660: start_brace (); ! 4661: switch (curi->size) { ! 4662: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4663: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4664: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4665: default: term (); ! 4666: } ! 4667: printf ("\tint ccnt = cnt & 63;\n"); ! 4668: printf ("\tcnt &= 63;\n"); ! 4669: printf ("\tCLEAR_CZNV ();\n"); ! 4670: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size)); ! 4671: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", bit_size (curi->size)); ! 4672: duplicate_carry (1); ! 4673: printf ("\t\tval = 0;\n"); ! 4674: if (source_is_imm1_8 (curi)) ! 4675: printf ("\t} else {\n"); ! 4676: else ! 4677: printf ("\t} else if (cnt > 0) {\n"); ! 4678: printf ("\t\tval <<= (cnt - 1);\n"); ! 4679: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); ! 4680: duplicate_carry (1); ! 4681: printf ("\t\tval <<= 1;\n"); ! 4682: printf ("\tval &= %s;\n", bit_mask (curi->size)); ! 4683: printf ("\t}\n"); ! 4684: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4685: shift_ce (curi->dmode, curi->size); ! 4686: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4687: break; ! 4688: case i_ROL: ! 4689: genamodedual (curi, ! 4690: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4691: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4692: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4693: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4694: fill_prefetch_next (); ! 4695: start_brace (); ! 4696: switch (curi->size) { ! 4697: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4698: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4699: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4700: default: term (); ! 4701: } ! 4702: printf ("\tint ccnt = cnt & 63;\n"); ! 4703: printf ("\tcnt &= 63;\n"); ! 4704: printf ("\tCLEAR_CZNV ();\n"); ! 4705: if (source_is_imm1_8 (curi)) ! 4706: printf ("{"); ! 4707: else ! 4708: printf ("\tif (cnt > 0) {\n"); ! 4709: printf ("\tuae_u32 loval;\n"); ! 4710: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1); ! 4711: printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size)); ! 4712: printf ("\tval <<= cnt;\n"); ! 4713: printf ("\tval |= loval;\n"); ! 4714: printf ("\tval &= %s;\n", bit_mask (curi->size)); ! 4715: printf ("\tSET_CFLG (val & 1);\n"); ! 4716: printf ("}\n"); ! 4717: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4718: shift_ce (curi->dmode, curi->size); ! 4719: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4720: break; ! 4721: case i_ROR: ! 4722: genamodedual (curi, ! 4723: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4724: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4725: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4726: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4727: fill_prefetch_next (); ! 4728: start_brace (); ! 4729: switch (curi->size) { ! 4730: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4731: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4732: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4733: default: term (); ! 4734: } ! 4735: printf ("\tint ccnt = cnt & 63;\n"); ! 4736: printf ("\tcnt &= 63;\n"); ! 4737: printf ("\tCLEAR_CZNV ();\n"); ! 4738: if (source_is_imm1_8 (curi)) ! 4739: printf ("{"); ! 4740: else ! 4741: printf ("\tif (cnt > 0) {"); ! 4742: printf ("\tuae_u32 hival;\n"); ! 4743: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1); ! 4744: printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size)); ! 4745: printf ("\tval >>= cnt;\n"); ! 4746: printf ("\tval |= hival;\n"); ! 4747: printf ("\tval &= %s;\n", bit_mask (curi->size)); ! 4748: printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1); ! 4749: printf ("\t}\n"); ! 4750: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4751: shift_ce (curi->dmode, curi->size); ! 4752: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4753: break; ! 4754: case i_ROXL: ! 4755: genamodedual (curi, ! 4756: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4757: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4758: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4759: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4760: fill_prefetch_next (); ! 4761: start_brace (); ! 4762: switch (curi->size) { ! 4763: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4764: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4765: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4766: default: term (); ! 4767: } ! 4768: printf ("\tint ccnt = cnt & 63;\n"); ! 4769: printf ("\tcnt &= 63;\n"); ! 4770: printf ("\tCLEAR_CZNV ();\n"); ! 4771: if (source_is_imm1_8 (curi)) ! 4772: printf ("{"); ! 4773: else { ! 4774: force_range_for_rox ("cnt", curi->size); ! 4775: printf ("\tif (cnt > 0) {\n"); ! 4776: } ! 4777: printf ("\tcnt--;\n"); ! 4778: printf ("\t{\n\tuae_u32 carry;\n"); ! 4779: printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1); ! 4780: printf ("\tcarry = loval & 1;\n"); ! 4781: printf ("\tval = (((val << 1) | GET_XFLG ()) << cnt) | (loval >> 1);\n"); ! 4782: printf ("\tSET_XFLG (carry);\n"); ! 4783: printf ("\tval &= %s;\n", bit_mask (curi->size)); ! 4784: printf ("\t} }\n"); ! 4785: printf ("\tSET_CFLG (GET_XFLG ());\n"); ! 4786: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4787: shift_ce (curi->dmode, curi->size); ! 4788: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4789: break; ! 4790: case i_ROXR: ! 4791: genamodedual (curi, ! 4792: curi->smode, "srcreg", curi->size, "cnt", 1, 0, ! 4793: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW); ! 4794: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0); ! 4795: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW); ! 4796: fill_prefetch_next (); ! 4797: start_brace (); ! 4798: switch (curi->size) { ! 4799: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4800: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4801: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4802: default: term (); ! 4803: } ! 4804: printf ("\tint ccnt = cnt & 63;\n"); ! 4805: printf ("\tcnt &= 63;\n"); ! 4806: printf ("\tCLEAR_CZNV ();\n"); ! 4807: if (source_is_imm1_8 (curi)) ! 4808: printf ("{"); ! 4809: else { ! 4810: force_range_for_rox ("cnt", curi->size); ! 4811: printf ("\tif (cnt > 0) {\n"); ! 4812: } ! 4813: printf ("\tcnt--;\n"); ! 4814: printf ("\t{\n\tuae_u32 carry;\n"); ! 4815: printf ("\tuae_u32 hival = (val << 1) | GET_XFLG ();\n"); ! 4816: printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1); ! 4817: printf ("\tval >>= cnt;\n"); ! 4818: printf ("\tcarry = val & 1;\n"); ! 4819: printf ("\tval >>= 1;\n"); ! 4820: printf ("\tval |= hival;\n"); ! 4821: printf ("\tSET_XFLG (carry);\n"); ! 4822: printf ("\tval &= %s;\n", bit_mask (curi->size)); ! 4823: printf ("\t} }\n"); ! 4824: printf ("\tSET_CFLG (GET_XFLG ());\n"); ! 4825: genflags (flag_logical_noclobber, curi->size, "val", "", ""); ! 4826: shift_ce (curi->dmode, curi->size); ! 4827: genastore ("val", curi->dmode, "dstreg", curi->size, "data"); ! 4828: break; ! 4829: case i_ASRW: ! 4830: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4831: fill_prefetch_next (); ! 4832: start_brace (); ! 4833: switch (curi->size) { ! 4834: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4835: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4836: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4837: default: term (); ! 4838: } ! 4839: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size)); ! 4840: printf ("\tuae_u32 cflg = val & 1;\n"); ! 4841: printf ("\tval = (val >> 1) | sign;\n"); ! 4842: genflags (flag_logical, curi->size, "val", "", ""); ! 4843: printf ("\tSET_CFLG (cflg);\n"); ! 4844: duplicate_carry (0); ! 4845: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4846: break; ! 4847: case i_ASLW: ! 4848: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4849: fill_prefetch_next (); ! 4850: start_brace (); ! 4851: switch (curi->size) { ! 4852: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4853: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4854: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4855: default: term (); ! 4856: } ! 4857: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size)); ! 4858: printf ("\tuae_u32 sign2;\n"); ! 4859: printf ("\tval <<= 1;\n"); ! 4860: genflags (flag_logical, curi->size, "val", "", ""); ! 4861: printf ("\tsign2 = %s & val;\n", cmask (curi->size)); ! 4862: printf ("\tSET_CFLG (sign != 0);\n"); ! 4863: duplicate_carry (0); ! 4864: printf ("\tSET_VFLG (GET_VFLG () | (sign2 != sign));\n"); ! 4865: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4866: break; ! 4867: case i_LSRW: ! 4868: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4869: fill_prefetch_next (); ! 4870: start_brace (); ! 4871: switch (curi->size) { ! 4872: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break; ! 4873: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break; ! 4874: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4875: default: term (); ! 4876: } ! 4877: printf ("\tuae_u32 carry = val & 1;\n"); ! 4878: printf ("\tval >>= 1;\n"); ! 4879: genflags (flag_logical, curi->size, "val", "", ""); ! 4880: printf ("\tSET_CFLG (carry);\n"); ! 4881: duplicate_carry (0); ! 4882: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4883: break; ! 4884: case i_LSLW: ! 4885: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4886: fill_prefetch_next (); ! 4887: start_brace (); ! 4888: switch (curi->size) { ! 4889: case sz_byte: printf ("\tuae_u8 val = data;\n"); break; ! 4890: case sz_word: printf ("\tuae_u16 val = data;\n"); break; ! 4891: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4892: default: term (); ! 4893: } ! 4894: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size)); ! 4895: printf ("\tval <<= 1;\n"); ! 4896: genflags (flag_logical, curi->size, "val", "", ""); ! 4897: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); ! 4898: duplicate_carry (0); ! 4899: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4900: break; ! 4901: case i_ROLW: ! 4902: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4903: fill_prefetch_next (); ! 4904: start_brace (); ! 4905: switch (curi->size) { ! 4906: case sz_byte: printf ("\tuae_u8 val = data;\n"); break; ! 4907: case sz_word: printf ("\tuae_u16 val = data;\n"); break; ! 4908: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4909: default: term (); ! 4910: } ! 4911: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size)); ! 4912: printf ("\tval <<= 1;\n"); ! 4913: printf ("\tif (carry) val |= 1;\n"); ! 4914: genflags (flag_logical, curi->size, "val", "", ""); ! 4915: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); ! 4916: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4917: break; ! 4918: case i_RORW: ! 4919: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4920: fill_prefetch_next (); ! 4921: start_brace (); ! 4922: switch (curi->size) { ! 4923: case sz_byte: printf ("\tuae_u8 val = data;\n"); break; ! 4924: case sz_word: printf ("\tuae_u16 val = data;\n"); break; ! 4925: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4926: default: term (); ! 4927: } ! 4928: printf ("\tuae_u32 carry = val & 1;\n"); ! 4929: printf ("\tval >>= 1;\n"); ! 4930: printf ("\tif (carry) val |= %s;\n", cmask (curi->size)); ! 4931: genflags (flag_logical, curi->size, "val", "", ""); ! 4932: printf ("\tSET_CFLG (carry);\n"); ! 4933: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4934: break; ! 4935: case i_ROXLW: ! 4936: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4937: fill_prefetch_next (); ! 4938: start_brace (); ! 4939: switch (curi->size) { ! 4940: case sz_byte: printf ("\tuae_u8 val = data;\n"); break; ! 4941: case sz_word: printf ("\tuae_u16 val = data;\n"); break; ! 4942: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4943: default: term (); ! 4944: } ! 4945: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size)); ! 4946: printf ("\tval <<= 1;\n"); ! 4947: printf ("\tif (GET_XFLG ()) val |= 1;\n"); ! 4948: genflags (flag_logical, curi->size, "val", "", ""); ! 4949: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1); ! 4950: duplicate_carry (0); ! 4951: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4952: break; ! 4953: case i_ROXRW: ! 4954: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW); ! 4955: fill_prefetch_next (); ! 4956: start_brace (); ! 4957: switch (curi->size) { ! 4958: case sz_byte: printf ("\tuae_u8 val = data;\n"); break; ! 4959: case sz_word: printf ("\tuae_u16 val = data;\n"); break; ! 4960: case sz_long: printf ("\tuae_u32 val = data;\n"); break; ! 4961: default: term (); ! 4962: } ! 4963: printf ("\tuae_u32 carry = val & 1;\n"); ! 4964: printf ("\tval >>= 1;\n"); ! 4965: printf ("\tif (GET_XFLG ()) val |= %s;\n", cmask (curi->size)); ! 4966: genflags (flag_logical, curi->size, "val", "", ""); ! 4967: printf ("\tSET_CFLG (carry);\n"); ! 4968: duplicate_carry (0); ! 4969: genastore ("val", curi->smode, "srcreg", curi->size, "data"); ! 4970: break; ! 4971: case i_MOVEC2: ! 4972: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 4973: fill_prefetch_next (); ! 4974: start_brace (); ! 4975: printf ("\tint regno = (src >> 12) & 15;\n"); ! 4976: printf ("\tuae_u32 *regp = regs.regs + regno;\n"); ! 4977: printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr); ! 4978: break; ! 4979: case i_MOVE2C: ! 4980: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0); ! 4981: fill_prefetch_next (); ! 4982: start_brace (); ! 4983: printf ("\tint regno = (src >> 12) & 15;\n"); ! 4984: printf ("\tuae_u32 *regp = regs.regs + regno;\n"); ! 4985: printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr); ! 4986: break; ! 4987: case i_CAS: ! 4988: { ! 4989: int old_brace_level; ! 4990: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_LRMW); ! 4991: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_LRMW); ! 4992: if (cpu_level == 5 && curi->size > 0) { ! 4993: printf ("\tif ((dsta & %d) && currprefs.int_no_unimplemented && get_cpu_model () == 68060) {\n", curi->size == 1 ? 1 : 3); ! 4994: if (curi->dmode == Aipi || curi->dmode == Apdi) ! 4995: printf ("\t\tm68k_areg (regs, dstreg) %c= %d;\n", curi->dmode == Aipi ? '-' : '+', 1 << curi->size); ! 4996: sync_m68k_pc_noreset (); ! 4997: printf ("\t\top_unimpl (opcode);\n"); ! 4998: printf ("\t\tgoto %s;\n", endlabelstr); ! 4999: printf ("\t}\n"); ! 5000: need_endlabel = 1; ! 5001: } ! 5002: fill_prefetch_0 (); ! 5003: start_brace (); ! 5004: printf ("\tint ru = (src >> 6) & 7;\n"); ! 5005: printf ("\tint rc = src & 7;\n"); ! 5006: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, rc)", "dst"); ! 5007: gen_set_fault_pc (); ! 5008: printf ("\tif (GET_ZFLG ()) "); ! 5009: old_brace_level = n_braces; ! 5010: start_brace (); ! 5011: printf ("\n\t"); ! 5012: genastore_cas ("(m68k_dreg (regs, ru))", curi->dmode, "dstreg", curi->size, "dst"); ! 5013: printf ("\t"); ! 5014: pop_braces (old_brace_level); ! 5015: printf ("else"); ! 5016: start_brace (); ! 5017: printf ("\n"); ! 5018: get_prefetch_020 (); ! 5019: if (cpu_level >= 4) { ! 5020: // apparently 68040/060 needs to always write at the end of RMW cycle ! 5021: printf ("\t"); ! 5022: genastore_cas ("dst", curi->dmode, "dstreg", curi->size, "dst"); ! 5023: } ! 5024: switch (curi->size) { ! 5025: case sz_byte: ! 5026: printf ("\t\tm68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);\n"); ! 5027: break; ! 5028: case sz_word: ! 5029: printf ("\t\tm68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);\n"); ! 5030: break; ! 5031: default: ! 5032: printf ("\t\tm68k_dreg(regs, rc) = dst;\n"); ! 5033: break; ! 5034: } ! 5035: pop_braces (old_brace_level); ! 5036: } ! 5037: break; ! 5038: case i_CAS2: ! 5039: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, GF_LRMW); ! 5040: printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n"); ! 5041: printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n"); ! 5042: if (curi->size == sz_word) { ! 5043: int old_brace_level = n_braces; ! 5044: printf ("\tuae_u16 dst1 = %s (rn1), dst2 = %s (rn2);\n", srcwlrmw, srcwlrmw); ! 5045: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1"); ! 5046: printf ("\tif (GET_ZFLG ()) {\n"); ! 5047: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2"); ! 5048: printf ("\tif (GET_ZFLG ()) {\n"); ! 5049: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n", dstwlrmw); ! 5050: printf ("\t%s (rn2, m68k_dreg (regs, (extra >> 6) & 7));\n", dstwlrmw); ! 5051: printf ("\t}}\n"); ! 5052: pop_braces (old_brace_level); ! 5053: printf ("\tif (! GET_ZFLG ()) {\n"); ! 5054: printf ("\tm68k_dreg (regs, (extra >> 0) & 7) = (m68k_dreg (regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n"); ! 5055: printf ("\tm68k_dreg (regs, (extra >> 16) & 7) = (m68k_dreg (regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n"); ! 5056: printf ("\t}\n"); ! 5057: } else { ! 5058: int old_brace_level = n_braces; ! 5059: printf ("\tuae_u32 dst1 = %s (rn1), dst2 = %s (rn2);\n", srcllrmw, srcllrmw); ! 5060: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1"); ! 5061: printf ("\tif (GET_ZFLG ()) {\n"); ! 5062: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2"); ! 5063: printf ("\tif (GET_ZFLG ()) {\n"); ! 5064: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n", dstllrmw); ! 5065: printf ("\t%s (rn2, m68k_dreg (regs, (extra >> 6) & 7));\n", dstllrmw); ! 5066: printf ("\t}}\n"); ! 5067: pop_braces (old_brace_level); ! 5068: printf ("\tif (! GET_ZFLG ()) {\n"); ! 5069: printf ("\tm68k_dreg (regs, (extra >> 0) & 7) = dst2;\n"); ! 5070: printf ("\tm68k_dreg (regs, (extra >> 16) & 7) = dst1;\n"); ! 5071: printf ("\t}\n"); ! 5072: } ! 5073: break; ! 5074: case i_MOVES: /* ignore DFC and SFC when using_mmu == false */ ! 5075: { ! 5076: int old_brace_level; ! 5077: tail_ce020_done = true; ! 5078: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5079: printf ("\tif (extra & 0x800)\n"); ! 5080: { ! 5081: int old_m68k_pc_offset = m68k_pc_offset; ! 5082: old_brace_level = n_braces; ! 5083: start_brace (); ! 5084: printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n"); ! 5085: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0); ! 5086: genastore_fc ("src", curi->dmode, "dstreg", curi->size, "dst"); ! 5087: pop_braces (old_brace_level); ! 5088: m68k_pc_offset = old_m68k_pc_offset; ! 5089: } ! 5090: printf ("else"); ! 5091: { ! 5092: start_brace (); ! 5093: genamode (curi, curi->dmode, "dstreg", curi->size, "src", 1, 0, GF_FC); ! 5094: printf ("\tif (extra & 0x8000) {\n"); ! 5095: switch (curi->size) { ! 5096: case sz_byte: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break; ! 5097: case sz_word: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break; ! 5098: case sz_long: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = src;\n"); break; ! 5099: default: term (); ! 5100: } ! 5101: printf ("\t} else {\n"); ! 5102: genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, ""); ! 5103: printf ("\t}\n"); ! 5104: if (using_mmu == 68040) ! 5105: sync_m68k_pc (); ! 5106: pop_braces (old_brace_level); ! 5107: } ! 5108: tail_ce020_done = false; ! 5109: returntail (false); ! 5110: } ! 5111: break; ! 5112: case i_BKPT: /* only needed for hardware emulators */ ! 5113: sync_m68k_pc (); ! 5114: printf ("\top_illg (opcode);\n"); ! 5115: did_prefetch = -1; ! 5116: break; ! 5117: case i_CALLM: /* not present in 68030 */ ! 5118: sync_m68k_pc (); ! 5119: printf ("\top_illg (opcode);\n"); ! 5120: did_prefetch = -1; ! 5121: break; ! 5122: case i_RTM: /* not present in 68030 */ ! 5123: sync_m68k_pc (); ! 5124: printf ("\top_illg (opcode);\n"); ! 5125: did_prefetch = -1; ! 5126: break; ! 5127: case i_TRAPcc: ! 5128: if (curi->smode != am_unknown && curi->smode != am_illg) ! 5129: genamode (curi, curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0); ! 5130: fill_prefetch_0 (); ! 5131: printf ("\tif (cctrue (%d)) { Exception (7); goto %s; }\n", curi->cc, endlabelstr); ! 5132: need_endlabel = 1; ! 5133: break; ! 5134: case i_DIVL: ! 5135: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5136: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); ! 5137: sync_m68k_pc (); ! 5138: printf ("\tif (!m68k_divl(opcode, dst, extra)) goto %s;\n", endlabelstr); ! 5139: need_endlabel = 1; ! 5140: break; ! 5141: case i_MULL: ! 5142: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5143: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0); ! 5144: sync_m68k_pc (); ! 5145: printf ("\tif (!m68k_mull(opcode, dst, extra)) goto %s;\n", endlabelstr); ! 5146: need_endlabel = 1; ! 5147: break; ! 5148: case i_BFTST: ! 5149: case i_BFEXTU: ! 5150: case i_BFCHG: ! 5151: case i_BFEXTS: ! 5152: case i_BFCLR: ! 5153: case i_BFFFO: ! 5154: case i_BFSET: ! 5155: case i_BFINS: ! 5156: { ! 5157: const char *getb, *putb; ! 5158: ! 5159: if (using_mmu == 68060 && (curi->mnemo == i_BFCHG || curi->mnemo == i_BFCLR || curi->mnemo == i_BFSET || curi->mnemo == i_BFINS)) { ! 5160: getb = "mmu060_get_rmw_bitfield"; ! 5161: putb = "mmu060_put_rmw_bitfield"; ! 5162: } else if (using_mmu || using_ce020 || using_indirect > 0) { ! 5163: getb = "x_get_bitfield"; ! 5164: putb = "x_put_bitfield"; ! 5165: } else { ! 5166: getb = "get_bitfield"; ! 5167: putb = "put_bitfield"; ! 5168: } ! 5169: ! 5170: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5171: genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 2, 0, 0); ! 5172: start_brace (); ! 5173: printf ("\tuae_u32 bdata[2];\n"); ! 5174: printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n"); ! 5175: printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n"); ! 5176: if (curi->mnemo == i_BFFFO) ! 5177: printf("\tuae_u32 offset2 = offset;\n"); ! 5178: if (curi->dmode == Dreg) { ! 5179: printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg);\n"); ! 5180: printf ("\toffset &= 0x1f;\n"); ! 5181: printf ("\ttmp = (tmp << offset) | (tmp >> (32 - offset));\n"); ! 5182: printf ("\tbdata[0] = tmp & ((1 << (32 - width)) - 1);\n"); ! 5183: } else { ! 5184: printf ("\tuae_u32 tmp;\n"); ! 5185: printf ("\tdsta += offset >> 3;\n"); ! 5186: printf ("\ttmp = %s (dsta, bdata, offset, width);\n", getb); ! 5187: } ! 5188: printf ("\tSET_NFLG_ALWAYS (((uae_s32)tmp) < 0 ? 1 : 0);\n"); ! 5189: if (curi->mnemo == i_BFEXTS) ! 5190: printf ("\ttmp = (uae_s32)tmp >> (32 - width);\n"); ! 5191: else ! 5192: printf ("\ttmp >>= (32 - width);\n"); ! 5193: printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n"); ! 5194: switch (curi->mnemo) { ! 5195: case i_BFTST: ! 5196: break; ! 5197: case i_BFEXTU: ! 5198: case i_BFEXTS: ! 5199: printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = tmp;\n"); ! 5200: break; ! 5201: case i_BFCHG: ! 5202: printf ("\ttmp = tmp ^ (0xffffffffu >> (32 - width));\n"); ! 5203: break; ! 5204: case i_BFCLR: ! 5205: printf ("\ttmp = 0;\n"); ! 5206: break; ! 5207: case i_BFFFO: ! 5208: printf ("\t{ uae_u32 mask = 1 << (width - 1);\n"); ! 5209: printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset2++; }}\n"); ! 5210: printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = offset2;\n"); ! 5211: break; ! 5212: case i_BFSET: ! 5213: printf ("\ttmp = 0xffffffffu >> (32 - width);\n"); ! 5214: break; ! 5215: case i_BFINS: ! 5216: printf ("\ttmp = m68k_dreg (regs, (extra >> 12) & 7);\n"); ! 5217: printf ("\ttmp = tmp & (0xffffffffu >> (32 - width));\n"); ! 5218: printf ("\tSET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0);\n"); ! 5219: printf ("\tSET_ZFLG (tmp == 0);\n"); ! 5220: break; ! 5221: default: ! 5222: break; ! 5223: } ! 5224: if (curi->mnemo == i_BFCHG ! 5225: || curi->mnemo == i_BFCLR ! 5226: || curi->mnemo == i_BFSET ! 5227: || curi->mnemo == i_BFINS) { ! 5228: if (curi->dmode == Dreg) { ! 5229: printf ("\ttmp = bdata[0] | (tmp << (32 - width));\n"); ! 5230: printf ("\tm68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));\n"); ! 5231: } else { ! 5232: printf ("\t%s(dsta, bdata, tmp, offset, width);\n", putb); ! 5233: } ! 5234: } ! 5235: } ! 5236: break; ! 5237: case i_PACK: ! 5238: if (curi->smode == Dreg) { ! 5239: printf ("\tuae_u16 val = m68k_dreg (regs, srcreg) + %s;\n", gen_nextiword (0)); ! 5240: printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n"); ! 5241: } else { ! 5242: printf ("\tuae_u16 val;\n"); ! 5243: addmmufixup ("srcreg"); ! 5244: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n"); ! 5245: printf ("\tval = (uae_u16)(%s (m68k_areg (regs, srcreg)) & 0xff);\n", srcb); ! 5246: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n"); ! 5247: printf ("\tval = (val | ((uae_u16)(%s (m68k_areg (regs, srcreg)) & 0xff) << 8)) + %s;\n", srcb, gen_nextiword (0)); ! 5248: addmmufixup ("dstreg"); ! 5249: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n"); ! 5250: gen_set_fault_pc (); ! 5251: printf ("\t%s (m68k_areg (regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n", dstb); ! 5252: } ! 5253: break; ! 5254: case i_UNPK: ! 5255: if (curi->smode == Dreg) { ! 5256: printf ("\tuae_u16 val = m68k_dreg (regs, srcreg);\n"); ! 5257: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0)); ! 5258: printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffff0000) | (val & 0xffff);\n"); ! 5259: } else { ! 5260: printf ("\tuae_u16 val;\n"); ! 5261: addmmufixup ("srcreg"); ! 5262: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n"); ! 5263: printf ("\tval = (uae_u16)(%s (m68k_areg (regs, srcreg)) & 0xff);\n", srcb); ! 5264: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0)); ! 5265: addmmufixup ("dstreg"); ! 5266: if (cpu_level >= 2) { ! 5267: printf ("\tm68k_areg (regs, dstreg) -= 2 * areg_byteinc[dstreg];\n"); ! 5268: printf ("\t%s (m68k_areg (regs, dstreg) + areg_byteinc[dstreg], val);\n", dstb); ! 5269: printf ("\t%s (m68k_areg (regs, dstreg), val >> 8);\n", dstb); ! 5270: } else { ! 5271: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n"); ! 5272: printf ("\t%s (m68k_areg (regs, dstreg),val);\n", dstb); ! 5273: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n"); ! 5274: gen_set_fault_pc (); ! 5275: printf ("\t%s (m68k_areg (regs, dstreg),val >> 8);\n", dstb); ! 5276: } ! 5277: } ! 5278: break; ! 5279: case i_TAS: ! 5280: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_LRMW); ! 5281: genflags (flag_logical, curi->size, "src", "", ""); ! 5282: if (!isreg (curi->smode)) ! 5283: addcycles000 (2); ! 5284: fill_prefetch_next (); ! 5285: printf ("\tsrc |= 0x80;\n"); ! 5286: if (cpu_level >= 2 || curi->smode == Dreg || !using_ce) { ! 5287: if (next_cpu_level < 2) ! 5288: next_cpu_level = 2 - 1; ! 5289: genastore_tas ("src", curi->smode, "srcreg", curi->size, "src"); ! 5290: } else { ! 5291: printf ("\tif (!is_cycle_ce ()) {\n"); ! 5292: genastore ("src", curi->smode, "srcreg", curi->size, "src"); ! 5293: printf ("\t} else {\n"); ! 5294: printf ("\t\t%s (4);\n", do_cycles); ! 5295: addcycles000_nonce("\t\t", 4); ! 5296: printf ("\t}\n"); ! 5297: } ! 5298: break; ! 5299: case i_FPP: ! 5300: fpulimit(); ! 5301: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5302: sync_m68k_pc (); ! 5303: printf ("\tfpuop_arithmetic(opcode, extra);\n"); ! 5304: if (using_prefetch || using_prefetch_020) { ! 5305: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5306: need_endlabel = 1; ! 5307: } ! 5308: break; ! 5309: case i_FDBcc: ! 5310: fpulimit(); ! 5311: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5312: sync_m68k_pc (); ! 5313: printf ("\tfpuop_dbcc (opcode, extra);\n"); ! 5314: if (using_prefetch || using_prefetch_020) { ! 5315: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5316: printf ("\tif (regs.fp_branch) {\n"); ! 5317: printf ("\t\tregs.fp_branch = false;\n"); ! 5318: printf ("\t\tfill_prefetch();\n"); ! 5319: printf ("\t\tgoto %s;\n", endlabelstr); ! 5320: printf ("\t}\n"); ! 5321: need_endlabel = 1; ! 5322: } ! 5323: break; ! 5324: case i_FScc: ! 5325: fpulimit(); ! 5326: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5327: sync_m68k_pc (); ! 5328: printf ("\tfpuop_scc (opcode, extra);\n"); ! 5329: if (using_prefetch || using_prefetch_020) { ! 5330: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5331: need_endlabel = 1; ! 5332: } ! 5333: break; ! 5334: case i_FTRAPcc: ! 5335: fpulimit(); ! 5336: printf ("\tuaecptr oldpc = %s;\n", getpc); ! 5337: printf ("\tuae_u16 extra = %s;\n", gen_nextiword (0)); ! 5338: if (curi->smode != am_unknown && curi->smode != am_illg) ! 5339: genamode (curi, curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0); ! 5340: sync_m68k_pc (); ! 5341: printf ("\tfpuop_trapcc (opcode, oldpc, extra);\n"); ! 5342: if (using_prefetch || using_prefetch_020) { ! 5343: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5344: need_endlabel = 1; ! 5345: } ! 5346: break; ! 5347: case i_FBcc: ! 5348: fpulimit(); ! 5349: sync_m68k_pc (); ! 5350: start_brace (); ! 5351: printf ("\tuaecptr pc = %s;\n", getpc); ! 5352: genamode (curi, curi->dmode, "srcreg", curi->size, "extra", 1, 0, 0); ! 5353: sync_m68k_pc (); ! 5354: printf ("\tfpuop_bcc (opcode, pc,extra);\n"); ! 5355: if (using_prefetch || using_prefetch_020) { ! 5356: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5357: printf ("\tif (regs.fp_branch) {\n"); ! 5358: printf ("\t\tregs.fp_branch = false;\n"); ! 5359: printf ("\t\tfill_prefetch();\n"); ! 5360: printf ("\t\tgoto %s;\n", endlabelstr); ! 5361: printf ("\t}\n"); ! 5362: need_endlabel = 1; ! 5363: } ! 5364: break; ! 5365: case i_FSAVE: ! 5366: fpulimit(); ! 5367: sync_m68k_pc (); ! 5368: printf ("\tfpuop_save (opcode);\n"); ! 5369: if (using_prefetch || using_prefetch_020) { ! 5370: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5371: need_endlabel = 1; ! 5372: } ! 5373: break; ! 5374: case i_FRESTORE: ! 5375: fpulimit(); ! 5376: sync_m68k_pc (); ! 5377: printf ("\tfpuop_restore (opcode);\n"); ! 5378: if (using_prefetch || using_prefetch_020) { ! 5379: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr); ! 5380: need_endlabel = 1; ! 5381: } ! 5382: break; ! 5383: ! 5384: case i_CINVL: ! 5385: case i_CINVP: ! 5386: case i_CINVA: ! 5387: case i_CPUSHL: ! 5388: case i_CPUSHP: ! 5389: case i_CPUSHA: ! 5390: printf ("\tflush_cpu_caches_040(opcode);\n"); ! 5391: if (using_mmu) ! 5392: printf ("\tflush_mmu%s(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n", mmu_postfix); ! 5393: printf ("\tif (opcode & 0x80)\n"); ! 5394: printf ("\t\tflush_icache((opcode >> 6) & 3);\n"); ! 5395: break; ! 5396: ! 5397: case i_MOVE16: ! 5398: { ! 5399: if ((opcode & 0xfff8) == 0xf620) { ! 5400: /* MOVE16 (Ax)+,(Ay)+ */ ! 5401: printf ("\tuae_u32 v[4];\n"); ! 5402: printf ("\tuaecptr mems = m68k_areg (regs, srcreg) & ~15, memd;\n"); ! 5403: printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword (0)); ! 5404: printf ("\tmemd = m68k_areg (regs, dstreg) & ~15;\n"); ! 5405: if (using_mmu >= 68040) { ! 5406: printf ("\tget_move16_mmu (mems, v);\n"); ! 5407: printf ("\tput_move16_mmu (memd, v);\n"); ! 5408: } else { ! 5409: printf ("\tv[0] = %s (mems);\n", srcl); ! 5410: printf ("\tv[1] = %s (mems + 4);\n", srcl); ! 5411: printf ("\tv[2] = %s (mems + 8);\n", srcl); ! 5412: printf ("\tv[3] = %s (mems + 12);\n", srcl); ! 5413: printf ("\t%s (memd , v[0]);\n", dstl); ! 5414: printf ("\t%s (memd + 4, v[1]);\n", dstl); ! 5415: printf ("\t%s (memd + 8, v[2]);\n", dstl); ! 5416: printf ("\t%s (memd + 12, v[3]);\n", dstl); ! 5417: } ! 5418: printf ("\tif (srcreg != dstreg)\n"); ! 5419: printf ("\t\tm68k_areg (regs, srcreg) += 16;\n"); ! 5420: printf ("\tm68k_areg (regs, dstreg) += 16;\n"); ! 5421: } else { ! 5422: /* Other variants */ ! 5423: printf ("\tuae_u32 v[4];\n"); ! 5424: genamode (curi, curi->smode, "srcreg", curi->size, "mems", 0, 2, 0); ! 5425: genamode (curi, curi->dmode, "dstreg", curi->size, "memd", 0, 2, 0); ! 5426: if (using_mmu == 68040) { ! 5427: printf ("\tget_move16_mmu (memsa, mmu040_move16);\n"); ! 5428: printf ("\tput_move16_mmu (memda, mmu040_move16);\n"); ! 5429: } else if (using_mmu == 68060) { ! 5430: printf ("\tget_move16_mmu (memsa, v);\n"); ! 5431: printf ("\tput_move16_mmu (memda, v);\n"); ! 5432: } else { ! 5433: printf ("\tmemsa &= ~15;\n"); ! 5434: printf ("\tmemda &= ~15;\n"); ! 5435: printf ("\tv[0] = %s (memsa);\n", srcl); ! 5436: printf ("\tv[1] = %s (memsa + 4);\n", srcl); ! 5437: printf ("\tv[2] = %s (memsa + 8);\n", srcl); ! 5438: printf ("\tv[3] = %s (memsa + 12);\n", srcl); ! 5439: printf ("\t%s (memda , v[0]);\n", dstl); ! 5440: printf ("\t%s (memda + 4, v[1]);\n", dstl); ! 5441: printf ("\t%s (memda + 8, v[2]);\n", dstl); ! 5442: printf ("\t%s (memda + 12, v[3]);\n", dstl); ! 5443: } ! 5444: if ((opcode & 0xfff8) == 0xf600) ! 5445: printf ("\tm68k_areg (regs, srcreg) += 16;\n"); ! 5446: else if ((opcode & 0xfff8) == 0xf608) ! 5447: printf ("\tm68k_areg (regs, dstreg) += 16;\n"); ! 5448: } ! 5449: } ! 5450: break; ! 5451: ! 5452: case i_PFLUSHN: ! 5453: case i_PFLUSH: ! 5454: case i_PFLUSHAN: ! 5455: case i_PFLUSHA: ! 5456: case i_PLPAR: ! 5457: case i_PLPAW: ! 5458: case i_PTESTR: ! 5459: case i_PTESTW: ! 5460: sync_m68k_pc (); ! 5461: printf ("\tmmu_op (opcode, 0);\n"); ! 5462: break; ! 5463: case i_MMUOP030: ! 5464: printf("\tuaecptr pc = %s;\n", getpc); ! 5465: printf("\tuae_u16 extra = %s (2);\n", prefetch_word); ! 5466: m68k_pc_offset += 2; ! 5467: sync_m68k_pc(); ! 5468: if (curi->smode == Areg || curi->smode == Dreg) ! 5469: printf("\tuae_u16 extraa = 0;\n"); ! 5470: else ! 5471: genamode(curi, curi->smode, "srcreg", curi->size, "extra", 0, 0, 0); ! 5472: sync_m68k_pc(); ! 5473: if (using_ce020 || using_prefetch_020) { ! 5474: printf("\tif (mmu_op30 (pc, opcode, extra, extraa)) goto %s;\n", endlabelstr); ! 5475: need_endlabel = 1; ! 5476: } else { ! 5477: printf("\tmmu_op30 (pc, opcode, extra, extraa);\n"); ! 5478: } ! 5479: break; ! 5480: default: ! 5481: term (); ! 5482: break; ! 5483: } ! 5484: end: ! 5485: if (!genastore_done) ! 5486: returntail (0); ! 5487: finish_braces (); ! 5488: if (limit_braces) { ! 5489: printf ("\n#endif\n"); ! 5490: n_braces = limit_braces; ! 5491: limit_braces = 0; ! 5492: finish_braces (); ! 5493: } ! 5494: if (did_prefetch >= 0) ! 5495: fill_prefetch_finish (); ! 5496: sync_m68k_pc (); ! 5497: did_prefetch = 0; ! 5498: ipl_fetched = 0; 1.1.1.4 root 5499: } 5500: 5501: static void generate_includes (FILE * f, int id) 5502: { 1.1.1.5 ! root 5503: fprintf (f, "#include \"main.h\"\n"); ! 5504: // fprintf (f, "#include \"sysconfig.h\"\n"); ! 5505: fprintf (f, "#include \"sysdeps.h\"\n"); ! 5506: // fprintf (f, "#include \"options.h\"\n"); ! 5507: fprintf (f, "#include \"hatari-glue.h\"\n"); ! 5508: fprintf (f, "#include \"maccess.h\"\n"); ! 5509: fprintf (f, "#include \"memory.h\"\n"); ! 5510: // fprintf (f, "#include \"custom.h\"\n"); ! 5511: // fprintf (f, "#include \"events.h\"\n"); ! 5512: fprintf (f, "#include \"newcpu.h\"\n"); ! 5513: // fprintf (f, "#include \"cpu_prefetch.h\"\n"); ! 5514: fprintf (f, "#include \"cputbl.h\"\n"); ! 5515: if (id == 31 || id == 33) ! 5516: fprintf (f, "#include \"cpummu.h\"\n"); ! 5517: else if (id == 32) ! 5518: fprintf (f, "#include \"cpummu030.h\"\n"); ! 5519: ! 5520: fprintf (f, "#define CPUFUNC(x) x##_ff\n" ! 5521: "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n" ! 5522: "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n" ! 5523: "#ifdef NOFLAGS\n" ! 5524: "#include \"noflags.h\"\n" ! 5525: "#endif\n"); 1.1.1.4 root 5526: } 5527: 5528: static int postfix; 5529: 5530: 5531: static char *decodeEA (amodes mode, wordsizes size) 5532: { 1.1.1.5 ! root 5533: static char buffer[80]; ! 5534: ! 5535: buffer[0] = 0; ! 5536: switch (mode){ ! 5537: case Dreg: ! 5538: strcpy (buffer,"Dn"); ! 5539: break; ! 5540: case Areg: ! 5541: strcpy (buffer,"An"); ! 5542: break; ! 5543: case Aind: ! 5544: strcpy (buffer,"(An)"); ! 5545: break; ! 5546: case Aipi: ! 5547: strcpy (buffer,"(An)+"); ! 5548: break; ! 5549: case Apdi: ! 5550: strcpy (buffer,"-(An)"); ! 5551: break; ! 5552: case Ad16: ! 5553: strcpy (buffer,"(d16,An)"); ! 5554: break; ! 5555: case Ad8r: ! 5556: strcpy (buffer,"(d8,An,Xn)"); ! 5557: break; ! 5558: case PC16: ! 5559: strcpy (buffer,"(d16,PC)"); ! 5560: break; ! 5561: case PC8r: ! 5562: strcpy (buffer,"(d8,PC,Xn)"); ! 5563: break; ! 5564: case absw: ! 5565: strcpy (buffer,"(xxx).W"); ! 5566: break; ! 5567: case absl: ! 5568: strcpy (buffer,"(xxx).L"); ! 5569: break; ! 5570: case imm: ! 5571: switch (size){ ! 5572: case sz_byte: ! 5573: strcpy (buffer,"#<data>.B"); ! 5574: break; ! 5575: case sz_word: ! 5576: strcpy (buffer,"#<data>.W"); ! 5577: break; ! 5578: case sz_long: ! 5579: strcpy (buffer,"#<data>.L"); ! 5580: break; ! 5581: default: ! 5582: break; ! 5583: } ! 5584: break; ! 5585: case imm0: ! 5586: strcpy (buffer,"#<data>.B"); ! 5587: break; ! 5588: case imm1: ! 5589: strcpy (buffer,"#<data>.W"); ! 5590: break; ! 5591: case imm2: ! 5592: strcpy (buffer,"#<data>.L"); ! 5593: break; ! 5594: case immi: ! 5595: strcpy (buffer,"#<data>"); ! 5596: break; ! 5597: ! 5598: default: ! 5599: break; ! 5600: } ! 5601: return buffer; ! 5602: } ! 5603: ! 5604: static const char *m68k_cc[] = { ! 5605: "T", ! 5606: "F", ! 5607: "HI", ! 5608: "LS", ! 5609: "CC", ! 5610: "CS", ! 5611: "NE", ! 5612: "EQ", ! 5613: "VC", ! 5614: "VS", ! 5615: "PL", ! 5616: "MI", ! 5617: "GE", ! 5618: "LT", ! 5619: "GT", ! 5620: "LE" 1.1.1.4 root 5621: }; 5622: 5623: static char *outopcode (int opcode) 5624: { 1.1.1.5 ! root 5625: static char out[100]; ! 5626: struct instr *ins; ! 5627: int i; ! 5628: ! 5629: ins = &table68k[opcode]; ! 5630: for (i = 0; lookuptab[i].name[0]; i++) { ! 5631: if (ins->mnemo == lookuptab[i].mnemo) ! 5632: break; ! 5633: } ! 5634: { ! 5635: char *s = ua (lookuptab[i].name); ! 5636: strcpy (out, s); ! 5637: xfree (s); ! 5638: } ! 5639: if (ins->smode == immi) ! 5640: strcat (out, "Q"); ! 5641: if (ins->size == sz_byte) ! 5642: strcat (out,".B"); ! 5643: if (ins->size == sz_word) ! 5644: strcat (out,".W"); ! 5645: if (ins->size == sz_long) ! 5646: strcat (out,".L"); ! 5647: strcat (out," "); ! 5648: if (ins->suse) ! 5649: strcat (out, decodeEA (ins->smode, ins->size)); ! 5650: if (ins->duse) { ! 5651: if (ins->suse) strcat (out,","); ! 5652: strcat (out, decodeEA (ins->dmode, ins->size)); ! 5653: } ! 5654: if (ins->mnemo == i_DBcc || ins->mnemo == i_Scc || ins->mnemo == i_Bcc || ins->mnemo == i_TRAPcc) { ! 5655: strcat (out, " ("); ! 5656: strcat (out, m68k_cc[table68k[opcode].cc]); ! 5657: strcat (out, ")"); ! 5658: } ! 5659: ! 5660: return out; ! 5661: } ! 5662: ! 5663: struct cputbl_tmp ! 5664: { ! 5665: uae_s16 length; ! 5666: uae_s8 disp020[2]; ! 5667: uae_u8 branch; ! 5668: }; ! 5669: static struct cputbl_tmp cputbltmp[65536]; 1.1.1.4 root 5670: 1.1.1.5 ! root 5671: static void generate_one_opcode (int rp, const char *extra) ! 5672: { ! 5673: int idx; ! 5674: uae_u16 smsk, dmsk; ! 5675: unsigned int opcode = opcode_map[rp]; ! 5676: int i68000 = table68k[opcode].clev > 0; ! 5677: ! 5678: if (table68k[opcode].mnemo == i_ILLG ! 5679: || table68k[opcode].clev > cpu_level) ! 5680: return; ! 5681: ! 5682: for (idx = 0; lookuptab[idx].name[0]; idx++) { ! 5683: if (table68k[opcode].mnemo == lookuptab[idx].mnemo) ! 5684: break; ! 5685: } ! 5686: ! 5687: if (table68k[opcode].handler != -1) ! 5688: return; ! 5689: ! 5690: if (opcode_next_clev[rp] != cpu_level) { ! 5691: char *name = ua (lookuptab[idx].name); ! 5692: if (generate_stbl) ! 5693: fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d%s), 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", ! 5694: (using_ce || using_ce020) ? "(cpuop_func*)" : "", ! 5695: opcode, opcode_last_postfix[rp], ! 5696: extra, opcode, ! 5697: cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); ! 5698: xfree (name); ! 5699: return; ! 5700: } ! 5701: fprintf (headerfile, "extern %s op_%04x_%d%s_nf;\n", ! 5702: (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix, extra); ! 5703: fprintf (headerfile, "extern %s op_%04x_%d%s_ff;\n", ! 5704: (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix, extra); ! 5705: printf ("/* %s */\n", outopcode (opcode)); ! 5706: if (i68000) ! 5707: printf("#ifndef CPUEMU_68000_ONLY\n"); ! 5708: printf ("%s REGPARAM2 CPUFUNC(op_%04x_%d%s)(uae_u32 opcode)\n{\n", (using_ce || using_ce020) ? "void" : "uae_u32", opcode, postfix, extra); ! 5709: if (using_simple_cycles) ! 5710: printf("\tint count_cycles = 0;\n"); ! 5711: ! 5712: switch (table68k[opcode].stype) { ! 5713: case 0: smsk = 7; break; ! 5714: case 1: smsk = 255; break; ! 5715: case 2: smsk = 15; break; ! 5716: case 3: smsk = 7; break; ! 5717: case 4: smsk = 7; break; ! 5718: case 5: smsk = 63; break; ! 5719: case 7: smsk = 3; break; ! 5720: default: term (); ! 5721: } ! 5722: dmsk = 7; ! 5723: ! 5724: next_cpu_level = -1; ! 5725: if (table68k[opcode].suse ! 5726: && table68k[opcode].smode != imm && table68k[opcode].smode != imm0 ! 5727: && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2 ! 5728: && table68k[opcode].smode != absw && table68k[opcode].smode != absl ! 5729: && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16) ! 5730: { ! 5731: if (table68k[opcode].spos == -1) { ! 5732: if (((int) table68k[opcode].sreg) >= 128) ! 5733: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg); ! 5734: else ! 5735: printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg); ! 5736: } else { ! 5737: char source[100]; ! 5738: int pos = table68k[opcode].spos; ! 5739: ! 5740: if (pos) ! 5741: sprintf (source, "((opcode >> %d) & %d)", pos, smsk); ! 5742: else ! 5743: sprintf (source, "(opcode & %d)", smsk); ! 5744: ! 5745: if (table68k[opcode].stype == 3) ! 5746: printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source); ! 5747: else if (table68k[opcode].stype == 1) ! 5748: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source); ! 5749: else ! 5750: printf ("\tuae_u32 srcreg = %s;\n", source); ! 5751: } ! 5752: } ! 5753: if (table68k[opcode].duse ! 5754: /* Yes, the dmode can be imm, in case of LINK or DBcc */ ! 5755: && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0 ! 5756: && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2 ! 5757: && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl) ! 5758: { ! 5759: if (table68k[opcode].dpos == -1) { ! 5760: if (((int) table68k[opcode].dreg) >= 128) ! 5761: printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg); ! 5762: else ! 5763: printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg); ! 5764: } else { ! 5765: int pos = table68k[opcode].dpos; ! 5766: if (pos) ! 5767: printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n", ! 5768: pos, dmsk); ! 5769: else ! 5770: printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk); ! 5771: } ! 5772: } ! 5773: need_endlabel = 0; ! 5774: endlabelno++; ! 5775: sprintf (endlabelstr, "l_%d", endlabelno); ! 5776: count_read = count_write = count_ncycles = count_cycles = 0; ! 5777: count_cycles_ce020 = 0; ! 5778: count_read_ea = count_write_ea = count_cycles_ea = 0; ! 5779: gen_opcode (opcode); ! 5780: if (need_endlabel) ! 5781: printf ("%s: ;\n", endlabelstr); ! 5782: clearmmufixup (0); ! 5783: clearmmufixup (1); ! 5784: if (using_ce || using_prefetch) { ! 5785: if (count_read + count_write + count_cycles == 0) ! 5786: count_cycles = 4; ! 5787: returncycles ("", (count_read + count_write) * 4 + count_cycles); ! 5788: printf ("}"); ! 5789: printf (" /* %d%s (%d/%d)", ! 5790: (count_read + count_write) * 4 + count_cycles, count_ncycles ? "+" : "", count_read, count_write); ! 5791: printf (" */\n"); ! 5792: #ifdef WINUAE_FOR_HATARI ! 5793: insn_n_cycles = (count_read + count_write) * 4 + count_cycles; ! 5794: #endif ! 5795: //printf ( "pom_%d %s %x %d\n" , postfix , lookuptab[idx].name , opcode , (count_read + count_write) * 4 + count_cycles ); ! 5796: } else if (count_read + count_write) { ! 5797: returncycles ("", (count_read + count_write) * 4 + count_cycles); ! 5798: printf ("}"); ! 5799: printf("\n"); ! 5800: #ifdef WINUAE_FOR_HATARI ! 5801: insn_n_cycles = (count_read + count_write) * 4 + count_cycles; ! 5802: #endif ! 5803: //printf ( "pom_%d %s %x %d\n" , postfix , lookuptab[idx].name , opcode , (count_read + count_write) * 4 + count_cycles ); ! 5804: } else { ! 5805: returncycles ("", insn_n_cycles); ! 5806: printf ("}"); ! 5807: printf("\n"); ! 5808: //printf ( "pom_%d %s %x %d\n" , postfix , lookuptab[idx].name , opcode , insn_n_cycles ); ! 5809: } ! 5810: printf ("\n"); ! 5811: if (i68000) ! 5812: printf("#endif\n"); ! 5813: opcode_next_clev[rp] = next_cpu_level; ! 5814: opcode_last_postfix[rp] = postfix; ! 5815: ! 5816: if ((opcode & 0xf000) == 0xf000) ! 5817: m68k_pc_total = -1; ! 5818: cputbltmp[opcode].length = m68k_pc_total; ! 5819: ! 5820: cputbltmp[opcode].disp020[0] = 0; ! 5821: if (genamode8r_offset[0] > 0) ! 5822: cputbltmp[opcode].disp020[0] = m68k_pc_total - genamode8r_offset[0] + 2; ! 5823: cputbltmp[opcode].disp020[1] = 0; ! 5824: if (genamode8r_offset[1] > 0) ! 5825: cputbltmp[opcode].disp020[1] = m68k_pc_total - genamode8r_offset[1] + 2; ! 5826: ! 5827: cputbltmp[opcode].branch = branch_inst; ! 5828: ! 5829: #ifdef WINUAE_FOR_HATARI ! 5830: /* Hatari only : Now patch in the instruction cycles at the beginning of the function: */ ! 5831: if (!using_ce020) { ! 5832: fseek(stdout, nCurInstrCycPos, SEEK_SET); ! 5833: printf("%d;", insn_n_cycles); ! 5834: fseek(stdout, 0, SEEK_END); ! 5835: } ! 5836: #endif ! 5837: ! 5838: if (generate_stbl) { ! 5839: char *name = ua (lookuptab[idx].name); ! 5840: if (i68000) ! 5841: fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n"); ! 5842: fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d%s), 0x%04x, %d, { %d, %d }, %d }, /* %s */\n", ! 5843: (using_ce || using_ce020) ? "(cpuop_func*)" : "", ! 5844: opcode, postfix, extra, opcode, ! 5845: cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name); ! 5846: if (i68000) ! 5847: fprintf (stblfile, "#endif\n"); ! 5848: xfree (name); ! 5849: } ! 5850: } ! 5851: ! 5852: static void generate_func (const char *extra) ! 5853: { ! 5854: int j, rp; ! 5855: ! 5856: /* sam: this is for people with low memory (eg. me :)) */ ! 5857: printf ("\n" ! 5858: "#if !defined(PART_1) && !defined(PART_2) && " ! 5859: "!defined(PART_3) && !defined(PART_4) && " ! 5860: "!defined(PART_5) && !defined(PART_6) && " ! 5861: "!defined(PART_7) && !defined(PART_8)" ! 5862: "\n" ! 5863: "#define PART_1 1\n" ! 5864: "#define PART_2 1\n" ! 5865: "#define PART_3 1\n" ! 5866: "#define PART_4 1\n" ! 5867: "#define PART_5 1\n" ! 5868: "#define PART_6 1\n" ! 5869: "#define PART_7 1\n" ! 5870: "#define PART_8 1\n" ! 5871: "#endif\n\n"); ! 5872: ! 5873: rp = 0; ! 5874: for(j = 1; j <= 8; ++j) { ! 5875: int k = (j * nr_cpuop_funcs) / 8; ! 5876: printf ("#ifdef PART_%d\n",j); ! 5877: for (; rp < k; rp++) ! 5878: generate_one_opcode (rp, extra); ! 5879: printf ("#endif\n\n"); ! 5880: } ! 5881: ! 5882: if (generate_stbl) ! 5883: fprintf (stblfile, "{ 0, 0 }};\n"); 1.1.1.4 root 5884: } 5885: 5886: static void generate_cpu (int id, int mode) 5887: { 1.1.1.5 ! root 5888: char fname[100]; ! 5889: const char *extra, *extraup; ! 5890: static int postfix2 = -1; ! 5891: int rp; ! 5892: ! 5893: using_tracer = mode; ! 5894: extra = ""; ! 5895: extraup = ""; ! 5896: if (using_tracer) { ! 5897: extra = "_t"; ! 5898: extraup = "_T"; ! 5899: } ! 5900: ! 5901: postfix = id; ! 5902: if (id == 0 || id == 11 || id == 13 || id == 20 || id == 21 || id == 22 || id == 23 || id == 24 || id == 31 || id == 32 || id == 33 || id == 40 || id == 50) { ! 5903: if (generate_stbl) ! 5904: fprintf (stblfile, "#ifdef CPUEMU_%d%s\n", postfix, extraup); ! 5905: postfix2 = postfix; ! 5906: sprintf (fname, "cpuemu_%d%s.c", postfix, extra); ! 5907: if (freopen (fname, "wb", stdout) == NULL) { ! 5908: abort (); ! 5909: } ! 5910: generate_includes (stdout, id); ! 5911: } ! 5912: ! 5913: using_exception_3 = 1; ! 5914: using_prefetch = 0; ! 5915: using_prefetch_020 = 0; ! 5916: using_ce = 0; ! 5917: using_ce020 = 0; ! 5918: using_mmu = 0; ! 5919: using_waitstates = 0; ! 5920: memory_cycle_cnt = 4; ! 5921: mmu_postfix = ""; ! 5922: using_simple_cycles = 0; ! 5923: using_indirect = 0; ! 5924: cpu_generic = false; ! 5925: ! 5926: #ifdef WINUAE_FOR_HATARI ! 5927: using_bus_error = 1; /* Enable code to handle bus error */ ! 5928: #endif ! 5929: ! 5930: if (id == 11 || id == 12) { // 11 = 68010 prefetch, 12 = 68000 prefetch ! 5931: cpu_level = id == 11 ? 1 : 0; ! 5932: using_prefetch = 1; ! 5933: using_exception_3 = 1; ! 5934: using_simple_cycles = 1; ! 5935: if (id == 11) { ! 5936: read_counts (); ! 5937: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5938: opcode_next_clev[rp] = cpu_level; ! 5939: } ! 5940: } else if (id == 13 || id == 14) { // 13 = 68010 cycle-exact, 14 = 68000 cycle-exact ! 5941: cpu_level = id == 13 ? 1 : 0; ! 5942: using_prefetch = 1; ! 5943: using_exception_3 = 1; ! 5944: using_ce = 1; ! 5945: if (id == 13) { ! 5946: read_counts (); ! 5947: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5948: opcode_next_clev[rp] = cpu_level; ! 5949: } ! 5950: } else if (id == 20) { // 68020 prefetch ! 5951: cpu_level = 2; ! 5952: using_prefetch_020 = 1; ! 5953: read_counts (); ! 5954: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5955: opcode_next_clev[rp] = cpu_level; ! 5956: } else if (id == 21) { // 68020 cycle-exact ! 5957: cpu_level = 2; ! 5958: using_ce020 = 1; ! 5959: using_prefetch_020 = 1; ! 5960: // timing tables are from 030 which has 2 ! 5961: // clock memory accesses, 68020 has 3 clock ! 5962: // memory accesses ! 5963: using_waitstates = 1; ! 5964: memory_cycle_cnt = 3; ! 5965: read_counts (); ! 5966: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5967: opcode_next_clev[rp] = cpu_level; ! 5968: } else if (id == 22) { // 68030 prefetch ! 5969: cpu_level = 3; ! 5970: using_prefetch_020 = 2; ! 5971: read_counts (); ! 5972: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5973: opcode_next_clev[rp] = cpu_level; ! 5974: } else if (id == 23) { // 68030 "cycle-exact" ! 5975: cpu_level = 3; ! 5976: using_ce020 = 2; ! 5977: using_prefetch_020 = 2; ! 5978: memory_cycle_cnt = 2; ! 5979: read_counts (); ! 5980: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5981: opcode_next_clev[rp] = cpu_level; ! 5982: } else if (id == 24 || id == 25) { // 68040/060 "cycle-exact" ! 5983: cpu_level = id == 24 ? 5 : 4; ! 5984: using_ce020 = 3; ! 5985: using_prefetch_020 = 3; ! 5986: memory_cycle_cnt = 0; ! 5987: if (id == 24) { ! 5988: read_counts(); ! 5989: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5990: opcode_next_clev[rp] = cpu_level; ! 5991: } ! 5992: } else if (id == 31) { // 31 = 68040 MMU ! 5993: mmu_postfix = "040"; ! 5994: cpu_level = 4; ! 5995: using_mmu = 68040; ! 5996: read_counts (); ! 5997: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 5998: opcode_next_clev[rp] = cpu_level; ! 5999: } else if (id == 32) { // 32 = 68030 MMU ! 6000: mmu_postfix = "030"; ! 6001: cpu_level = 3; ! 6002: using_mmu = 68030; ! 6003: read_counts (); ! 6004: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 6005: opcode_next_clev[rp] = cpu_level; ! 6006: } else if (id == 33) { // 33 = 68060 MMU ! 6007: mmu_postfix = "060"; ! 6008: cpu_level = 5; ! 6009: using_mmu = 68060; ! 6010: read_counts (); ! 6011: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 6012: opcode_next_clev[rp] = cpu_level; ! 6013: } else if (id < 6) { ! 6014: cpu_level = 5 - (id - 0); // "generic" ! 6015: cpu_generic = true; ! 6016: } else if (id >= 40 && id < 46) { ! 6017: cpu_level = 5 - (id - 40); // "generic" + direct ! 6018: cpu_generic = true; ! 6019: if (id == 40) { ! 6020: read_counts(); ! 6021: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 6022: opcode_next_clev[rp] = cpu_level; ! 6023: } ! 6024: using_indirect = -1; ! 6025: } else if (id >= 50 && id < 56) { ! 6026: cpu_level = 5 - (id - 50); // "generic" + indirect ! 6027: cpu_generic = true; ! 6028: if (id == 50) { ! 6029: read_counts(); ! 6030: for (rp = 0; rp < nr_cpuop_funcs; rp++) ! 6031: opcode_next_clev[rp] = cpu_level; ! 6032: } ! 6033: } ! 6034: ! 6035: if (!using_indirect) ! 6036: using_indirect = using_ce || using_ce020 || using_prefetch_020 || id >= 50; ! 6037: ! 6038: if (generate_stbl) { ! 6039: if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46) || (id > 50 && id < 56)) ! 6040: fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n"); ! 6041: fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d%s)[] = {\n", postfix, extra); ! 6042: } ! 6043: endlabelno = id * 10000; ! 6044: generate_func (extra); ! 6045: if (generate_stbl) { ! 6046: if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46) || (id > 50 && id < 56)) ! 6047: fprintf (stblfile, "#endif /* CPUEMU_68000_ONLY */\n"); ! 6048: if (postfix2 >= 0) ! 6049: fprintf (stblfile, "#endif /* CPUEMU_%d%s */\n", postfix2, extraup); ! 6050: } ! 6051: postfix2 = -1; ! 6052: } ! 6053: ! 6054: int main(int argc, char *argv[]) ! 6055: { ! 6056: int i; ! 6057: ! 6058: read_table68k (); ! 6059: do_merges (); ! 6060: ! 6061: opcode_map = xmalloc (int, nr_cpuop_funcs); ! 6062: opcode_last_postfix = xmalloc (int, nr_cpuop_funcs); ! 6063: opcode_next_clev = xmalloc (int, nr_cpuop_funcs); ! 6064: counts = xmalloc (unsigned long, 65536); ! 6065: read_counts (); ! 6066: ! 6067: /* It would be a lot nicer to put all in one file (we'd also get rid of ! 6068: * cputbl.h that way), but cpuopti can't cope. That could be fixed, but ! 6069: * I don't dare to touch the 68k version. */ ! 6070: ! 6071: headerfile = fopen ("cputbl.h", "wb"); ! 6072: ! 6073: stblfile = fopen ("cpustbl.c", "wb"); ! 6074: generate_includes (stblfile, 0); ! 6075: ! 6076: for (i = 0; i <= 55; i++) { 1.1.1.4 root 6077: if (i!=31 && i!=32) 1.1.1.5 ! root 6078: continue; ! 6079: generate_stbl = 1; ! 6080: generate_cpu (i, 0); ! 6081: } ! 6082: ! 6083: free (table68k); ! 6084: return 0; 1.1.1.4 root 6085: } 6086: 6087: void write_log (const TCHAR *format,...) 6088: { 6089: }
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