Annotation of previous/src/cpu/mmu_common.h, revision 1.1.1.4

1.1.1.3   root        1: #ifndef UAE_MMU_COMMON_H
                      2: #define UAE_MMU_COMMON_H
1.1       root        3: 
1.1.1.2   root        4: #define MMUDEBUG 0
                      5: #define MMUINSDEBUG 0
                      6: #define MMUDEBUGMISC 0
                      7: 
                      8: #ifdef __cplusplus
1.1       root        9: struct m68k_exception {
                     10:        int prb;
                     11:        m68k_exception (int exc) : prb (exc) {}
                     12:        operator int() { return prb; }
                     13: };
                     14: #define SAVE_EXCEPTION
                     15: #define RESTORE_EXCEPTION
                     16: #define TRY(var) try
                     17: #define CATCH(var) catch(m68k_exception var)
                     18: #define THROW(n) throw m68k_exception(n)
                     19: #define THROW_AGAIN(var) throw
1.1.1.2   root       20: #define ENDTRY
1.1       root       21: #else
                     22: /* we are in plain C, just use a stack of long jumps */
                     23: #include <setjmp.h>
1.1.1.4 ! root       24: extern sigjmp_buf __exbuf;
1.1       root       25: extern int     __exvalue;
1.1.1.4 ! root       26: #define TRY(DUMMY)       __exvalue=sigsetjmp(__exbuf, 0);       \
1.1       root       27:                   if (__exvalue==0) { __pushtry(&__exbuf);
1.1.1.3   root       28: #define CATCH(x)  __poptry(); } else {m68k_exception x=__exvalue; x=x;
1.1       root       29: #define ENDTRY    __poptry();}
1.1.1.4 ! root       30: #define THROW(x) if (__is_catched()) {siglongjmp(__exbuf,x);}
        !            31: #define THROW_AGAIN(var) if (__is_catched()) siglongjmp(*__poptry(),__exvalue)
1.1       root       32: #define SAVE_EXCEPTION
                     33: #define RESTORE_EXCEPTION
1.1.1.4 ! root       34: sigjmp_buf* __poptry(void);
        !            35: void __pushtry(sigjmp_buf *j);
1.1       root       36: int __is_catched(void);
                     37: 
                     38: typedef  int m68k_exception;
                     39: 
                     40: #endif
                     41: 
                     42: /* special status word (access error stack frame) */
1.1.1.2   root       43: /* 68060 */
                     44: #define MMU_FSLW_MA            0x08000000
                     45: #define MMU_FSLW_LK            0x02000000
                     46: #define MMU_FSLW_R             0x01000000
                     47: #define MMU_FSLW_W             0x00800000
                     48: #define MMU_FSLW_SIZE_L        0x00000000 /* Note: wrong in mc68060 manual! */
                     49: #define MMU_FSLW_SIZE_B        0x00200000
                     50: #define MMU_FSLW_SIZE_W        0x00400000
                     51: #define MMU_FSLW_SIZE_D        0x00600000
                     52: #define MMU_FSLW_TT            0x00180000
                     53: #define MMU_FSLW_TT_N  0x00000000 /* Normal access */
                     54: #define MMU_FSLW_TT_16  0x00080000 /* MOVE16 */
                     55: #define MMU_FSLW_TM            0x00070000 /* = function code */
                     56: #define MMU_FSLW_IO            0x00008000
                     57: #define MMU_FSLW_PBE   0x00004000
                     58: #define MMU_FSLW_SBE   0x00002000
                     59: #define MMU_FSLW_PTA   0x00001000
                     60: #define MMU_FSLW_PTB   0x00000800
                     61: #define MMU_FSLW_IL            0x00000400
                     62: #define MMU_FSLW_PF            0x00000200
                     63: #define MMU_FSLW_SP            0x00000100
                     64: #define MMU_FSLW_WP            0x00000080
                     65: #define MMU_FSLW_TWE   0x00000040
                     66: #define MMU_FSLW_RE            0x00000020
                     67: #define MMU_FSLW_WE            0x00000010
                     68: #define MMU_FSLW_TTR   0x00000008
                     69: #define MMU_FSLW_BPE   0x00000004
                     70: #define MMU_FSLW_SEE   0x00000001
                     71: /* 68040 */
1.1       root       72: #define MMU_SSW_TM             0x0007
                     73: #define MMU_SSW_TT             0x0018
1.1.1.2   root       74: #define MMU_SSW_TT1            0x0010
                     75: #define MMU_SSW_TT0            0x0008
1.1       root       76: #define MMU_SSW_SIZE   0x0060
                     77: #define MMU_SSW_SIZE_B 0x0020
                     78: #define MMU_SSW_SIZE_W 0x0040
                     79: #define MMU_SSW_SIZE_L 0x0000
1.1.1.2   root       80: #define MMU_SSW_SIZE_CL        0x0060
1.1       root       81: #define MMU_SSW_RW             0x0100
                     82: #define MMU_SSW_LK             0x0200
                     83: #define MMU_SSW_ATC            0x0400
                     84: #define MMU_SSW_MA             0x0800
                     85: #define MMU_SSW_CM     0x1000
                     86: #define MMU_SSW_CT     0x2000
                     87: #define MMU_SSW_CU     0x4000
                     88: #define MMU_SSW_CP     0x8000
1.1.1.2   root       89: /* 68030 */
1.1       root       90: #define MMU030_SSW_FC       0x8000
                     91: #define MMU030_SSW_FB       0x4000
                     92: #define MMU030_SSW_RC       0x2000
                     93: #define MMU030_SSW_RB       0x1000
                     94: #define MMU030_SSW_DF       0x0100
                     95: #define MMU030_SSW_RM       0x0080
                     96: #define MMU030_SSW_RW       0x0040
                     97: #define MMU030_SSW_SIZE_MASK    0x0030
1.1.1.2   root       98: #define MMU030_SSW_SIZE_B       0x0010
                     99: #define MMU030_SSW_SIZE_W       0x0020
                    100: #define MMU030_SSW_SIZE_L       0x0000
1.1       root      101: #define MMU030_SSW_FC_MASK      0x0007
                    102: 
                    103: 
1.1.1.4 ! root      104: #define ALWAYS_INLINE inline
1.1       root      105: 
                    106: // take care of 2 kinds of alignement, bus size and page
1.1.1.2   root      107: #if 1
1.1.1.3   root      108: static ALWAYS_INLINE bool is_unaligned(uaecptr addr, int size)
1.1       root      109: {
1.1.1.2   root      110:     return unlikely((addr & (size - 1)) && (addr ^ (addr + size - 1)) & regs.mmu_page_size);
1.1       root      111: }
1.1.1.2   root      112: #else
1.1.1.3   root      113: static ALWAYS_INLINE bool is_unaligned(uaecptr addr, int size)
1.1.1.2   root      114: {
                    115:     return (addr & (size - 1));
                    116: }
                    117: #endif
1.1       root      118: 
                    119: static ALWAYS_INLINE void phys_put_long(uaecptr addr, uae_u32 l)
                    120: {
                    121:     longput(addr, l);
                    122: }
                    123: static ALWAYS_INLINE void phys_put_word(uaecptr addr, uae_u32 w)
                    124: {
                    125:     wordput(addr, w);
                    126: }
                    127: static ALWAYS_INLINE void phys_put_byte(uaecptr addr, uae_u32 b)
                    128: {
                    129:     byteput(addr, b);
                    130: }
                    131: static ALWAYS_INLINE uae_u32 phys_get_long(uaecptr addr)
                    132: {
                    133:     return longget (addr);
                    134: }
                    135: static ALWAYS_INLINE uae_u32 phys_get_word(uaecptr addr)
                    136: {
                    137:     return wordget (addr);
                    138: }
                    139: static ALWAYS_INLINE uae_u32 phys_get_byte(uaecptr addr)
                    140: {
                    141:     return byteget (addr);
                    142: }
                    143: 
1.1.1.3   root      144: #endif /* UAE_MMU_COMMON_H */

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