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1.1 root 1: /*
2: * UAE - The Un*x Amiga Emulator
3: *
4: * MC68000 emulation
5: *
6: * Copyright 1995 Bernd Schmidt
7: */
8:
9: #ifndef NEWCPU_H
10: #define NEWCPU_H
11:
12: #include "readcpu.h"
13: //#include "machdep/m68k.h"
14: #include "m68k.h"
15: #include "compat.h"
16: #include "maccess.h"
17: #include "events.h"
18: #include "memory.h"
19: #include "custom.h"
20:
21: /* Possible exceptions sources for M68000_Exception() and Exception() */
22: #define M68000_EXC_SRC_CPU 1 /* Direct CPU exception */
23: #define M68000_EXC_SRC_AUTOVEC 2 /* Auto-vector exception (e.g. VBL) */
24: #define M68000_EXC_SRC_INT_MFP 3 /* MFP interrupt exception */
25: #define M68000_EXC_SRC_INT_DSP 4 /* DSP interrupt exception */
26:
27:
28: /* Special flags */
29: #define SPCFLAG_DEBUGGER 1
30: #define SPCFLAG_STOP 2
31: #define SPCFLAG_BUSERROR 4
32: #define SPCFLAG_INT 8
33: #define SPCFLAG_BRK 0x10
34: #define SPCFLAG_EXTRA_CYCLES 0x20
35: #define SPCFLAG_TRACE 0x40
36: #define SPCFLAG_DOTRACE 0x80
37: #define SPCFLAG_DOINT 0x100
38: #define SPCFLAG_MFP 0x200
39: #define SPCFLAG_EXEC 0x400
40: #define SPCFLAG_MODE_CHANGE 0x800
41:
42:
43: #ifndef SET_CFLG
44:
45: #define SET_CFLG(x) (CFLG() = (x))
46: #define SET_NFLG(x) (NFLG() = (x))
47: #define SET_VFLG(x) (VFLG() = (x))
48: #define SET_ZFLG(x) (ZFLG() = (x))
49: #define SET_XFLG(x) (XFLG() = (x))
50:
51: #define GET_CFLG() CFLG()
52: #define GET_NFLG() NFLG()
53: #define GET_VFLG() VFLG()
54: #define GET_ZFLG() ZFLG()
55: #define GET_XFLG() XFLG()
56:
57: #define CLEAR_CZNV() do { \
58: SET_CFLG (0); \
59: SET_ZFLG (0); \
60: SET_NFLG (0); \
61: SET_VFLG (0); \
62: } while (0)
63:
64: #define COPY_CARRY() (SET_XFLG (GET_CFLG ()))
65: #endif
66:
67: extern const int areg_byteinc[];
68: extern const int imm8_table[];
69:
70: extern int movem_index1[256];
71: extern int movem_index2[256];
72: extern int movem_next[256];
73:
74: #ifdef FPUEMU
75: extern int fpp_movem_index1[256];
76: extern int fpp_movem_index2[256];
77: extern int fpp_movem_next[256];
78: #endif
79:
80: extern int OpcodeFamily;
81:
82: typedef unsigned long REGPARAM3 cpuop_func (uae_u32) REGPARAM;
83: typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
84:
85: struct cputbl {
86: cpuop_func *handler;
87: uae_u16 opcode;
88: };
89:
90: #ifdef JIT
91: typedef unsigned long REGPARAM3 compop_func (uae_u32) REGPARAM;
92:
93: struct comptbl {
94: compop_func *handler;
95: uae_u32 opcode;
96: int specific;
97: };
98: #endif
99:
100: extern unsigned long REGPARAM3 op_illg (uae_u32) REGPARAM;
101:
102: typedef uae_u8 flagtype;
103:
104: #ifdef FPUEMU
105: /* You can set this to long double to be more accurate. However, the
106: resulting alignment issues will cost a lot of performance in some
107: apps */
1.1.1.2 root 108: #define USE_LONG_DOUBLE 1
1.1 root 109:
110: #if USE_LONG_DOUBLE
111: typedef long double fptype;
112: #define LDPTR tbyte ptr
113: #else
114: typedef double fptype;
115: #define LDPTR qword ptr
116: #endif
117: #endif
118:
119: #define CPU_PIPELINE_MAX 2
120: #define CPU000_MEM_CYCLE 4
121: #define CPU000_CLOCK_MULT 2
122: #define CPU020_MEM_CYCLE 3
123: #define CPU020_CLOCK_MULT 4
124:
125: #define CACHELINES020 64
126: struct cache020
127: {
128: uae_u32 data;
129: uae_u32 tag;
130: bool valid;
131: };
132:
133: #define CACHELINES030 16
134: struct cache030
135: {
136: uae_u32 data[4];
137: bool valid[4];
138: uae_u32 tag;
139: };
140:
141: #define CACHESETS040 64
142: #define CACHELINES040 4
143: struct cache040
144: {
145: uae_u32 data[CACHELINES040][4];
146: bool valid[CACHELINES040];
147: uae_u32 tag[CACHELINES040];
148: };
149:
1.1.1.3 ! root 150: uae_u64 srp_030, crp_030;
! 151: uae_u32 tt0_030, tt1_030, tc_030;
! 152: uae_u16 mmusr_030;
! 153:
! 154: struct mmufixup
! 155: {
! 156: int reg;
! 157: uae_u32 value;
! 158: };
! 159: extern struct mmufixup mmufixup[2];
1.1 root 160:
161: struct regstruct
162: {
163: uae_u32 regs[16];
164:
165: uae_u32 pc;
166: uae_u8 *pc_p;
167: uae_u8 *pc_oldp;
168:
169: uae_u16 irc, ir;
170: uae_u32 spcflags;
171:
172: uaecptr usp, isp, msp;
173: uae_u16 sr;
174: flagtype t1;
175: flagtype t0;
176: flagtype s;
177: flagtype m;
178: flagtype x;
179: flagtype stopped;
180: int intmask;
181: int ipl, ipl_pin;
182:
183: uae_u32 vbr, sfc, dfc;
184:
185: #ifdef FPUEMU
186: fptype fp[8];
187: fptype fp_result;
188:
189: uae_u32 fpcr, fpsr, fpiar;
190: uae_u32 fpsr_highbyte;
191: #endif
192: #ifndef CPUEMU_68000_ONLY
193: uae_u32 cacr, caar;
194: uae_u32 itt0, itt1, dtt0, dtt1;
195: uae_u32 tcr, mmusr, urp, srp, buscr;
196: uae_u32 mmu_fslw, mmu_fault_addr;
197: uae_u16 mmu_ssw;
198: uae_u32 wb3_data;
199: uae_u16 wb3_status;
200: int mmu_enabled;
201: int mmu_pagesize_8k;
202: uae_u32 fault_pc;
203: #endif
204:
205: uae_u32 pcr;
206: uae_u32 address_space_mask;
207:
208: uae_u8 panic;
209: uae_u32 panic_pc, panic_addr;
210:
211: uae_u32 prefetch020data[CPU_PIPELINE_MAX];
212: uae_u32 prefetch020addr[CPU_PIPELINE_MAX];
213: int ce020memcycles;
214: };
215:
216: extern struct regstruct regs;
217:
218: STATIC_INLINE uae_u32 munge24 (uae_u32 x)
219: {
220: return x & regs.address_space_mask;
221: }
222:
223: extern int mmu_enabled, mmu_triggered;
224: extern int cpu_cycles;
225: extern int cpucycleunit;
226: STATIC_INLINE void set_special (uae_u32 x)
227: {
228: regs.spcflags |= x;
229: cycles_do_special ();
230: }
231:
232: STATIC_INLINE void unset_special (uae_u32 x)
233: {
234: regs.spcflags &= ~x;
235: }
236:
237: #define m68k_dreg(r,num) ((r).regs[(num)])
238: #define m68k_areg(r,num) (((r).regs + 8)[(num)])
239:
240: STATIC_INLINE void m68k_setpc (uaecptr newpc)
241: {
242: regs.pc_p = regs.pc_oldp = get_real_address (newpc);
243: regs.fault_pc = regs.pc = newpc;
244: }
245:
246: STATIC_INLINE uaecptr m68k_getpc (void)
247: {
248: return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
249: }
250: #define M68K_GETPC m68k_getpc()
251:
252: STATIC_INLINE uaecptr m68k_getpc_p (uae_u8 *p)
253: {
254: return (uaecptr)(regs.pc + ((uae_u8*)p - (uae_u8*)regs.pc_oldp));
255: }
256:
257: STATIC_INLINE void fill_prefetch_0 (void)
258: {
259: }
260:
261: #define fill_prefetch_2 fill_prefetch_0
262:
263: STATIC_INLINE void m68k_incpc (int o)
264: {
265: regs.pc_p += o;
266: }
267:
268: STATIC_INLINE void m68k_setpc_mmu (uaecptr newpc)
269: {
270: regs.fault_pc = regs.pc = newpc;
271: regs.pc_p = regs.pc_oldp = 0;
272: }
273: STATIC_INLINE void m68k_setpci (uaecptr newpc)
274: {
275: regs.fault_pc = regs.pc = newpc;
276: }
277: STATIC_INLINE uaecptr m68k_getpci (void)
278: {
279: return regs.pc;
280: }
281: STATIC_INLINE void m68k_incpci (int o)
282: {
283: regs.pc += o;
284: }
285:
286: STATIC_INLINE void m68k_do_rts (void)
287: {
288: uae_u32 newpc = get_long (m68k_areg (regs, 7));
289: m68k_setpc (newpc);
290: m68k_areg (regs, 7) += 4;
291: }
292: STATIC_INLINE void m68k_do_rtsi (void)
293: {
294: m68k_setpci (get_long (m68k_areg (regs, 7)));
295: m68k_areg (regs, 7) += 4;
296: }
297:
298: STATIC_INLINE void m68k_do_bsr (uaecptr oldpc, uae_s32 offset)
299: {
300: m68k_areg (regs, 7) -= 4;
301: put_long (m68k_areg (regs, 7), oldpc);
302: m68k_incpc (offset);
303: }
304: STATIC_INLINE void m68k_do_bsri (uaecptr oldpc, uae_s32 offset)
305: {
306: m68k_areg (regs, 7) -= 4;
307: put_long (m68k_areg (regs, 7), oldpc);
308: m68k_incpci (offset);
309: }
310:
311: STATIC_INLINE uae_u32 get_ibyte (int o)
312: {
313: return do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1));
314: }
315: STATIC_INLINE uae_u32 get_iword (int o)
316: {
317: return do_get_mem_word((uae_u16 *)((regs).pc_p + (o)));
318: }
319: STATIC_INLINE uae_u32 get_ilong (int o)
320: {
321: return do_get_mem_long((uae_u32 *)((regs).pc_p + (o)));
322: }
323:
324: #define get_iwordi(o) get_wordi(o)
325: #define get_ilongi(o) get_longi(o)
326:
327: /* These are only used by the 68020/68881 code, and therefore don't
328: * need to handle prefetch. */
329: STATIC_INLINE uae_u32 next_ibyte (void)
330: {
331: uae_u32 r = get_ibyte (0);
332: m68k_incpc (2);
333: return r;
334: }
335: STATIC_INLINE uae_u32 next_iword (void)
336: {
337: uae_u32 r = get_iword (0);
338: m68k_incpc (2);
339: return r;
340: }
341: STATIC_INLINE uae_u32 next_iwordi (void)
342: {
343: uae_u32 r = get_iwordi (m68k_getpci ());
344: m68k_incpc (2);
345: return r;
346: }
347: STATIC_INLINE uae_u32 next_ilong (void)
348: {
349: uae_u32 r = get_ilong (0);
350: m68k_incpc (4);
351: return r;
352: }
353: STATIC_INLINE uae_u32 next_ilongi (void)
354: {
355: uae_u32 r = get_ilongi (m68k_getpci ());
356: m68k_incpc (4);
357: return r;
358: }
359:
360: extern uae_u32 (*x_get_byte)(uaecptr addr);
361: extern uae_u32 (*x_get_word)(uaecptr addr);
362: extern uae_u32 (*x_get_long)(uaecptr addr);
363: extern void (*x_put_byte)(uaecptr addr, uae_u32 v);
364: extern void (*x_put_word)(uaecptr addr, uae_u32 v);
365: extern void (*x_put_long)(uaecptr addr, uae_u32 v);
366: extern uae_u32 (*x_next_iword)(void);
367: extern uae_u32 (*x_next_ilong)(void);
368:
369: extern uae_u32 REGPARAM3 x_get_disp_ea_020 (uae_u32 base, uae_u32 dp) REGPARAM;
370: extern uae_u32 REGPARAM3 x_get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
371: extern void REGPARAM3 x_put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
372:
373: extern void m68k_setstopped (void);
374: extern void m68k_resumestopped (void);
375:
376: extern uae_u32 REGPARAM3 get_disp_ea_020 (uae_u32 base, uae_u32 dp) REGPARAM;
377: extern uae_u32 REGPARAM3 get_disp_ea_000 (uae_u32 base, uae_u32 dp) REGPARAM;
378: extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
379: extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
380:
381: extern void m68k_disasm_ea (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt, uae_u32 *seaddr, uae_u32 *deaddr);
382: extern void m68k_disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt);
383: extern int get_cpu_model (void);
384:
385: extern void REGPARAM3 MakeSR (void) REGPARAM;
386: extern void REGPARAM3 MakeFromSR (void) REGPARAM;
387: extern void MakeSR (void);
388: extern void MakeFromSR (void);
389: extern void REGPARAM3 Exception (int, uaecptr, int) REGPARAM;
390: extern void NMI (void);
391: extern void NMI_delayed (void);
392: extern void prepare_interrupt (uae_u32);
393: extern void doint (void);
394: extern void dump_counts (void);
395: extern int m68k_move2c (int, uae_u32 *);
396: extern int m68k_movec2 (int, uae_u32 *);
397: extern void m68k_divl (uae_u32, uae_u32, uae_u16, uaecptr);
398: extern void m68k_mull (uae_u32, uae_u32, uae_u16);
399: extern void init_m68k (void);
400: extern void init_m68k_full (void);
401: extern void m68k_go (int);
402: extern void m68k_dumpstate (FILE *, uaecptr *);
403: extern void m68k_disasm (FILE *, uaecptr, uaecptr *, int);
404: extern void sm68k_disasm (TCHAR*, TCHAR*, uaecptr addr, uaecptr *nextpc);
405: extern void m68k_reset (int);
406: extern int getDivu68kCycles (uae_u32 dividend, uae_u16 divisor);
407: extern int getDivs68kCycles (uae_s32 dividend, uae_s16 divisor);
408: extern void m68k_do_rte (void);
409:
410: extern void mmu_op (uae_u32, uae_u32);
411: extern void mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
412:
413: extern void fpuop_arithmetic(uae_u32, uae_u16);
414: extern void fpuop_dbcc(uae_u32, uae_u16);
415: extern void fpuop_scc(uae_u32, uae_u16);
416: extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
417: extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
418: extern void fpuop_save(uae_u32);
419: extern void fpuop_restore(uae_u32);
420: extern uae_u32 fpp_get_fpsr (void);
421: extern void fpu_reset (void);
422: extern void fpux_save (int*);
423: extern void fpux_restore (int*);
424:
425: extern void exception3 (uae_u32 opcode, uaecptr addr, uaecptr fault);
426: extern void exception3i (uae_u32 opcode, uaecptr addr, uaecptr fault);
427: extern void exception2 (uaecptr addr, uaecptr fault);
428: extern void cpureset (void);
429:
430: extern void fill_prefetch_slow (void);
431:
432: #define CPU_OP_NAME(a) op ## a
433:
434: /* 68060 */
435: extern const struct cputbl op_smalltbl_0_ff[];
436: extern const struct cputbl op_smalltbl_20_ff[]; // CE
437: /* 68040 */
438: extern const struct cputbl op_smalltbl_1_ff[];
439: extern const struct cputbl op_smalltbl_21_ff[]; // CE
440: extern const struct cputbl op_smalltbl_31_ff[]; // MMU
441: /* 68030 */
442: extern const struct cputbl op_smalltbl_2_ff[];
443: extern const struct cputbl op_smalltbl_22_ff[]; // CE
1.1.1.3 ! root 444: extern const struct cputbl op_smalltbl_32_ff[]; // MMU
1.1 root 445: /* 68020 */
446: extern const struct cputbl op_smalltbl_3_ff[];
447: extern const struct cputbl op_smalltbl_23_ff[]; // CE
448: /* 68010 */
449: extern const struct cputbl op_smalltbl_4_ff[];
450: /* 68000 */
451: extern const struct cputbl op_smalltbl_5_ff[];
452: /* 68000 slow but compatible. */
453: extern const struct cputbl op_smalltbl_11_ff[];
454: /* 68000 slow but compatible and cycle-exact. */
455: extern const struct cputbl op_smalltbl_12_ff[];
456:
457: extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
458:
459: /* Added for hatari_glue.c */
460: extern void build_cpufunctbl(void);
461:
462: #ifdef JIT
463: extern void flush_icache (uaecptr, int);
464: extern void compemu_reset (void);
465: extern bool check_prefs_changed_comp (void);
466: #else
467: #define flush_icache(uaecptr, int) do {} while (0)
468: #endif
469: extern void flush_dcache (uaecptr, int);
470: extern void flush_mmu (uaecptr, int);
471:
472: extern int movec_illg (int regno);
473: extern uae_u32 val_move2c (int regno);
474: extern void val_move2c2 (int regno, uae_u32 val);
475: struct cpum2c {
476: int regno;
477: const TCHAR *regname;
478: };
479: extern struct cpum2c m2cregs[];
480:
481: /* Family of the latest instruction executed (to check for pairing) */
482: extern int OpcodeFamily; /* see instrmnem in readcpu.h */
483:
484: /* How many cycles to add to the current instruction in case a "misaligned" bus acces is made */
485: /* (used when addressing mode is d8(an,ix)) */
486: extern int BusCyclePenalty;
487:
488: STATIC_INLINE uae_u32 get_iword_prefetch (uae_s32 o)
489: {
490: /* Laurent : let's see this later
491: uae_u32 currpc = m68k_getpc ();
492: uae_u32 addr = currpc + o;
493: uae_u32 offs = addr - prefetch_pc;
494: uae_u32 v;
495: if (offs > 3) {
496: refill_prefetch (currpc, o);
497: offs = addr - prefetch_pc;
498: }
499: v = do_get_mem_word (((uae_u8 *)&prefetch) + offs);
500: if (offs >= 2)
501: refill_prefetch (currpc, 2);
502: */
503: /* printf ("get_iword PC %lx ADDR %lx OFFS %lx V %lx\n", currpc, addr, offs, v); */
504: //return v;
505: return 0;
506: }
507:
508: #endif
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