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1.1 root 1: #include "main.h"
2: #include "configuration.h"
3: #include "m68000.h"
4: #include "dimension.h"
5: #include "sysdeps.h"
6: #include "sysReg.h"
7: #include "nd_nbic.h"
8: #include "i860cfg.h"
9:
10: #if ENABLE_DIMENSION
11:
12: /* NeXTdimention NBIC */
13: #define ND_NBIC_ID 0xC0000001
14: #define ND_NBIC_INTR 0x80
15:
16: static
17: #if ENABLE_I860_THREAD
18: volatile
19: #endif
20: struct {
21: Uint32 control;
22: Uint32 id;
23: Uint8 intstatus;
24: Uint8 intmask;
25: } nd_nbic;
26:
27:
28: Uint8 nd_nbic_control_read0(Uint32 addr) {
29: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC Control (byte 0) read at %08X",addr);
30: return (nd_nbic.control>>24);
31: }
32: Uint8 nd_nbic_control_read1(Uint32 addr) {
33: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC Control (byte 1) read at %08X",addr);
34: return (nd_nbic.control>>16);
35: }
36: Uint8 nd_nbic_control_read2(Uint32 addr) {
37: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC Control (byte 2) read at %08X",addr);
38: return (nd_nbic.control>>8);
39: }
40: Uint8 nd_nbic_control_read3(Uint32 addr) {
41: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC Control (byte 3) read at %08X",addr);
42: return nd_nbic.control;
43: }
44:
45: void nd_nbic_control_write0(Uint32 addr, Uint8 val) {
46: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC Control (byte 0) write %02X at %08X",val,addr);
47: nd_nbic.control &= 0x00FFFFFF;
48: nd_nbic.control |= (val&0xFF)<<24;
49: }
50: void nd_nbic_control_write1(Uint32 addr, Uint8 val) {
51: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC Control (byte 1) write %02X at %08X",val,addr);
52: nd_nbic.control &= 0xFF00FFFF;
53: nd_nbic.control |= (val&0xFF)<<16;
54: }
55: void nd_nbic_control_write2(Uint32 addr, Uint8 val) {
56: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC Control (byte 2) write %02X at %08X",val,addr);
57: nd_nbic.control &= 0xFFFF00FF;
58: nd_nbic.control |= (val&0xFF)<<8;
59: }
60: void nd_nbic_control_write3(Uint32 addr, Uint8 val) {
61: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC Control (byte 3) write %02X at %08X",val,addr);
62: nd_nbic.control &= 0xFFFFFF00;
63: nd_nbic.control |= val&0xFF;
64: }
65:
66:
67: Uint8 nd_nbic_id_read0(Uint32 addr) {
68: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC ID (byte 0) read at %08X",addr);
69: return (nd_nbic.id>>24);
70: }
71: Uint8 nd_nbic_id_read1(Uint32 addr) {
72: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC ID (byte 1) read at %08X",addr);
73: return (nd_nbic.id>>16);
74: }
75: Uint8 nd_nbic_id_read2(Uint32 addr) {
76: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC ID (byte 2) read at %08X",addr);
77: return (nd_nbic.id>>8);
78: }
79: Uint8 nd_nbic_id_read3(Uint32 addr) {
80: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC ID (byte 3) read at %08X",addr);
81: return nd_nbic.id;
82: }
83:
84: void nd_nbic_id_write0(Uint32 addr, Uint8 val) {
85: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC ID (byte 0) write %02X at %08X",val,addr);
86: nd_nbic.id &= 0x00FFFFFF;
87: nd_nbic.id |= (val&0xFF)<<24;
88: }
89: void nd_nbic_id_write1(Uint32 addr, Uint8 val) {
90: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC ID (byte 1) write %02X at %08X",val,addr);
91: nd_nbic.id &= 0xFF00FFFF;
92: nd_nbic.id |= (val&0xFF)<<16;
93: }
94: void nd_nbic_id_write2(Uint32 addr, Uint8 val) {
95: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC ID (byte 2) write %02X at %08X",val,addr);
96: nd_nbic.id &= 0xFFFF00FF;
97: nd_nbic.id |= (val&0xFF)<<8;
98: }
99: void nd_nbic_id_write3(Uint32 addr, Uint8 val) {
100: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC ID (byte 3) write %02X at %08X",val,addr);
101: nd_nbic.id &= 0xFFFFFF00;
102: nd_nbic.id |= val&0xFF;
103: }
104:
105: Uint8 nd_nbic_intstatus_read(Uint32 addr) {
106: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC Interrupt status read at %08X",addr);
107: return nd_nbic.intstatus;
108: }
109:
110: Uint8 nd_nbic_intmask_read(Uint32 addr) {
111: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC Interrupt mask read at %08X",addr);
112: return nd_nbic.intmask;
113: }
114: void nd_nbic_intmask_write(Uint32 addr, Uint8 val) {
115: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC Interrupt mask write %02X at %08X",val,addr);
116: nd_nbic.intmask = val;
117: }
118:
119: Uint8 nd_nbic_zero_read(Uint32 addr) {
120: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC zero read at %08X",addr);
121: return 0;
122: }
123: void nd_nbic_zero_write(Uint32 addr, Uint8 val) {
124: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC zero write %02X at %08X",val,addr);
125: }
126:
127: Uint8 nd_nbic_bus_error_read(Uint32 addr) {
128: Log_Printf(ND_LOG_IO_RD, "[ND] NBIC bus error read at %08X",addr);
129: M68000_BusError(addr, 1);
130: return 0;
131: }
132: void nd_nbic_bus_error_write(Uint32 addr, Uint8 val) {
133: Log_Printf(ND_LOG_IO_WR, "[ND] NBIC bus error write at %08X",addr);
134: M68000_BusError(addr, 0);
135: }
136:
137: static Uint8 (*nd_nbic_read[32])(Uint32) = {
138: nd_nbic_bus_error_read, nd_nbic_bus_error_read, nd_nbic_bus_error_read, nd_nbic_bus_error_read,
139: nd_nbic_bus_error_read, nd_nbic_bus_error_read, nd_nbic_bus_error_read, nd_nbic_bus_error_read,
140: nd_nbic_intstatus_read, nd_nbic_zero_read, nd_nbic_zero_read, nd_nbic_zero_read,
141: nd_nbic_intmask_read, nd_nbic_zero_read, nd_nbic_zero_read, nd_nbic_zero_read,
142:
143: nd_nbic_id_read0, nd_nbic_zero_read, nd_nbic_zero_read, nd_nbic_zero_read,
144: nd_nbic_id_read1, nd_nbic_zero_read, nd_nbic_zero_read, nd_nbic_zero_read,
145: nd_nbic_id_read2, nd_nbic_zero_read, nd_nbic_zero_read, nd_nbic_zero_read,
146: nd_nbic_id_read3, nd_nbic_zero_read, nd_nbic_zero_read, nd_nbic_zero_read,
147: };
148:
149: static void (*nd_nbic_write[32])(Uint32, Uint8) = {
150: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write,
151: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write,
152: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write,
153: nd_nbic_intmask_write, nd_nbic_zero_write, nd_nbic_zero_write, nd_nbic_zero_write,
154:
155: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write,
156: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write,
157: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write,
158: nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write, nd_nbic_bus_error_write
159: };
160:
161:
162: /* NeXTdimension NBIC access */
163: Uint32 nd_nbic_lget(Uint32 addr) {
164: Uint32 val = 0;
165:
166: if (addr&3) {
167: Log_Printf(LOG_WARN, "[ND] NBIC Unaligned access at %08X.",addr);
168: abort();
169: }
170: val = nd_nbic_read[addr&0x1F](addr)<<24;
171: val |= nd_nbic_read[(addr&0x1F)+1](addr+1)<<16;
172: val |= nd_nbic_read[(addr&0x1F)+2](addr+2)<<8;
173: val |= nd_nbic_read[(addr&0x1F)+3](addr+3);
174:
175: return val;
176: }
177:
178: Uint16 nd_nbic_wget(Uint32 addr) {
179: Uint32 val = 0;
180:
181: if (addr&1) {
182: Log_Printf(LOG_WARN, "[ND] NBIC Unaligned access at %08X.",addr);
183: abort();
184: }
185: val = nd_nbic_read[addr&0x1F](addr)<<8;
186: val |= nd_nbic_read[(addr&0x1F)+1](addr+1)<<16;
187:
188: return val;
189: }
190:
191: Uint8 nd_nbic_bget(Uint32 addr) {
192: return nd_nbic_read[addr&0x1F](addr);
193: }
194:
195: void nd_nbic_lput(Uint32 addr, Uint32 l) {
196: if (addr&3) {
197: Log_Printf(LOG_WARN, "[ND] NBIC Unaligned access at %08X.",addr);
198: abort();
199: }
200: nd_nbic_write[addr&0x1F](addr,l>>24);
201: nd_nbic_write[(addr&0x1F)+1](addr,l>>16);
202: nd_nbic_write[(addr&0x1F)+2](addr,l>>8);
203: nd_nbic_write[(addr&0x1F)+3](addr,l);
204: }
205:
206: void nd_nbic_wput(Uint32 addr, Uint16 w) {
207: if (addr&1) {
208: Log_Printf(LOG_WARN, "[ND] NBIC Unaligned access at %08X.",addr);
209: abort();
210: }
211: nd_nbic_write[addr&0x1F](addr,w>>8);
212: nd_nbic_write[(addr&0x1F)+1](addr,w);
213: }
214:
215: void nd_nbic_bput(Uint32 addr, Uint8 b) {
216: nd_nbic_write[addr&0x1F](addr,b);
217: }
218:
219: /* Interrupt functions */
220: void nd_nbic_interrupt(void) {
221: if (nd_nbic.intmask&nd_nbic.intstatus&ND_NBIC_INTR) {
222: set_interrupt(INT_REMOTE, SET_INT);
223: } else {
224: set_interrupt(INT_REMOTE, RELEASE_INT);
225: }
226: }
227:
228: void nd_nbic_set_intstatus(bool set) {
229: if (set) {
230: nd_nbic.intstatus |= ND_NBIC_INTR;
231: } else {
232: nd_nbic.intstatus &= ~ND_NBIC_INTR;
233: }
234: }
235:
236:
237: /* Reset function */
238:
239: void nd_nbic_init(void) {
240: nd_nbic.id = ND_NBIC_ID;
241: /* Release any interrupt that may be pending */
242: nd_nbic.intmask = 0;
243: nd_nbic.intstatus = 0;
244: set_interrupt(INT_REMOTE, RELEASE_INT);
245: }
246:
247: #endif
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