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1.1 root 1: #include "main.h"
2: #include "configuration.h"
3: #include "m68000.h"
4: #include "sysdeps.h"
5: #include "sysReg.h"
6: #include "nd_nbic.hpp"
7: #include "dimension.hpp"
8: #include "log.h"
9:
10: /* NeXTdimention NBIC */
11: #define ND_NBIC_INTR 0x80
12:
13: NBIC::NBIC(int slot, int id) : slot(slot), id(id) {}
14:
15: Uint8 NBIC::read(int addr) {
16: switch(addr&0x1F) {
17: case 0x00:
18: case 0x01:
19: case 0x02:
20: case 0x03:
21: case 0x04:
22: case 0x05:
23: case 0x06:
24: case 0x07:
25: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC bus error read at %08X", slot,addr);
26: M68000_BusError(addr, 1);
27: return 0;
28:
29: case 0x08:
30: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC Interrupt status read at %08X", slot,addr);
31: return intstatus;
32: case 0x0C:
33: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC Interrupt mask read at %08X", slot,addr);
34: return intmask;
35:
36: case 0x10:
37: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC ID (byte 0) read at %08X", slot, addr);
38: return (id>>24);
39: case 0x14:
40: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC ID (byte 1) read at %08X", slot,addr);
41: return (id>>16);
42: case 0x18:
43: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC ID (byte 2) read at %08X", slot,addr);
44: return (id>>8);
45: case 0x1C:
46: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC ID (byte 3) read at %08X", slot,addr);
47: return id;
48: default:
49: Log_Printf(ND_LOG_IO_RD, "[ND] Slot %i: NBIC zero read at %08X", slot,addr);
50: return 0;
51: }
52: }
53:
54: void NBIC::write(int addr, Uint8 val) {
55: switch(addr&0x1F) {
56: case 0x0C:
57: Log_Printf(ND_LOG_IO_WR, "[ND] Slot %i: NBIC Interrupt mask write %02X at %08X", slot,val,addr);
58: intmask = val;
59: if(val & ND_NBIC_INTR)
60: remInterMask |= 1 << slot;
61: else
62: remInterMask &= ~(1 << slot);
63: break;
64: case 0x0D:
65: case 0x0E:
66: case 0x0F:
67: Log_Printf(ND_LOG_IO_WR, "[ND] Slot %i: NBIC zero write %02X at %08X", slot,val,addr);
68: break;
69: default:
70: Log_Printf(ND_LOG_IO_WR, "[ND] Slot %i: NBIC bus error write at %08X", slot,addr);
71: M68000_BusError(addr, 0);
72: break;
73: }
74: }
75:
76: /* NeXTdimension NBIC access */
77: Uint32 NBIC::lget(Uint32 addr) {
78: Uint32 val = 0;
79:
80: if (addr&3) {
81: Log_Printf(LOG_WARN, "[ND] Slot %i: NBIC Unaligned access at %08X.", slot, addr);
82: abort();
83: }
84: val = read(addr)<<24;
85: val |= read(addr+1)<<16;
86: val |= read(addr+2)<<8;
87: val |= read(addr+3);
88:
89: return val;
90: }
91:
92: Uint16 NBIC::wget(Uint32 addr) {
93: Uint32 val = 0;
94:
95: if (addr&1) {
96: Log_Printf(LOG_WARN, "[ND] Slot %i: NBIC Unaligned access at %08X.", slot, addr);
97: abort();
98: }
99: val = read(addr)<<8;
100: val |= read(addr+1)<<16;
101:
102: return val;
103: }
104:
105: Uint8 NBIC::bget(Uint32 addr) {
106: return read(addr);
107: }
108:
109: void NBIC::lput(Uint32 addr, Uint32 l) {
110: if (addr&3) {
111: Log_Printf(LOG_WARN, "[ND] Slot %i: NBIC Unaligned access at %08X.", slot, addr);
112: abort();
113: }
114: write(addr+0,l>>24);
115: write(addr+1,l>>16);
116: write(addr+2,l>>8);
117: write(addr+2,l);
118: }
119:
120: void NBIC::wput(Uint32 addr, Uint16 w) {
121: if (addr&1) {
122: Log_Printf(LOG_WARN, "[ND] Slot %i: NBIC Unaligned access at %08X.", slot, addr);
123: abort();
124: }
125: write(addr+0,w>>8);
126: write(addr+1,w);
127: }
128:
129: void NBIC::bput(Uint32 addr, Uint8 b) {
130: write(addr,b);
131: }
132:
133: void NBIC::set_intstatus(bool set) {
134: if (set) {
135: intstatus |= ND_NBIC_INTR;
136: remInter |= 1 << slot;
137: } else {
138: intstatus &= ~ND_NBIC_INTR;
139: remInter &= ~(1 << slot);
140: }
141: }
142:
143:
144: /* Reset function */
145:
146: void NBIC::init(void) {
147: /* Release any interrupt that may be pending */
148: intmask = 0;
149: intstatus = 0;
150: remInter = 0;
151: remInterMask = 0;
152: set_interrupt(INT_REMOTE, RELEASE_INT);
153: }
154:
155: volatile Uint32 NBIC::remInter;
156: volatile Uint32 NBIC::remInterMask;
157:
158: /* Interrupt function, called from ,68k thread */
159: void nd_nbic_interrupt(void) {
160: if (NBIC::remInter&NBIC::remInterMask) {
161: set_interrupt(INT_REMOTE, SET_INT);
162: } else {
163: set_interrupt(INT_REMOTE, RELEASE_INT);
164: }
165: }
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