--- previous/src/dma.c	2018/04/24 19:29:50	1.1.1.3
+++ previous/src/dma.c	2018/04/24 19:31:14	1.1.1.4
@@ -23,27 +23,13 @@
 #include "snd.h"
 #include "dsp.h"
 #include "mmu_common.h"
-
-
+#include "kms.h"
+#include "audio.h"
 
 #define LOG_DMA_LEVEL LOG_DEBUG
 
 #define IO_SEG_MASK	0x1FFFF
 
-enum {
-    CHANNEL_SCSI,       // 0x00000010
-    CHANNEL_SOUNDOUT,   // 0x00000040
-    CHANNEL_DISK,       // 0x00000050
-    CHANNEL_SOUNDIN,    // 0x00000080
-    CHANNEL_PRINTER,    // 0x00000090
-    CHANNEL_SCC,        // 0x000000c0
-    CHANNEL_DSP,        // 0x000000d0
-    CHANNEL_EN_TX,      // 0x00000110
-    CHANNEL_EN_RX,      // 0x00000150
-    CHANNEL_VIDEO,      // 0x00000180
-    CHANNEL_M2R,        // 0x000001d0
-    CHANNEL_R2M         // 0x000001c0
-} DMA_CHANNEL;
 
 int get_channel(Uint32 address);
 int get_interrupt_type(int channel);
@@ -233,19 +219,13 @@ void DMA_CSR_Write(void) {
     }
     if (writecsr&DMA_SETENABLE) {
         dma[channel].csr |= DMA_ENABLE;
-        switch (channel) {
-            case CHANNEL_M2R:
-            case CHANNEL_R2M:
-                if (dma[channel].next==dma[channel].limit) {
-                    dma[channel].csr&= ~DMA_ENABLE;
-                }
-                if ((dma[CHANNEL_M2R].csr&DMA_ENABLE)&&(dma[CHANNEL_R2M].csr&DMA_ENABLE)) {
-                    /* Enable Memory to Memory DMA, if read and write channels are enabled */
-                    dma_m2m_write_memory();
-                }
-                break;
-                
-            default: break;
+        
+        /* Enable Memory to Memory DMA, if read and write channels are enabled */
+        if (channel == CHANNEL_R2M || channel == CHANNEL_M2R) {
+            if (dma[channel].next==dma[channel].limit) {
+                dma[channel].csr &= ~DMA_ENABLE;
+            }
+            dma_m2m();
         }
     }
     if (writecsr&DMA_CLRCOMPLETE) {
@@ -389,7 +369,7 @@ void dma_initialize_buffer(int channel,
 
 void dma_interrupt(int channel) {
     int interrupt = get_interrupt_type(channel);
-    
+
     /* If we have reached limit, generate an interrupt and set the flags */
     if (dma[channel].next==dma[channel].limit) {
         
@@ -410,19 +390,6 @@ void dma_interrupt(int channel) {
 }
 
 
-/* Functions for delayed interrupts */
-
-/* Handler functions for DMA M2M delyed interrupts */
-void M2RDMA_InterruptHandler(void) {
-    CycInt_AcknowledgeInterrupt();
-    dma_interrupt(CHANNEL_M2R);
-}
-void R2MDMA_InterruptHandler(void) {
-    CycInt_AcknowledgeInterrupt();
-    dma_interrupt(CHANNEL_R2M);
-}
-
-
 /* DMA Read and Write Memory Functions */
 
 /* Channel SCSI (shared with floppy drive) */
@@ -723,34 +690,78 @@ void dma_mo_read_memory(void) {
 }
 
 
-/* Channel Sound Out (FIXME: is this channel buffered?) */
-void dma_sndout_read_memory(void) {
+Uint8* dma_sndout_read_memory(int* len) {
+    int i;
+    Uint8* result = NULL;
+    *len          = 0;
+    
     if (dma[CHANNEL_SOUNDOUT].csr&DMA_ENABLE) {
+        
         Log_Printf(LOG_DMA_LEVEL, "[DMA] Channel Sound Out: Read from memory at $%08x, %i bytes",
                    dma[CHANNEL_SOUNDOUT].next,dma[CHANNEL_SOUNDOUT].limit-dma[CHANNEL_SOUNDOUT].next);
         
-        if ((dma[CHANNEL_SOUNDOUT].limit%4) || (dma[CHANNEL_SOUNDOUT].next%4)) {
+        if ((dma[CHANNEL_SOUNDOUT].limit&3) || (dma[CHANNEL_SOUNDOUT].next&3)) {
             Log_Printf(LOG_WARN, "[DMA] Channel Sound Out: Error! Bad alignment! (Next: $%08X, Limit: $%08X)",
                        dma[CHANNEL_SOUNDOUT].next, dma[CHANNEL_SOUNDOUT].limit);
-            abort();
+            dma[CHANNEL_SOUNDOUT].next &= ~3;
+            dma[CHANNEL_SOUNDOUT].limit &= ~3;
         }
         
         TRY(prb) {
-            while (dma[CHANNEL_SOUNDOUT].next<dma[CHANNEL_SOUNDOUT].limit && snd_buffer.size<snd_buffer.limit) {
-                snd_buffer.data[snd_buffer.size]=NEXTMemory_ReadByte(dma[CHANNEL_SOUNDOUT].next);
-                snd_buffer.size++;
-                dma[CHANNEL_SOUNDOUT].next++;
-            }
+            *len   = dma[CHANNEL_SOUNDOUT].limit - dma[CHANNEL_SOUNDOUT].next;
+            result = malloc(*len * 2);
+            for(i = 0; dma[CHANNEL_SOUNDOUT].next<dma[CHANNEL_SOUNDOUT].limit; dma[CHANNEL_SOUNDOUT].next++, i++)
+                result[i] = NEXTMemory_ReadByte(dma[CHANNEL_SOUNDOUT].next);
         } CATCH(prb) {
             Log_Printf(LOG_WARN, "[DMA] Channel Sound Out: Bus error reading from %08x",dma[CHANNEL_SOUNDOUT].next);
             dma[CHANNEL_SOUNDOUT].csr &= ~DMA_ENABLE;
             dma[CHANNEL_SOUNDOUT].csr |= (DMA_COMPLETE|DMA_BUSEXC);
         } ENDTRY
-        
+    }
+    
+    return result;
+}
+
+void dma_sndout_intr() {
+    if (dma[CHANNEL_SOUNDOUT].csr&DMA_ENABLE) {
         dma_interrupt(CHANNEL_SOUNDOUT);
     }
 }
 
+int dma_sndin_write_memory() {
+	int value = 0;
+	
+    if (dma[CHANNEL_SOUNDIN].csr&DMA_ENABLE) {
+		
+		Audio_Input_Lock();
+
+        Log_Printf(LOG_DMA_LEVEL, "[DMA] Channel Sound In: Write to memory at $%08x, %i bytes",
+                   dma[CHANNEL_SOUNDIN].next,dma[CHANNEL_SOUNDIN].limit-dma[CHANNEL_SOUNDIN].next);
+
+		TRY(prb) {
+            while (dma[CHANNEL_SOUNDIN].next<dma[CHANNEL_SOUNDIN].limit) {
+                value = Audio_Input_Read();
+				if (value < 0) {
+					break;
+				}
+				NEXTMemory_WriteByte(dma[CHANNEL_SOUNDIN].next, value);
+				dma[CHANNEL_SOUNDIN].next++;
+            }
+        } CATCH(prb) {
+            Log_Printf(LOG_WARN, "[DMA] Channel Sound In: Bus error reading from %08x",dma[CHANNEL_SOUNDIN].next);
+            dma[CHANNEL_SOUNDIN].csr &= ~DMA_ENABLE;
+            dma[CHANNEL_SOUNDIN].csr |= (DMA_COMPLETE|DMA_BUSEXC);
+        } ENDTRY
+		
+		Audio_Input_Unlock();
+
+        dma[CHANNEL_SOUNDIN].saved_limit = dma[CHANNEL_SOUNDIN].next;
+        dma_interrupt(CHANNEL_SOUNDIN);
+		
+		return (dma[CHANNEL_SOUNDIN].next==dma[CHANNEL_SOUNDIN].limit);
+    }
+	return 1;
+}
 
 /* Channel Printer */
 void dma_printer_read_memory(void) {
@@ -788,7 +799,7 @@ void dma_printer_read_memory(void) {
 
 Uint32 saved_next_turbo = 0;
 
-void dma_enet_interrupt(int channel) {
+static void dma_enet_interrupt(int channel) {
     int interrupt = get_interrupt_type(channel);
     
     dma[channel].csr |= DMA_COMPLETE;
@@ -806,15 +817,6 @@ void dma_enet_interrupt(int channel) {
     set_interrupt(interrupt, SET_INT);
 }
 
-/* This is done by hardware on ethernet transmitter error (coll, short, etc) */
-/* TODO: check if this is true and call from transmitter */
-void dma_enet_read_retry(void) {
-    dma[CHANNEL_EN_TX].next = dma[CHANNEL_EN_TX].saved_next;
-    dma[CHANNEL_EN_TX].limit = dma[CHANNEL_EN_TX].saved_limit;
-    dma[CHANNEL_EN_TX].start = dma[CHANNEL_EN_TX].saved_start;
-    dma[CHANNEL_EN_TX].stop = dma[CHANNEL_EN_TX].saved_stop;
-}
-
 void dma_enet_write_memory(bool eop) {
     Log_Printf(LOG_DMA_LEVEL, "[DMA] Channel Ethernet Receive: Write to memory at $%08x, %i bytes",
                dma[CHANNEL_EN_RX].next,dma[CHANNEL_EN_RX].limit-dma[CHANNEL_EN_RX].next);
@@ -881,55 +883,76 @@ bool dma_enet_read_memory(void) {
 
 
 /* Memory to Memory */
-#define DMA_M2M_CYCLES    1//((DMA_BURST_SIZE * 3) / 4)
 
-void dma_m2m_write_memory(void) {
-    int i;
-    int time = 0;
-    Uint32 m2m_buffer[DMA_BURST_SIZE/4];
+Uint32 m2m_buffer[DMA_BURST_SIZE];
+int m2m_buffer_size;
+
+void M2MDMA_IO_Handler(void) {
+    CycInt_AcknowledgeInterrupt();
     
-    if (((dma[CHANNEL_R2M].limit-dma[CHANNEL_R2M].next)%DMA_BURST_SIZE) ||
-        ((dma[CHANNEL_M2R].limit-dma[CHANNEL_M2R].next)%DMA_BURST_SIZE)) {
-        Log_Printf(LOG_WARN, "[DMA] Channel M2M: Error! Memory not burst size aligned!");
+    if (dma[CHANNEL_R2M].csr&DMA_ENABLE) {
+        dma_m2m_write_memory();
+        CycInt_AddRelativeInterruptCycles(4, INTERRUPT_M2M_IO);
     }
+}
+
+void dma_m2m(void) {
+    if ((dma[CHANNEL_M2R].csr&DMA_ENABLE) && (dma[CHANNEL_R2M].csr&DMA_ENABLE)) {
+        if (((dma[CHANNEL_R2M].limit-dma[CHANNEL_R2M].next)%DMA_BURST_SIZE) ||
+            ((dma[CHANNEL_M2R].limit-dma[CHANNEL_M2R].next)%DMA_BURST_SIZE)) {
+            Log_Printf(LOG_WARN, "[DMA] Channel M2M: Error! Memory not burst size aligned!");
+            return;
+        }
+        
+        Log_Printf(LOG_DMA_LEVEL, "[DMA] Channel M2M: Copying %i bytes from $%08X to %i bytes at $%08X.",
+                   dma[CHANNEL_M2R].limit-dma[CHANNEL_M2R].next,dma[CHANNEL_M2R].next,
+                   dma[CHANNEL_R2M].limit-dma[CHANNEL_R2M].next,dma[CHANNEL_R2M].next);
+        
+        CycInt_AddRelativeInterruptCycles(4, INTERRUPT_M2M_IO);
+    }
+}
+
+void dma_m2m_write_memory(void) {
     
-    Log_Printf(LOG_DMA_LEVEL, "[DMA] Channel M2M: Copying %i bytes from $%08X to $%08X.",
-               dma[CHANNEL_R2M].limit-dma[CHANNEL_R2M].next,dma[CHANNEL_M2R].next,dma[CHANNEL_R2M].next);
-    
-    while (dma[CHANNEL_R2M].next<dma[CHANNEL_R2M].limit) {
-        time+=DMA_M2M_CYCLES;
+    if (dma[CHANNEL_R2M].next<dma[CHANNEL_R2M].limit) {
 
         if (dma[CHANNEL_M2R].next<dma[CHANNEL_M2R].limit) {
+            /* (Re)fill the buffer, if there is still data to read */
+            m2m_buffer_size = 0;
+
             TRY(prb) {
-                /* (Re)fill the buffer, if there is still data to read */
-                for (i=0; i<DMA_BURST_SIZE; i+=4) {
-                    m2m_buffer[i/4]=NEXTMemory_ReadLong(dma[CHANNEL_M2R].next+i);
+                while (m2m_buffer_size < DMA_BURST_SIZE) {
+                    m2m_buffer[m2m_buffer_size]=NEXTMemory_ReadByte(dma[CHANNEL_M2R].next);
+                    m2m_buffer_size++;
+                    dma[CHANNEL_M2R].next++;
                 }
-                dma[CHANNEL_M2R].next+=DMA_BURST_SIZE;
             } CATCH(prb) {
-                Log_Printf(LOG_WARN, "[DMA] Channel M2M: Bus error while reading from %08x",dma[CHANNEL_M2R].next+i);
+                Log_Printf(LOG_WARN, "[DMA] Channel M2M: Bus error while reading from %08x",dma[CHANNEL_M2R].next);
                 dma[CHANNEL_M2R].csr &= ~DMA_ENABLE;
                 dma[CHANNEL_M2R].csr |= (DMA_COMPLETE|DMA_BUSEXC);
             } ENDTRY
             
-            if ((dma[CHANNEL_M2R].next==dma[CHANNEL_M2R].limit)||(dma[CHANNEL_M2R].csr&DMA_BUSEXC)) {
-                CycInt_AddRelativeInterrupt(time/4, INT_CPU_CYCLE, INTERRUPT_M2R);
-            }
+            dma_interrupt(CHANNEL_M2R);
+        } else {
+            /* Re-use data in buffer */
+            m2m_buffer_size = DMA_BURST_SIZE;
         }
         
         TRY(prb) {
             /* Write the contents of the buffer to memory */
-            for (i=0; i<DMA_BURST_SIZE; i+=4) {
-                NEXTMemory_WriteLong(dma[CHANNEL_R2M].next+i, m2m_buffer[i/4]);
+            while (m2m_buffer_size > 0) {
+                NEXTMemory_WriteByte(dma[CHANNEL_R2M].next, m2m_buffer[DMA_BURST_SIZE-m2m_buffer_size]);
+                m2m_buffer_size--;
+                dma[CHANNEL_R2M].next++;
             }
-            dma[CHANNEL_R2M].next+=DMA_BURST_SIZE;
         } CATCH(prb) {
-            Log_Printf(LOG_WARN, "[DMA] Channel M2M: Bus error while writing to %08x",dma[CHANNEL_R2M].next+i);
+            Log_Printf(LOG_WARN, "[DMA] Channel M2M: Bus error while writing to %08x",dma[CHANNEL_R2M].next);
             dma[CHANNEL_R2M].csr &= ~DMA_ENABLE;
             dma[CHANNEL_R2M].csr |= (DMA_COMPLETE|DMA_BUSEXC);
         } ENDTRY
     }
-    CycInt_AddRelativeInterrupt(time/4, INT_CPU_CYCLE, INTERRUPT_R2M);
+    
+    dma_interrupt(CHANNEL_R2M);
 }
 
 
@@ -1086,6 +1109,8 @@ void TDMA_CSR_Write(void) {
 	switch (writecsr&TDMA_CMD_MASK) {
 		case TDMA_RESET:
 			Log_Printf(LOG_DMA_LEVEL,"DMA reset"); break;
+		case TDMA_BUFRESET:
+			Log_Printf(LOG_DMA_LEVEL,"DMA initialize buffers"); break;
 		case (TDMA_RESET | TDMA_BUFRESET):
 		case (TDMA_RESET | TDMA_BUFRESET | TDMA_CLRCOMPLETE):
 			Log_Printf(LOG_DMA_LEVEL,"DMA reset and initialize buffers"); break;