Annotation of previous/src/includes/m68000.h, revision 1.1.1.4

1.1       root        1: /*
                      2:   Hatari - m68000.h
                      3: 
                      4:   This file is distributed under the GNU Public License, version 2 or at
                      5:   your option any later version. Read the file gpl.txt for details.
                      6: */
                      7: 
                      8: /* 2007/11/10  [NP]    Add pairing for lsr / dbcc (and all variants    */
                      9: /*                     working on register, not on memory).            */
                     10: /* 2008/01/07  [NP]    Use PairingArray to store all valid pairing     */
                     11: /*                     combinations (in m68000.c)                      */
                     12: /* 2010/04/05  [NP]    Rework the pairing code to take BusCyclePenalty */
                     13: /*                     into account when using d8(an,ix).              */
                     14: /* 2010/05/07  [NP]    Add BusCyclePenalty to LastInstrCycles to detect*/
                     15: /*                     a possible pairing between add.l (a5,d1.w),d0   */
                     16: /*                     and move.b 7(a5,d1.w),d5.                       */
                     17: 
                     18: 
                     19: #ifndef HATARI_M68000_H
                     20: #define HATARI_M68000_H
                     21: 
                     22: #include "sysdeps.h"
                     23: #include "memory.h"
                     24: #include "newcpu.h"     /* for regs */
                     25: #include "cycInt.h"
                     26: #include "log.h"
1.1.1.4 ! root       27: #include "host.h"
        !            28: #include "configuration.h"
1.1       root       29: 
                     30: /* 68000 Register defines */
                     31: enum {
                     32:   REG_D0,    /* D0.. */
                     33:   REG_D1,
                     34:   REG_D2,
                     35:   REG_D3,
                     36:   REG_D4,
                     37:   REG_D5,
                     38:   REG_D6,
                     39:   REG_D7,    /* ..D7 */
                     40:   REG_A0,    /* A0.. */
                     41:   REG_A1,
                     42:   REG_A2,
                     43:   REG_A3,
                     44:   REG_A4,
                     45:   REG_A5,
                     46:   REG_A6,
                     47:   REG_A7,    /* ..A7 (also SP) */
                     48: };
                     49: 
                     50: /* 68000 Condition code's */
                     51: #define SR_AUX              0x0010
                     52: #define SR_NEG              0x0008
                     53: #define SR_ZERO             0x0004
                     54: #define SR_OVERFLOW         0x0002
                     55: #define SR_CARRY            0x0001
                     56: 
                     57: #define SR_CLEAR_AUX        0xffef
                     58: #define SR_CLEAR_NEG        0xfff7
                     59: #define SR_CLEAR_ZERO       0xfffb
                     60: #define SR_CLEAR_OVERFLOW   0xfffd
                     61: #define SR_CLEAR_CARRY      0xfffe
                     62: 
                     63: #define SR_CCODE_MASK       (SR_AUX|SR_NEG|SR_ZERO|SR_OVERFLOW|SR_CARRY)
                     64: #define SR_MASK             0xFFE0
                     65: 
                     66: #define SR_TRACEMODE        0x8000
                     67: #define SR_SUPERMODE        0x2000
                     68: #define SR_IPL              0x0700
                     69: 
                     70: #define SR_CLEAR_IPL        0xf8ff
                     71: #define SR_CLEAR_TRACEMODE  0x7fff
                     72: #define SR_CLEAR_SUPERMODE  0xdfff
                     73: 
                     74: /* Exception vectors */
                     75: #define  EXCEPTION_BUSERROR   0x00000008
                     76: #define  EXCEPTION_ADDRERROR  0x0000000c
                     77: #define  EXCEPTION_ILLEGALINS 0x00000010
                     78: #define  EXCEPTION_DIVZERO    0x00000014
                     79: #define  EXCEPTION_CHK        0x00000018
                     80: #define  EXCEPTION_TRAPV      0x0000001c
                     81: #define  EXCEPTION_TRACE      0x00000024
                     82: #define  EXCEPTION_LINE_A     0x00000028
                     83: #define  EXCEPTION_LINE_F     0x0000002c
                     84: #define  EXCEPTION_TRAP0      0x00000080
                     85: #define  EXCEPTION_TRAP1      0x00000084
                     86: #define  EXCEPTION_TRAP2      0x00000088
                     87: #define  EXCEPTION_TRAP13     0x000000B4
                     88: #define  EXCEPTION_TRAP14     0x000000B8
                     89: 
                     90: 
                     91: /* Size of 68000 instructions */
                     92: #define MAX_68000_INSTRUCTION_SIZE  10  /* Longest 68000 instruction is 10 bytes(6+4) */
                     93: #define MIN_68000_INSTRUCTION_SIZE  2   /* Smallest 68000 instruction is 2 bytes(ie NOP) */
                     94: 
                     95: /* Illegal Opcode used to help emulation. eg. free entries are 8 to 15 inc' */
                     96: #define  GEMDOS_OPCODE        8  /* Free op-code to intercept GemDOS trap */
                     97: #define  SYSINIT_OPCODE      10  /* Free op-code to initialize system (connected drives etc.) */
                     98: #define  VDI_OPCODE          12  /* Free op-code to call VDI handlers AFTER Trap#2 */
                     99: 
                    100: 
                    101: 
                    102: /* Ugly hacks to adapt the main code to the different CPU cores: */
                    103: 
                    104: #define Regs regs.regs
                    105: 
                    106: # define M68000_GetPC()     m68k_getpc()
                    107: # define M68000_SetPC(val)  m68k_setpc(val)
                    108: 
                    109: static inline Uint16 M68000_GetSR(void)
                    110: {
                    111:        MakeSR();
                    112:        return regs.sr;
                    113: }
                    114: static inline void M68000_SetSR(Uint16 v)
                    115: {
                    116:        regs.sr = v;
                    117:        MakeFromSR();
                    118: }
                    119: 
                    120: # define M68000_SetSpecial(flags)   set_special(flags)
                    121: # define M68000_UnsetSpecial(flags) unset_special(flags)
                    122: 
                    123: 
                    124: /* bus error mode */
                    125: #define BUS_ERROR_WRITE 0
                    126: #define BUS_ERROR_READ 1
                    127: 
                    128: 
1.1.1.2   root      129: /* bus access mode */
1.1       root      130: #define        BUS_MODE_CPU            0                       /* bus is owned by the cpu */
                    131: #define        BUS_MODE_BLITTER        1                       /* bus is owned by the blitter */
                    132: 
                    133: 
                    134: extern Uint32 BusErrorAddress;
                    135: extern Uint32 BusErrorPC;
                    136: extern bool bBusErrorReadWrite;
                    137: extern int BusMode;
                    138: 
                    139: extern int     LastOpcodeFamily;
                    140: extern int     LastInstrCycles;
                    141: extern int     Pairing;
                    142: extern char    PairingArray[ MAX_OPCODE_FAMILY ][ MAX_OPCODE_FAMILY ];
                    143: extern const char *OpcodeName[];
                    144: 
                    145: /*-----------------------------------------------------------------------*/
                    146: /**
                    147:  * Add CPU cycles.
                    148:  */
1.1.1.4 ! root      149: static inline void M68000_AddCycles(int cycles) {
        !           150:     nCyclesOver += cycles;
        !           151:     
        !           152:     if(PendingInterrupt.type == CYC_INT_CPU)
        !           153:         PendingInterrupt.time -= cycles;
        !           154: 
        !           155:     if(usCheckCycles < 0) {
        !           156:         if(!(CycInt_SetNewInterruptUs())) {
        !           157:             usCheckCycles = 100 * ConfigureParams.System.nCpuFreq;
        !           158:         }
        !           159:     } else
        !           160:         usCheckCycles -= cycles;
        !           161:     nCyclesMainCounter += cycles;
1.1       root      162: }
                    163: 
1.1.1.4 ! root      164: void M68000_Init(void);
        !           165: void M68000_Reset(bool bCold);
        !           166: void M68000_Stop(void);
        !           167: void M68000_Start(void);
        !           168: void M68000_CheckCpuSettings(void);
        !           169: void M68000_BusError(Uint32 addr, bool bReadWrite);
        !           170: void M68000_Exception(Uint32 ExceptionVector , int ExceptionSource);
1.1       root      171: 
                    172: #endif

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