--- previous/src/ioMemTabNEXT.c 2018/04/24 19:27:36 1.1.1.4 +++ previous/src/ioMemTabNEXT.c 2018/04/24 19:28:46 1.1.1.5 @@ -99,6 +99,47 @@ const INTERCEPT_ACCESS_FUNC IoMemTable_N /* These registers are read on turbo machines, they are somehow related to SCR1 */ { 0x02000000, SIZE_WORD, TurboSCR1_Read0, IoMem_WriteWithoutInterceptionButTrace }, { 0x02000002, SIZE_WORD, TurboSCR1_Read2, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02008008, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008009, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200800a, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200800b, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02008018, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008019, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200801a, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200801b, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02008020, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008021, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008022, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008023, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02008028, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008029, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200802a, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200802b, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02008030, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008031, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008032, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008033, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02008038, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02008039, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200803a, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200803b, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x02000088, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02000089, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200008a, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200008b, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + + { 0x0200008c, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200008d, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200008e, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x0200008f, SIZE_BYTE, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + /* Brightness */ { 0x02010000, SIZE_LONG, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, @@ -170,6 +211,9 @@ const INTERCEPT_ACCESS_FUNC IoMemTable_N { 0x0200e007, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, { 0x0200e008, SIZE_LONG, Keycode_Read, IoMem_WriteWithoutInterceptionButTrace }, + /* Printer Register */ + { 0x0200f000, SIZE_LONG, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + /* Event counter */ { 0x0201a000, SIZE_BYTE, System_Timer_Read, IoMem_WriteWithoutInterceptionButTrace }, { 0x0201a001, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterceptionButTrace }, @@ -183,6 +227,7 @@ const INTERCEPT_ACCESS_FUNC IoMemTable_N /* Magneto-Optical Drive */ +#if 0 /* temporary disabled */ { 0x02012000, SIZE_BYTE, MOdrive_Read, MOdrive_Write }, { 0x02012001, SIZE_BYTE, MOdrive_Read, MOdrive_Write }, { 0x02012002, SIZE_BYTE, MOdrive_Read, MOdrive_Write }, @@ -206,6 +251,31 @@ const INTERCEPT_ACCESS_FUNC IoMemTable_N { 0x02012014, SIZE_BYTE, MOdrive_Read, MOdrive_Write }, { 0x02012015, SIZE_BYTE, MOdrive_Read, MOdrive_Write }, { 0x02012016, SIZE_BYTE, MOdrive_Read, MOdrive_Write }, +#else + { 0x02012000, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012001, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012002, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012003, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012004, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012005, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012006, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012007, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012008, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012009, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x0201200a, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x0201200b, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x0201200c, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x0201200d, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x0201200e, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x0201200f, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012010, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012011, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012012, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012013, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012014, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012015, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, + { 0x02012016, SIZE_BYTE, IoMem_ReadWithoutInterception, IoMem_WriteWithoutInterception }, +#endif /*------------------ DMA ------------------*/ @@ -214,13 +284,32 @@ const INTERCEPT_ACCESS_FUNC IoMemTable_N { 0x02000010, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, { 0x02000040, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, { 0x02000050, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, + { 0x02000080, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, + { 0x02000090, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, { 0x020000c0, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, + { 0x020000d0, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, { 0x02000110, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, { 0x02000150, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, - { 0x02000180, SIZE_LONG, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, - { 0x020001d0, SIZE_LONG, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, - { 0x020001c0, SIZE_LONG, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x02000180, SIZE_LONG, IoMem_ReadWithoutInterceptionButTrace, IoMem_WriteWithoutInterceptionButTrace }, + { 0x020001d0, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, + { 0x020001c0, SIZE_LONG, DMA_CSR_Read, DMA_CSR_Write }, + + /* Channel R2M */ + { 0x020041c0, SIZE_LONG, DMA_Saved_Next_Read, DMA_Saved_Next_Write }, + { 0x020041c4, SIZE_LONG, DMA_Saved_Limit_Read, DMA_Saved_Limit_Write }, + { 0x020041c8, SIZE_LONG, DMA_Saved_Start_Read, DMA_Saved_Start_Write }, + { 0x020041cc, SIZE_LONG, DMA_Saved_Stop_Read, DMA_Saved_Stop_Write }, + { 0x020043c0, SIZE_LONG, DMA_Init_Read, DMA_Init_Write }, // check this! + { 0x020043c4, SIZE_LONG, DMA_Size_Read, DMA_Size_Write }, // check this! + + /* Channel M2R */ + { 0x020041d0, SIZE_LONG, DMA_Next_Read, DMA_Next_Write }, + { 0x020041d4, SIZE_LONG, DMA_Limit_Read, DMA_Limit_Write }, + { 0x020041d8, SIZE_LONG, DMA_Start_Read, DMA_Start_Write }, + { 0x020041dc, SIZE_LONG, DMA_Stop_Read, DMA_Stop_Write }, + { 0x020043d0, SIZE_LONG, DMA_Init_Read, DMA_Init_Write }, + { 0x020043d4, SIZE_LONG, DMA_Size_Read, DMA_Size_Write }, /* Channel SCSI */ { 0x02004000, SIZE_LONG, DMA_Saved_Next_Read, DMA_Saved_Next_Write },