previous/src/uae-cpu/cpuemu.c - view

File: [Previous NeXT emulator] / previous / src / uae-cpu / cpuemu.c
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Tue Apr 24 19:25:10 2018 UTC (8 years, 3 months ago) by root
Branches: giles, MAIN
CVS tags: branch1, HEAD

Previous NeXT emulator

#include "sysdeps.h" #include "hatari-glue.h" #include "maccess.h" #include "memory.h" #include "newcpu.h" #include "cputbl.h" #define CPUFUNC(x) x##_ff #ifdef NOFLAGS #include "noflags.h" #endif #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 #define PART_3 1 #define PART_4 1 #define PART_5 1 #define PART_6 1 #define PART_7 1 #define PART_8 1 #endif #ifdef PART_1 unsigned long REGPARAM2 CPUFUNC(op_0_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_10_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_18_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_20_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_28_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_30_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_38_0)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_39_0)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_3c_0)(uae_u32 opcode) /* ORSR */ { OpcodeFamily = 4; CurrentInstrCycles = 20; { MakeSR(); { uae_s16 src = get_iword(2); src &= 0xFF; regs.sr |= src; MakeFromSR(); }}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_40_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_50_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_58_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_60_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_68_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_70_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_78_0)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_79_0)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_7c_0)(uae_u32 opcode) /* ORSR */ { OpcodeFamily = 4; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel18; } { MakeSR(); { uae_s16 src = get_iword(2); regs.sr |= src; MakeFromSR(); }}}m68k_incpc(4); endlabel18: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_80_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_98_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_a0_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_a8_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_b0_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 34; } unsigned long REGPARAM2 CPUFUNC(op_b8_0)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_b9_0)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(10); return 36; } unsigned long REGPARAM2 CPUFUNC(op_d0_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(4); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel27; } } }}}endlabel27: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_e8_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel28; } } }}}endlabel28: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_f0_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel29; } } }}}}endlabel29: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_f8_0)(uae_u32 opcode) /* CHK2 */ { OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel30; } } }}}endlabel30: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_f9_0)(uae_u32 opcode) /* CHK2 */ { OpcodeFamily = 81; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(8); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel31; } } }}}endlabel31: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_fa_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = 2; OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel32; } } }}}endlabel32: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_fb_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = 3; OpcodeFamily = 81; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s8)get_byte(dsta); upper = (uae_s32)(uae_s8)get_byte(dsta+1); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel33; } } }}}}endlabel33: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_100_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_108_0)(uae_u32 opcode) /* MVPMR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 29; CurrentInstrCycles = 16; { uaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_110_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_118_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_120_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 10; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_128_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_130_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_138_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_139_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_13a_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_13b_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_13c_0)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 21; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = get_ibyte(2); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_140_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_148_0)(uae_u32 opcode) /* MVPMR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 29; CurrentInstrCycles = 24; { uaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16) + (get_byte(memp + 4) << 8) + get_byte(memp + 6); m68k_dreg(regs, dstreg) = (val); }}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_150_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_158_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_160_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_168_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_170_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_178_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_179_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_17a_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_17b_0)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_180_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 10; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); if ( src < 16 ) { m68k_incpc(2); return 8; } }}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_188_0)(uae_u32 opcode) /* MVPRM */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 28; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); uaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); put_byte(memp, src >> 8); put_byte(memp + 2, src); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_190_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_198_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1a0_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_1a8_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1b0_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1b8_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1b9_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_1ba_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1bb_0)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1c0_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1c8_0)(uae_u32 opcode) /* MVPRM */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 28; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); uaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); put_byte(memp, src >> 24); put_byte(memp + 2, src >> 16); put_byte(memp + 4, src >> 8); put_byte(memp + 6, src); }}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_1d0_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1d8_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1e0_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_1e8_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1f0_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1f8_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1f9_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_1fa_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1fb_0)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_200_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_210_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_218_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_220_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_228_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_230_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_238_0)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_239_0)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_23c_0)(uae_u32 opcode) /* ANDSR */ { OpcodeFamily = 5; CurrentInstrCycles = 20; { MakeSR(); { uae_s16 src = get_iword(2); src |= 0xFF00; regs.sr &= src; MakeFromSR(); }}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_240_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_250_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_258_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_260_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_268_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_270_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_278_0)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_279_0)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_27c_0)(uae_u32 opcode) /* ANDSR */ { OpcodeFamily = 5; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel96; } { MakeSR(); { uae_s16 src = get_iword(2); regs.sr &= src; MakeFromSR(); }}}m68k_incpc(4); endlabel96: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_280_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_290_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_298_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_2a0_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_2a8_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_2b0_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 34; } unsigned long REGPARAM2 CPUFUNC(op_2b8_0)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_2b9_0)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(10); return 36; } unsigned long REGPARAM2 CPUFUNC(op_2d0_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(4); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel105; } } }}}endlabel105: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_2e8_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel106; } } }}}endlabel106: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2f0_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel107; } } }}}}endlabel107: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_2f8_0)(uae_u32 opcode) /* CHK2 */ { OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel108; } } }}}endlabel108: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2f9_0)(uae_u32 opcode) /* CHK2 */ { OpcodeFamily = 81; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(8); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel109; } } }}}endlabel109: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2fa_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = 2; OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel110; } } }}}endlabel110: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2fb_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = 3; OpcodeFamily = 81; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=(uae_s32)(uae_s16)get_word(dsta); upper = (uae_s32)(uae_s16)get_word(dsta+2); if ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg; SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel111; } } }}}}endlabel111: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_400_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_410_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_418_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_420_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_428_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_430_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_438_0)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_439_0)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_440_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_450_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_458_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_460_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_468_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_470_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_478_0)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_479_0)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_480_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_490_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_498_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_4a0_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_4a8_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_4b0_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}}return 34; } unsigned long REGPARAM2 CPUFUNC(op_4b8_0)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_4b9_0)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(10); return 36; } unsigned long REGPARAM2 CPUFUNC(op_4d0_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(4); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel136; } } }}}endlabel136: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_4e8_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel137; } } }}}endlabel137: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4f0_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 81; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel138; } } }}}}endlabel138: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4f8_0)(uae_u32 opcode) /* CHK2 */ { OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel139; } } }}}endlabel139: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4f9_0)(uae_u32 opcode) /* CHK2 */ { OpcodeFamily = 81; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(8); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel140; } } }}}endlabel140: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4fa_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = 2; OpcodeFamily = 81; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); m68k_incpc(6); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel141; } } }}}endlabel141: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4fb_0)(uae_u32 opcode) /* CHK2 */ { uae_u32 dstreg = 3; OpcodeFamily = 81; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; {uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15]; lower=get_long(dsta); upper = get_long(dsta+4); SET_ZFLG (upper == reg || lower == reg); SET_CFLG (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower); if ((extra & 0x800) && GET_CFLG) { Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel142; } } }}}}endlabel142: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_600_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_610_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_618_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_620_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_628_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_630_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_638_0)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_639_0)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_640_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_650_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_658_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_660_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_668_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_670_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_678_0)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_679_0)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_680_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_690_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_698_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_6a0_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_6a8_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_6b0_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}}return 34; } unsigned long REGPARAM2 CPUFUNC(op_6b8_0)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_6b9_0)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(10); return 36; } unsigned long REGPARAM2 CPUFUNC(op_6c0_0)(uae_u32 opcode) /* RTM */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 101; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6c8_0)(uae_u32 opcode) /* RTM */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 101; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6d0_0)(uae_u32 opcode) /* CALLM */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6e8_0)(uae_u32 opcode) /* CALLM */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6f0_0)(uae_u32 opcode) /* CALLM */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6f8_0)(uae_u32 opcode) /* CALLM */ { OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6f9_0)(uae_u32 opcode) /* CALLM */ { OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6fa_0)(uae_u32 opcode) /* CALLM */ { OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_6fb_0)(uae_u32 opcode) /* CALLM */ { OpcodeFamily = 100; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_800_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 10; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(4); return 10; } unsigned long REGPARAM2 CPUFUNC(op_810_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_818_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_820_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_828_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_830_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_838_0)(uae_u32 opcode) /* BTST */ { OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_839_0)(uae_u32 opcode) /* BTST */ { OpcodeFamily = 21; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(8); return 20; } unsigned long REGPARAM2 CPUFUNC(op_83a_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = 2; OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_83b_0)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = 3; OpcodeFamily = 21; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_83c_0)(uae_u32 opcode) /* BTST */ { OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uae_s8 dst = get_ibyte(4); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_840_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_850_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_858_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_860_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_868_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_870_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_878_0)(uae_u32 opcode) /* BCHG */ { OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_879_0)(uae_u32 opcode) /* BCHG */ { OpcodeFamily = 22; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_87a_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = 2; OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_87b_0)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = 3; OpcodeFamily = 22; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_880_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 14; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); if ( src < 16 ) { m68k_incpc(4); return 12; } }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_890_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_898_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8a0_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_8a8_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8b0_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_8b8_0)(uae_u32 opcode) /* BCLR */ { OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8b9_0)(uae_u32 opcode) /* BCLR */ { OpcodeFamily = 23; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_8ba_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = 2; OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8bb_0)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = 3; OpcodeFamily = 23; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_8c0_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8d0_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8d8_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8e0_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_8e8_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8f0_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_8f8_0)(uae_u32 opcode) /* BSET */ { OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8f9_0)(uae_u32 opcode) /* BSET */ { OpcodeFamily = 24; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_8fa_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = 2; OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8fb_0)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = 3; OpcodeFamily = 24; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_a00_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_a10_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_a18_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_a20_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_a28_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_a30_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_a38_0)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_a39_0)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_a3c_0)(uae_u32 opcode) /* EORSR */ { OpcodeFamily = 6; CurrentInstrCycles = 20; { MakeSR(); { uae_s16 src = get_iword(2); src &= 0xFF; regs.sr ^= src; MakeFromSR(); }}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_a40_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_a50_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_a58_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_a60_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_a68_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_a70_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_a78_0)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_a79_0)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_a7c_0)(uae_u32 opcode) /* EORSR */ { OpcodeFamily = 6; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel234; } { MakeSR(); { uae_s16 src = get_iword(2); regs.sr ^= src; MakeFromSR(); }}}m68k_incpc(4); endlabel234: ; return 20; } #endif #ifdef PART_2 unsigned long REGPARAM2 CPUFUNC(op_a80_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_a90_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_a98_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_aa0_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_aa8_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_ab0_0)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 34; } unsigned long REGPARAM2 CPUFUNC(op_ab8_0)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_ab9_0)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(10); return 36; } unsigned long REGPARAM2 CPUFUNC(op_ad0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_ad8_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_ae0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_ae8_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_af0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_af8_0)(uae_u32 opcode) /* CAS */ { OpcodeFamily = 84; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_af9_0)(uae_u32 opcode) /* CAS */ { OpcodeFamily = 84; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(m68k_dreg(regs, rc))); { int flgs = ((uae_s8)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(m68k_dreg(regs, rc))) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_byte(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_c00_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c10_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c18_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c20_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c28_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c30_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c38_0)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c39_0)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c3a_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 2; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c3b_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c40_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c50_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c58_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c60_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c68_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c70_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c78_0)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c79_0)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c7a_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 2; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c7b_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c80_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(6); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c90_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c98_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_ca0_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 22; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_ca8_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_cb0_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_cb8_0)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_cb9_0)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(10); return 28; } unsigned long REGPARAM2 CPUFUNC(op_cba_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 2; OpcodeFamily = 25; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_getpc () + 6; dsta += (uae_s32)(uae_s16)get_iword(6); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_cbb_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_cd0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_cd8_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_ce0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_ce8_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_cf0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_cf8_0)(uae_u32 opcode) /* CAS */ { OpcodeFamily = 84; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s16 dst = get_word(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_cf9_0)(uae_u32 opcode) /* CAS */ { OpcodeFamily = 84; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s16 dst = get_word(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(m68k_dreg(regs, rc))); { int flgs = ((uae_s16)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, rc))) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_word(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_cfc_0)(uae_u32 opcode) /* CAS2 */ { OpcodeFamily = 85; CurrentInstrCycles = 12; {{ uae_s32 extra = get_ilong(2); uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; uae_u16 dst1 = get_word(rn1), dst2 = get_word(rn2); {uae_u32 newv = ((uae_s16)(dst1)) - ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))); { int flgs = ((uae_s16)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; int flgo = ((uae_s16)(dst1)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u16)(dst1))); SET_NFLG (flgn != 0); if (GET_ZFLG) { {uae_u32 newv = ((uae_s16)(dst2)) - ((uae_s16)(m68k_dreg(regs, extra & 7))); { int flgs = ((uae_s16)(m68k_dreg(regs, extra & 7))) < 0; int flgo = ((uae_s16)(dst2)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(m68k_dreg(regs, extra & 7))) > ((uae_u16)(dst2))); SET_NFLG (flgn != 0); if (GET_ZFLG) { put_word(rn1, m68k_dreg(regs, (extra >> 22) & 7)); put_word(rn1, m68k_dreg(regs, (extra >> 6) & 7)); }} }}}} if (! GET_ZFLG) { m68k_dreg(regs, (extra >> 22) & 7) = (m68k_dreg(regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff); m68k_dreg(regs, (extra >> 6) & 7) = (m68k_dreg(regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff); } }}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e10_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel288; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg); put_byte(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg); { uae_s8 src = get_byte(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}m68k_incpc(4); endlabel288: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e18_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel289; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; put_byte(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}m68k_incpc(4); endlabel289: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e20_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel290; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; put_byte(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, dstreg) = srca; if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}m68k_incpc(4); endlabel290: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e28_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel291; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); put_byte(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s8 src = get_byte(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}m68k_incpc(8); endlabel291: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_e30_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 28; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel292; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; put_byte(dsta,src); }}}else{{{ uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}}endlabel292: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_e38_0)(uae_u32 opcode) /* MOVES */ { OpcodeFamily = 103; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel293; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); put_byte(dsta,src); }}else{{ uaecptr srca = (uae_s32)(uae_s16)get_iword(6); { uae_s8 src = get_byte(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}m68k_incpc(8); endlabel293: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_e39_0)(uae_u32 opcode) /* MOVES */ { OpcodeFamily = 103; CurrentInstrCycles = 32; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel294; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = get_ilong(4); put_byte(dsta,src); }}else{{ uaecptr srca = get_ilong(8); { uae_s8 src = get_byte(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xff) | ((src) & 0xff); } }}}}}}m68k_incpc(12); endlabel294: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_e50_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel295; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg); put_word(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg); { uae_s16 src = get_word(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}m68k_incpc(4); endlabel295: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e58_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel296; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; put_word(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg); { uae_s16 src = get_word(srca); m68k_areg(regs, dstreg) += 2; if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}m68k_incpc(4); endlabel296: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e60_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel297; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; put_word(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, dstreg) = srca; if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}m68k_incpc(4); endlabel297: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e68_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel298; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); put_word(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s16 src = get_word(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}m68k_incpc(8); endlabel298: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_e70_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 28; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel299; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; put_word(dsta,src); }}}else{{{ uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}}endlabel299: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_e78_0)(uae_u32 opcode) /* MOVES */ { OpcodeFamily = 103; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel300; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); put_word(dsta,src); }}else{{ uaecptr srca = (uae_s32)(uae_s16)get_iword(6); { uae_s16 src = get_word(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}m68k_incpc(8); endlabel300: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_e79_0)(uae_u32 opcode) /* MOVES */ { OpcodeFamily = 103; CurrentInstrCycles = 32; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel301; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = get_ilong(4); put_word(dsta,src); }}else{{ uaecptr srca = get_ilong(8); { uae_s16 src = get_word(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (m68k_dreg(regs, (extra >> 12) & 7) & ~0xffff) | ((src) & 0xffff); } }}}}}}m68k_incpc(12); endlabel301: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_e90_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel302; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg); put_long(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg); { uae_s32 src = get_long(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}m68k_incpc(4); endlabel302: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_e98_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel303; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; put_long(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg); { uae_s32 src = get_long(srca); m68k_areg(regs, dstreg) += 4; if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}m68k_incpc(4); endlabel303: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_ea0_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 28; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel304; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; put_long(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, dstreg) = srca; if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}m68k_incpc(4); endlabel304: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_ea8_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 32; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel305; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); put_long(dsta,src); }}else{{ uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); { uae_s32 src = get_long(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}m68k_incpc(8); endlabel305: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_eb0_0)(uae_u32 opcode) /* MOVES */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 103; CurrentInstrCycles = 36; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel306; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; put_long(dsta,src); }}}else{{{ uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}}endlabel306: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_eb8_0)(uae_u32 opcode) /* MOVES */ { OpcodeFamily = 103; CurrentInstrCycles = 32; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel307; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); put_long(dsta,src); }}else{{ uaecptr srca = (uae_s32)(uae_s16)get_iword(6); { uae_s32 src = get_long(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}m68k_incpc(8); endlabel307: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_eb9_0)(uae_u32 opcode) /* MOVES */ { OpcodeFamily = 103; CurrentInstrCycles = 40; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel308; } {{ uae_s16 extra = get_iword(2); if (extra & 0x800) { uae_u32 src = regs.regs[(extra >> 12) & 15]; { uaecptr dsta = get_ilong(4); put_long(dsta,src); }}else{{ uaecptr srca = get_ilong(8); { uae_s32 src = get_long(srca); if (extra & 0x8000) { m68k_areg(regs, (extra >> 12) & 7) = src; } else { m68k_dreg(regs, (extra >> 12) & 7) = (src); } }}}}}}m68k_incpc(12); endlabel308: ; return 40; } unsigned long REGPARAM2 CPUFUNC(op_ed0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_ed8_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_ee0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 26; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_ee8_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 28; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 dst = get_long(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_ef0_0)(uae_u32 opcode) /* CAS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 84; CurrentInstrCycles = 30; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}}return 30; } unsigned long REGPARAM2 CPUFUNC(op_ef8_0)(uae_u32 opcode) /* CAS */ { OpcodeFamily = 84; CurrentInstrCycles = 28; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 dst = get_long(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_ef9_0)(uae_u32 opcode) /* CAS */ { OpcodeFamily = 84; CurrentInstrCycles = 32; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 dst = get_long(dsta); { int ru = (src >> 6) & 7; int rc = src & 7; {uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(m68k_dreg(regs, rc))); { int flgs = ((uae_s32)(m68k_dreg(regs, rc))) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, rc))) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); if (GET_ZFLG){ put_long(dsta,(m68k_dreg(regs, ru))); }else{m68k_dreg(regs, rc) = dst; }}}}}}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_efc_0)(uae_u32 opcode) /* CAS2 */ { OpcodeFamily = 85; CurrentInstrCycles = 12; {{ uae_s32 extra = get_ilong(2); uae_u32 rn1 = regs.regs[(extra >> 28) & 15]; uae_u32 rn2 = regs.regs[(extra >> 12) & 15]; uae_u32 dst1 = get_long(rn1), dst2 = get_long(rn2); {uae_u32 newv = ((uae_s32)(dst1)) - ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))); { int flgs = ((uae_s32)(m68k_dreg(regs, (extra >> 16) & 7))) < 0; int flgo = ((uae_s32)(dst1)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, (extra >> 16) & 7))) > ((uae_u32)(dst1))); SET_NFLG (flgn != 0); if (GET_ZFLG) { {uae_u32 newv = ((uae_s32)(dst2)) - ((uae_s32)(m68k_dreg(regs, extra & 7))); { int flgs = ((uae_s32)(m68k_dreg(regs, extra & 7))) < 0; int flgo = ((uae_s32)(dst2)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(m68k_dreg(regs, extra & 7))) > ((uae_u32)(dst2))); SET_NFLG (flgn != 0); if (GET_ZFLG) { put_long(rn1, m68k_dreg(regs, (extra >> 22) & 7)); put_long(rn1, m68k_dreg(regs, (extra >> 6) & 7)); }} }}}} if (! GET_ZFLG) { m68k_dreg(regs, (extra >> 22) & 7) = dst1; m68k_dreg(regs, (extra >> 6) & 7) = dst2; } }}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1000_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_1008_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_areg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_1010_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1018_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1020_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_1028_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1030_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1038_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1039_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_103a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_103b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_103c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1080_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1088_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1090_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1098_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_10a0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_10a8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_10b0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10b8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_10b9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_10ba_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_10bb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10bc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_10c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_10c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_10d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_10d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_10e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_10e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_10f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10f8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_10f9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_10fa_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_10fb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10fc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1100_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1108_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1110_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1118_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1120_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_1128_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1130_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1138_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1139_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_113a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_113b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_113c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1140_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1148_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1150_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1158_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1160_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1168_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_1170_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_1178_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_1179_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_117a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_117b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_117c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_1180_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1188_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_areg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1190_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1198_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_11a0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_11a8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11b0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); {{ uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_11b8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11b9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_11ba_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11bb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); {{ uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_11bc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_11c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_11c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_11d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_11d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_11e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_11e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_11f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_11f8_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_11f9_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_11fa_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_11fb_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_11fc_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_13c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_13c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_13d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_13d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_13e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_13e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_13f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(0); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_13f8_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_13f9_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(6); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(10); return 28; } unsigned long REGPARAM2 CPUFUNC(op_13fa_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_13fb_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(0); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_13fc_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(8); return 20; } unsigned long REGPARAM2 CPUFUNC(op_2000_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2008_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_areg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2010_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2018_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2020_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_2028_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_2030_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_2038_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_2039_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_203a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_203b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_203c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2040_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2048_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2050_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2058_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2060_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_2068_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_2070_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_2078_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_2079_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_207a_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_207b_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_207c_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2080_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2088_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2090_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_2098_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_20a0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_20a8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_20b0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_20b8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_20b9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_20ba_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_20bb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_20bc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_20c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_20c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_20d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_20d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_20e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_20e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_20f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_20f8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_20f9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_20fa_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_20fb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_20fc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_2100_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2108_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2110_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_2118_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_2120_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_2128_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_2130_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_2138_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } #endif #ifdef PART_3 unsigned long REGPARAM2 CPUFUNC(op_2139_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_213a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_213b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_213c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_2140_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_2148_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_2150_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_2158_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_2160_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_2168_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_2170_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}m68k_incpc(2); return 30; } unsigned long REGPARAM2 CPUFUNC(op_2178_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_2179_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_217a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_217b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}m68k_incpc(2); return 30; } unsigned long REGPARAM2 CPUFUNC(op_217c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_2180_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s32 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_2188_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s32 src = m68k_areg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_2190_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_2198_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_21a0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 28; } unsigned long REGPARAM2 CPUFUNC(op_21a8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 30; } unsigned long REGPARAM2 CPUFUNC(op_21b0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); {{ uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}}return 32; } unsigned long REGPARAM2 CPUFUNC(op_21b8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 30; } unsigned long REGPARAM2 CPUFUNC(op_21b9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 34; } unsigned long REGPARAM2 CPUFUNC(op_21ba_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 30; } unsigned long REGPARAM2 CPUFUNC(op_21bb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); {{ uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}}return 32; } unsigned long REGPARAM2 CPUFUNC(op_21bc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong(2); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_21c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_21c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_21d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_21d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_21e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_21e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_21f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 30; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}m68k_incpc(2); return 30; } unsigned long REGPARAM2 CPUFUNC(op_21f8_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_21f9_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_21fa_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_21fb_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 30; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}m68k_incpc(2); return 30; } unsigned long REGPARAM2 CPUFUNC(op_21fc_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_23c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_23c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_23d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_23d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_23e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_23e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_23f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 34; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(0); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}m68k_incpc(4); return 34; } unsigned long REGPARAM2 CPUFUNC(op_23f8_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_23f9_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 36; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(6); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(10); return 36; } unsigned long REGPARAM2 CPUFUNC(op_23fa_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 32; } unsigned long REGPARAM2 CPUFUNC(op_23fb_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 34; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(0); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}m68k_incpc(4); return 34; } unsigned long REGPARAM2 CPUFUNC(op_23fc_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_ilong(6); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(10); return 28; } unsigned long REGPARAM2 CPUFUNC(op_3000_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3008_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3010_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3018_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3020_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_3028_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3030_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_3038_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3039_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_303a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_303b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_303c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3040_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3048_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3050_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3058_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3060_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_3068_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3070_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_3078_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3079_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_307a_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_307b_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_307c_0)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3080_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3088_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3090_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3098_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_30a0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_30a8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_30b0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_30b8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_30b9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_30ba_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_30bb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_30bc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_30c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_30c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_30d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_30d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_30e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_30e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_30f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_30f8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_30f9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_30fa_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_30fb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_30fc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3100_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3108_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3110_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3118_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3120_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_3128_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_3130_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_3138_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_3139_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_313a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_313b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_313c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3140_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3148_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_3150_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_3158_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_3160_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_3168_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_3170_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_3178_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_3179_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_317a_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_317b_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_317c_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_3180_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_3188_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_areg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_3190_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_3198_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_31a0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_31a8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_31b0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); {{ uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_31b8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_31b9_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); {m68k_incpc(6); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_31ba_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_31bb_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); {{ uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_31bc_0)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_31c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_31c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_31d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_31d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_31e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_31e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_31f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_31f8_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_31f9_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(6); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_31fa_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_31fb_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(0); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_31fc_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_33c0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_33c8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_33d0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_33d8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_33e0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_33e8_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_33f0_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(0); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_33f8_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_33f9_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(6); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(10); return 28; } unsigned long REGPARAM2 CPUFUNC(op_33fa_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 24; } unsigned long REGPARAM2 CPUFUNC(op_33fb_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(0); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_33fc_0)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(8); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4000_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4010_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4018_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4020_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4028_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4030_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4038_0)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4039_0)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4040_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); }}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4050_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4058_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4060_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4068_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4070_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4078_0)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4079_0)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4080_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, srcreg) = (newv); }}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4090_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4098_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_40a0_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_40a8_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_40b0_0)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_40b8_0)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_40b9_0)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_40c0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 6; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel653; } {{ MakeSR(); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); }}}m68k_incpc(2); endlabel653: ; return 6; } unsigned long REGPARAM2 CPUFUNC(op_40d0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel654; } {{ uaecptr srca = m68k_areg(regs, srcreg); MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(2); endlabel654: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_40d8_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel655; } {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += 2; MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(2); endlabel655: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_40e0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 14; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel656; } {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; m68k_areg (regs, srcreg) = srca; MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(2); endlabel656: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_40e8_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel657; } {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(4); endlabel657: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_40f0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 18; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel658; } {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; MakeSR(); put_word(srca,regs.sr); }}}}endlabel658: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_40f8_0)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel659; } {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(4); endlabel659: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_40f9_0)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel660; } {{ uaecptr srca = get_ilong(2); MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(6); endlabel660: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4100_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel661; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel661; } }}}endlabel661: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_4110_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel662; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel662; } }}}}endlabel662: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4118_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel663; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel663; } }}}}endlabel663: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4120_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel664; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel664; } }}}}endlabel664: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4128_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 22; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel665; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel665; } }}}}endlabel665: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_4130_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 24; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel666; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel666; } }}}}}endlabel666: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_4138_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 22; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel667; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel667; } }}}}endlabel667: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_4139_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 26; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel668; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel668; } }}}}endlabel668: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_413a_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 22; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel669; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel669; } }}}}endlabel669: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_413b_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 24; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel670; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel670; } }}}}}endlabel670: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_413c_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel671; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel671; } }}}endlabel671: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4180_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel672; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel672; } }}}endlabel672: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_4190_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel673; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel673; } }}}}endlabel673: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4198_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel674; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel674; } }}}}endlabel674: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_41a0_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel675; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel675; } }}}}endlabel675: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_41a8_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel676; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel676; } }}}}endlabel676: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41b0_0)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel677; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel677; } }}}}}endlabel677: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_41b8_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel678; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel678; } }}}}endlabel678: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41b9_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 22; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel679; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel679; } }}}}endlabel679: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_41ba_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel680; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel680; } }}}}endlabel680: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41bb_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel681; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel681; } }}}}}endlabel681: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_41bc_0)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel682; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel682; } }}}endlabel682: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_41d0_0)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 4; {{ uaecptr srca = m68k_areg(regs, srcreg); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_41e8_0)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_41f0_0)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { m68k_areg(regs, dstreg) = (srca); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_41f8_0)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 8; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_41f9_0)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 12; {{ uaecptr srca = get_ilong(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_41fa_0)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_41fb_0)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { m68k_areg(regs, dstreg) = (srca); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4200_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 4; {{ CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4210_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4218_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4220_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4228_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4230_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4238_0)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4239_0)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4240_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 4; {{ CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4250_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4258_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += 2; uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4260_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; m68k_areg (regs, srcreg) = srca; uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4268_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(4); return 16; } #endif #ifdef PART_4 unsigned long REGPARAM2 CPUFUNC(op_4270_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4278_0)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4279_0)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4280_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 6; {{ CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_dreg(regs, srcreg) = (0); }}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4290_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4298_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += 4; uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_42a0_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; m68k_areg (regs, srcreg) = srca; uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_42a8_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_42b0_0)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_42b8_0)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_42b9_0)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_42c0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 6; {{ MakeSR(); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr & 0xff) & 0xffff); }}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_42d0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_42d8_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += 2; MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_42e0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; m68k_areg (regs, srcreg) = srca; MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_42e8_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_42f0_0)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; MakeSR(); put_word(srca,regs.sr & 0xff); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_42f8_0)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_42f9_0)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4400_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4410_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4418_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4420_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4428_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4430_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4438_0)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4439_0)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4440_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4450_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4458_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4460_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4468_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4470_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4478_0)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4479_0)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4480_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, srcreg) = (dst); }}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4490_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4498_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_44a0_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_44a8_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_44b0_0)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_44b8_0)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_44b9_0)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_44c0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_44d0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_44d8_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_44e0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_44e8_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_44f0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_44f8_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_44f9_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(6); return 24; } unsigned long REGPARAM2 CPUFUNC(op_44fa_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_44fb_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_44fc_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword(2); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4600_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4610_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4618_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4620_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4628_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4630_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4638_0)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4639_0)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4640_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4650_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4658_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4660_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4668_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4670_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4678_0)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4679_0)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4680_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4690_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4698_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_46a0_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_46a8_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_46b0_0)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 26; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_46b8_0)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_46b9_0)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_46c0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 12; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel781; } {{ uae_s16 src = m68k_dreg(regs, srcreg); regs.sr = src; MakeFromSR(); }}}m68k_incpc(2); endlabel781: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_46d0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel782; } {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(2); endlabel782: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_46d8_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel783; } {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; regs.sr = src; MakeFromSR(); }}}}m68k_incpc(2); endlabel783: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_46e0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 18; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel784; } {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; regs.sr = src; MakeFromSR(); }}}}m68k_incpc(2); endlabel784: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_46e8_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel785; } {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(4); endlabel785: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46f0_0)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 22; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel786; } {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}endlabel786: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_46f8_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel787; } {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(4); endlabel787: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46f9_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel788; } {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(6); endlabel788: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_46fa_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel789; } {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(4); endlabel789: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46fb_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 22; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel790; } {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}endlabel790: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_46fc_0)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel791; } {{ uae_s16 src = get_iword(2); regs.sr = src; MakeFromSR(); }}}m68k_incpc(4); endlabel791: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4800_0)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 6; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4808_0)(uae_u32 opcode) /* LINK */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 47; CurrentInstrCycles = 22; {{ uaecptr olda = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = olda; { uae_s32 src = m68k_areg(regs, srcreg); put_long(olda,src); m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); { uae_s32 offs = get_ilong(2); m68k_areg(regs, 7) += offs; }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_4810_0)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4818_0)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4820_0)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4828_0)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4830_0)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4838_0)(uae_u32 opcode) /* NBCD */ { OpcodeFamily = 17; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4839_0)(uae_u32 opcode) /* NBCD */ { OpcodeFamily = 17; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4840_0)(uae_u32 opcode) /* SWAP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 34; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4848_0)(uae_u32 opcode) /* BKPT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 99; CurrentInstrCycles = 4; {m68k_incpc(2); op_illg(opcode); }return 4; } unsigned long REGPARAM2 CPUFUNC(op_4850_0)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4868_0)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4870_0)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4878_0)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4879_0)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_487a_0)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_487b_0)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4880_0)(uae_u32 opcode) /* EXT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 36; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u16 dst = (uae_s16)(uae_s8)src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4890_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(4); return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48a0_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) - 0; { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; while (amask) { srca -= 2; put_word(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=4; } while (dmask) { srca -= 2; put_word(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=4; } m68k_areg(regs, dstreg) = srca; }}}m68k_incpc(4); return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48a8_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48b0_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 14; { uae_u16 mask = get_iword(2); retcycles = 0; {m68k_incpc(4); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}} return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48b8_0)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword(4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48b9_0)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = get_ilong(4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(8); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48c0_0)(uae_u32 opcode) /* EXT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 36; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = (uae_s32)(uae_s16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_48d0_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(4); return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48e0_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) - 0; { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; while (amask) { srca -= 4; put_long(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=8; } while (dmask) { srca -= 4; put_long(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=8; } m68k_areg(regs, dstreg) = srca; }}}m68k_incpc(4); return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48e8_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f0_0)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 14; { uae_u16 mask = get_iword(2); retcycles = 0; {m68k_incpc(4); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}} return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f8_0)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword(4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f9_0)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = get_ilong(4); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(8); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_49c0_0)(uae_u32 opcode) /* EXT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 36; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = (uae_s32)(uae_s8)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a00_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a10_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a18_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a20_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_4a28_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a30_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a38_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a39_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4a3a_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a3b_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a3c_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a40_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a48_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a50_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a58_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a60_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_4a68_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a70_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a78_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a79_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4a7a_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a7b_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a7c_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a80_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a88_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_areg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a90_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a98_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4aa0_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4aa8_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ab0_0)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4ab8_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ab9_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4aba_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4abb_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4abc_0)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4ac0_0)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); }}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4ad0_0)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ad8_0)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ae0_0)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ae8_0)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4af0_0)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4af8_0)(uae_u32 opcode) /* TAS */ { OpcodeFamily = 98; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4af9_0)(uae_u32 opcode) /* TAS */ { OpcodeFamily = 98; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_4c00_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 87; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); m68k_mull(opcode, dst, extra); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_4c10_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 87; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_incpc(4); m68k_mull(opcode, dst, extra); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4c18_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 87; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; m68k_incpc(4); m68k_mull(opcode, dst, extra); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4c20_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 87; CurrentInstrCycles = 18; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; m68k_incpc(4); m68k_mull(opcode, dst, extra); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4c28_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 87; CurrentInstrCycles = 20; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 dst = get_long(dsta); m68k_incpc(6); m68k_mull(opcode, dst, extra); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4c30_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 87; CurrentInstrCycles = 22; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); m68k_mull(opcode, dst, extra); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4c38_0)(uae_u32 opcode) /* MULL */ { OpcodeFamily = 87; CurrentInstrCycles = 20; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 dst = get_long(dsta); m68k_incpc(6); m68k_mull(opcode, dst, extra); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4c39_0)(uae_u32 opcode) /* MULL */ { OpcodeFamily = 87; CurrentInstrCycles = 24; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 dst = get_long(dsta); m68k_incpc(8); m68k_mull(opcode, dst, extra); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_4c3a_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = 2; OpcodeFamily = 87; CurrentInstrCycles = 20; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s32 dst = get_long(dsta); m68k_incpc(6); m68k_mull(opcode, dst, extra); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4c3b_0)(uae_u32 opcode) /* MULL */ { uae_u32 dstreg = 3; OpcodeFamily = 87; CurrentInstrCycles = 22; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); m68k_mull(opcode, dst, extra); }}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4c3c_0)(uae_u32 opcode) /* MULL */ { OpcodeFamily = 87; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uae_s32 dst = get_ilong(4); m68k_incpc(8); m68k_mull(opcode, dst, extra); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4c40_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 86; CurrentInstrCycles = 8; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); m68k_divl(opcode, dst, extra, oldpc); }}}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_4c50_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 86; CurrentInstrCycles = 16; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_incpc(2); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4c58_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 86; CurrentInstrCycles = 16; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; m68k_incpc(2); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4c60_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 86; CurrentInstrCycles = 18; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; m68k_incpc(2); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4c68_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 86; CurrentInstrCycles = 20; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); m68k_incpc(4); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4c70_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 86; CurrentInstrCycles = 22; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); m68k_divl(opcode, dst, extra, oldpc); }}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4c78_0)(uae_u32 opcode) /* DIVL */ { OpcodeFamily = 86; CurrentInstrCycles = 20; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); m68k_incpc(4); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4c79_0)(uae_u32 opcode) /* DIVL */ { OpcodeFamily = 86; CurrentInstrCycles = 24; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); m68k_incpc(6); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_4c7a_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = 2; OpcodeFamily = 86; CurrentInstrCycles = 20; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); m68k_incpc(4); m68k_divl(opcode, dst, extra, oldpc); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4c7b_0)(uae_u32 opcode) /* DIVL */ { uae_u32 dstreg = 3; OpcodeFamily = 86; CurrentInstrCycles = 22; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); m68k_divl(opcode, dst, extra, oldpc); }}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4c7c_0)(uae_u32 opcode) /* DIVL */ { OpcodeFamily = 86; CurrentInstrCycles = 16; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 extra = get_iword(0); { uae_s32 dst = get_ilong(2); m68k_incpc(6); m68k_divl(opcode, dst, extra, oldpc); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4c90_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(4); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4c98_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } m68k_areg(regs, dstreg) = srca; }}}m68k_incpc(4); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4ca8_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cb0_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; {m68k_incpc(4); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}} return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cb8_0)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cb9_0)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 20; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_ilong(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(8); return (20+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cba_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 2; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cbb_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 3; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}} return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cd0_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(4); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cd8_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } m68k_areg(regs, dstreg) = srca; }}}m68k_incpc(4); return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4ce8_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf0_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; {m68k_incpc(4); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}} return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf8_0)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf9_0)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 20; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_ilong(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(8); return (20+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cfa_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 2; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword(4); { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cfb_0)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 3; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}} return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4e40_0)(uae_u32 opcode) /* TRAP */ { uae_u32 srcreg = (opcode & 15); OpcodeFamily = 39; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; m68k_incpc(2); Exception(src+32,0,M68000_EXC_SRC_CPU); }}return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e50_0)(uae_u32 opcode) /* LINK */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 47; CurrentInstrCycles = 18; {{ uaecptr olda = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = olda; { uae_s32 src = m68k_areg(regs, srcreg); put_long(olda,src); m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); { uae_s16 offs = get_iword(2); m68k_areg(regs, 7) += offs; }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4e58_0)(uae_u32 opcode) /* UNLK */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 48; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); m68k_areg(regs, 7) = src; { uaecptr olda = m68k_areg(regs, 7); { uae_s32 old = get_long(olda); m68k_areg(regs, 7) += 4; m68k_areg(regs, srcreg) = (old); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4e60_0)(uae_u32 opcode) /* MVR2USP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 40; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel909; } {{ uae_s32 src = m68k_areg(regs, srcreg); regs.usp = src; }}}m68k_incpc(2); endlabel909: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e68_0)(uae_u32 opcode) /* MVUSP2R */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 41; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel910; } {{ m68k_areg(regs, srcreg) = (regs.usp); }}}m68k_incpc(2); endlabel910: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e70_0)(uae_u32 opcode) /* RESET */ { OpcodeFamily = 42; CurrentInstrCycles = 132; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel911; } { customreset(); }}m68k_incpc(2); endlabel911: ; return 132; } unsigned long REGPARAM2 CPUFUNC(op_4e71_0)(uae_u32 opcode) /* NOP */ { OpcodeFamily = 43; CurrentInstrCycles = 4; {}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e72_0)(uae_u32 opcode) /* STOP */ { OpcodeFamily = 44; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel913; } {{ uae_s16 src = get_iword(2); regs.sr = src; MakeFromSR(); m68k_setstopped(1); }}}m68k_incpc(4); endlabel913: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e73_0)(uae_u32 opcode) /* RTE */ { OpcodeFamily = 45; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel914; } { uae_u16 newsr; uae_u32 newpc; for (;;) { { uaecptr sra = m68k_areg(regs, 7); { uae_s16 sr = get_word(sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); { uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; { uaecptr formata = m68k_areg(regs, 7); { uae_s16 format = get_word(formata); m68k_areg(regs, 7) += 2; newsr = sr; newpc = pc; if ((format & 0xF000) == 0x0000) { break; } else if ((format & 0xF000) == 0x1000) { ; } else if ((format & 0xF000) == 0x2000) { m68k_areg(regs, 7) += 4; break; } else if ((format & 0xF000) == 0x8000) { m68k_areg(regs, 7) += 50; break; } else if ((format & 0xF000) == 0x9000) { m68k_areg(regs, 7) += 12; break; } else if ((format & 0xF000) == 0xa000) { m68k_areg(regs, 7) += 24; break; } else if ((format & 0xF000) == 0xb000) { m68k_areg(regs, 7) += 84; break; } else { Exception(14,0,M68000_EXC_SRC_CPU); goto endlabel914; } regs.sr = newsr; MakeFromSR(); } }}}}}} regs.sr = newsr; MakeFromSR(); m68k_setpc_rte(newpc); }}endlabel914: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4e74_0)(uae_u32 opcode) /* RTD */ { OpcodeFamily = 46; CurrentInstrCycles = 16; {{ uaecptr pca = m68k_areg(regs, 7); { uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; { uae_s16 offs = get_iword(2); m68k_areg(regs, 7) += offs; m68k_setpc_rte(pc); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4e75_0)(uae_u32 opcode) /* RTS */ { OpcodeFamily = 49; CurrentInstrCycles = 16; { m68k_do_rts(); }return 16; } unsigned long REGPARAM2 CPUFUNC(op_4e76_0)(uae_u32 opcode) /* TRAPV */ { OpcodeFamily = 50; CurrentInstrCycles = 4; {m68k_incpc(2); if (GET_VFLG) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel917; } }endlabel917: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e77_0)(uae_u32 opcode) /* RTR */ { OpcodeFamily = 51; CurrentInstrCycles = 20; { MakeSR(); { uaecptr sra = m68k_areg(regs, 7); { uae_s16 sr = get_word(sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); { uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; regs.sr &= 0xFF00; sr &= 0xFF; regs.sr |= sr; m68k_setpc(pc); MakeFromSR(); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4e7a_0)(uae_u32 opcode) /* MOVEC2 */ { OpcodeFamily = 82; CurrentInstrCycles = 8; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel919; } {{ uae_s16 src = get_iword(2); { int regno = (src >> 12) & 15; uae_u32 *regp = regs.regs + regno; if (! m68k_movec2(src & 0xFFF, regp)) goto endlabel919; }}}}m68k_incpc(4); endlabel919: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_4e7b_0)(uae_u32 opcode) /* MOVE2C */ { OpcodeFamily = 83; CurrentInstrCycles = 8; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel920; } {{ uae_s16 src = get_iword(2); { int regno = (src >> 12) & 15; uae_u32 *regp = regs.regs + regno; if (! m68k_move2c(src & 0xFFF, regp)) goto endlabel920; }}}}m68k_incpc(4); endlabel920: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_4e90_0)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_do_jsr(m68k_getpc() + 2, srca); }}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ea8_0)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); m68k_do_jsr(m68k_getpc() + 4, srca); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4eb0_0)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; m68k_do_jsr(m68k_getpc() + 0, srca); }}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4eb8_0)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); m68k_do_jsr(m68k_getpc() + 4, srca); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4eb9_0)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); m68k_do_jsr(m68k_getpc() + 6, srca); }}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4eba_0)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); m68k_do_jsr(m68k_getpc() + 4, srca); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4ebb_0)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 22; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; m68k_do_jsr(m68k_getpc() + 0, srca); }}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4ed0_0)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_setpc(srca); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_4ee8_0)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); m68k_setpc(srca); }}return 10; } unsigned long REGPARAM2 CPUFUNC(op_4ef0_0)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; m68k_setpc(srca); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ef8_0)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 10; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); m68k_setpc(srca); }}return 10; } unsigned long REGPARAM2 CPUFUNC(op_4ef9_0)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 12; {{ uaecptr srca = get_ilong(2); m68k_setpc(srca); }}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4efa_0)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); m68k_setpc(srca); }}return 10; } unsigned long REGPARAM2 CPUFUNC(op_4efb_0)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; m68k_setpc(srca); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5000_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5010_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5018_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } #endif #ifdef PART_5 unsigned long REGPARAM2 CPUFUNC(op_5020_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5028_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5030_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5038_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5039_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5040_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5048_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5050_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5058_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5060_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5068_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5070_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5078_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5079_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5080_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5088_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5090_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5098_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_50a0_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_50a8_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_50b0_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 26; {{ uae_u32 src = srcreg; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_50b8_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_50b9_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_50c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(0) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_50c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(0)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel962: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_50d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_50d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_50e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_50e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_50f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_50f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_50f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_50fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(0)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel970; } }}m68k_incpc(4); endlabel970: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_50fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(0)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel971; } }}m68k_incpc(6); endlabel971: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_50fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(0)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel972; } }m68k_incpc(2); endlabel972: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5100_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5110_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5118_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5120_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5128_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5130_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5138_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5139_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5140_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5148_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5150_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5158_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5160_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5168_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5170_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5178_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5179_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5180_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5188_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5190_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5198_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_51a0_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_51a8_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_51b0_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 26; {{ uae_u32 src = srcreg; {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_51b8_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_51b9_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_51c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(1) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_51c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(1)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1000: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_51d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_51d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_51e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_51e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_51f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_51f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_51f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_51fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(1)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1008; } }}m68k_incpc(4); endlabel1008: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_51fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(1)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1009; } }}m68k_incpc(6); endlabel1009: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_51fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(1)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1010; } }m68k_incpc(2); endlabel1010: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_52c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(2) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_52c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(2)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1012: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_52d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_52d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_52e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_52e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_52f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_52f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_52f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_52fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(2)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1020; } }}m68k_incpc(4); endlabel1020: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_52fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(2)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1021; } }}m68k_incpc(6); endlabel1021: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_52fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(2)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1022; } }m68k_incpc(2); endlabel1022: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_53c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(3) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_53c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(3)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1024: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_53d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_53d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_53e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_53e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_53f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_53f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_53f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_53fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(3)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1032; } }}m68k_incpc(4); endlabel1032: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_53fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(3)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1033; } }}m68k_incpc(6); endlabel1033: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_53fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(3)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1034; } }m68k_incpc(2); endlabel1034: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_54c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(4) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_54c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(4)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1036: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_54d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_54d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_54e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_54e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_54f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_54f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_54f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_54fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(4)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1044; } }}m68k_incpc(4); endlabel1044: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_54fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(4)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1045; } }}m68k_incpc(6); endlabel1045: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_54fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(4)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1046; } }m68k_incpc(2); endlabel1046: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_55c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(5) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_55c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(5)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1048: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_55d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_55d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_55e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_55e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_55f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_55f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_55f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_55fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(5)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1056; } }}m68k_incpc(4); endlabel1056: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_55fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(5)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1057; } }}m68k_incpc(6); endlabel1057: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_55fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(5)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1058; } }m68k_incpc(2); endlabel1058: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_56c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(6) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_56c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(6)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1060: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_56d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_56d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_56e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_56e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_56f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_56f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_56f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_56fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(6)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1068; } }}m68k_incpc(4); endlabel1068: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_56fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(6)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1069; } }}m68k_incpc(6); endlabel1069: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_56fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(6)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1070; } }m68k_incpc(2); endlabel1070: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_57c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(7) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_57c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(7)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1072: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_57d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_57d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_57e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_57e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_57f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_57f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_57f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_57fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(7)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1080; } }}m68k_incpc(4); endlabel1080: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_57fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(7)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1081; } }}m68k_incpc(6); endlabel1081: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_57fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(7)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1082; } }m68k_incpc(2); endlabel1082: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_58c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(8) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_58c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(8)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1084: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_58d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_58d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_58e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_58e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_58f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_58f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_58f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_58fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(8)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1092; } }}m68k_incpc(4); endlabel1092: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_58fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(8)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1093; } }}m68k_incpc(6); endlabel1093: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_58fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(8)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1094; } }m68k_incpc(2); endlabel1094: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_59c0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(9) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_59c8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(9)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1096: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_59d0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_59d8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_59e0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_59e8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_59f0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_59f8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_59f9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_59fa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(9)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1104; } }}m68k_incpc(4); endlabel1104: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_59fb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(9)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1105; } }}m68k_incpc(6); endlabel1105: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_59fc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(9)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1106; } }m68k_incpc(2); endlabel1106: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5ac0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(10) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5ac8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(10)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1108: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ad0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ad8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ae0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5ae8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5af0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5af8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5af9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5afa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(10)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1116; } }}m68k_incpc(4); endlabel1116: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_5afb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(10)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1117; } }}m68k_incpc(6); endlabel1117: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5afc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(10)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1118; } }m68k_incpc(2); endlabel1118: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5bc0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(11) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5bc8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(11)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1120: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5bd0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5bd8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5be0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5be8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5bf0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5bf8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5bf9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5bfa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(11)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1128; } }}m68k_incpc(4); endlabel1128: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_5bfb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(11)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1129; } }}m68k_incpc(6); endlabel1129: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5bfc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(11)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1130; } }m68k_incpc(2); endlabel1130: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5cc0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(12) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5cc8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(12)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1132: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5cd0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5cd8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ce0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5ce8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5cf0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5cf8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5cf9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5cfa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(12)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1140; } }}m68k_incpc(4); endlabel1140: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_5cfb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(12)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1141; } }}m68k_incpc(6); endlabel1141: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5cfc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(12)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1142; } }m68k_incpc(2); endlabel1142: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5dc0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(13) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5dc8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(13)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1144: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5dd0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5dd8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5de0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5de8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5df0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5df8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5df9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5dfa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(13)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1152; } }}m68k_incpc(4); endlabel1152: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_5dfb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(13)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1153; } }}m68k_incpc(6); endlabel1153: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5dfc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(13)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1154; } }m68k_incpc(2); endlabel1154: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5ec0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(14) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5ec8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(14)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1156: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ed0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ed8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ee0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_5ee8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ef0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5ef8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ef9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5efa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(14)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1164; } }}m68k_incpc(4); endlabel1164: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_5efb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(14)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1165; } }}m68k_incpc(6); endlabel1165: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5efc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(14)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1166; } }m68k_incpc(2); endlabel1166: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_5fc0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(15) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5fc8_0)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword(2); if (!cctrue(15)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { m68k_incpc((uae_s32)offs + 2); return 10; } else { m68k_incpc(4); return 14; } } }}}m68k_incpc(4); endlabel1168: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5fd0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5fd8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_5fe0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(2); return 14; } #endif #ifdef PART_6 unsigned long REGPARAM2 CPUFUNC(op_5fe8_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ff0_0)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5ff8_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ff9_0)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_5ffa_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 8; {{ uae_s16 dummy = get_iword(2); if (cctrue(15)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1176; } }}m68k_incpc(4); endlabel1176: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_5ffb_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 12; {{ uae_s32 dummy = get_ilong(2); if (cctrue(15)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1177; } }}m68k_incpc(6); endlabel1177: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ffc_0)(uae_u32 opcode) /* TRAPcc */ { OpcodeFamily = 102; CurrentInstrCycles = 4; { if (cctrue(15)) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel1178; } }m68k_incpc(2); endlabel1178: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_6000_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(0)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1179: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6001_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(0)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1180: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_60ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(0)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1181: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6100_0)(uae_u32 opcode) /* BSR */ { OpcodeFamily = 54; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); uae_s32 s = (uae_s32)src + 2; m68k_do_bsr(m68k_getpc() + 4, s); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_6101_0)(uae_u32 opcode) /* BSR */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 54; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; uae_s32 s = (uae_s32)src + 2; m68k_do_bsr(m68k_getpc() + 2, s); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_61ff_0)(uae_u32 opcode) /* BSR */ { OpcodeFamily = 54; CurrentInstrCycles = 18; {{ uae_s32 src = get_ilong(2); uae_s32 s = (uae_s32)src + 2; m68k_do_bsr(m68k_getpc() + 6, s); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_6200_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(2)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1185: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6201_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(2)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1186: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_62ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(2)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1187: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6300_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(3)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1188: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6301_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(3)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1189: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_63ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(3)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1190: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6400_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(4)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1191: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6401_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(4)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1192: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_64ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(4)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1193: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6500_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(5)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1194: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6501_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(5)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1195: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_65ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(5)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1196: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6600_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(6)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1197: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6601_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(6)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1198: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_66ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(6)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1199: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6700_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(7)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1200: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6701_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(7)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1201: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_67ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(7)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1202: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6800_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(8)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1203: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6801_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(8)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1204: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_68ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(8)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1205: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6900_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(9)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1206: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6901_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(9)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1207: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_69ff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(9)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1208: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6a00_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(10)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1209: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6a01_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(10)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1210: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6aff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(10)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1211: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6b00_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(11)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1212: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6b01_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(11)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1213: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6bff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(11)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1214: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6c00_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(12)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1215: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6c01_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(12)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1216: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6cff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(12)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1217: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6d00_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(13)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1218: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6d01_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(13)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1219: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6dff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(13)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1220: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6e00_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(14)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1221: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6e01_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(14)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1222: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6eff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(14)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1223: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6f00_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); if (!cctrue(15)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(4); endlabel1224: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6f01_0)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(15)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(2); endlabel1225: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6fff_0)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong(2); if (!cctrue(15)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel1226: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_7000_0)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_8000_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_8010_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8018_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8020_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_8028_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8030_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_8038_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8039_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_803a_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_803b_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_803c_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8040_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_8050_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8058_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8060_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_8068_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8070_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_8078_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8079_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_807a_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_807b_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_807c_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8080_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8090_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_8098_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_80a0_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_80a8_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_80b0_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_80b8_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_80b9_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_80ba_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_80bb_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_80bc_0)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_80c0_0)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 4; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1261; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}endlabel1261: ; return (4+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80d0_0)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1262; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1262: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80d8_0)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1263; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1263: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80e0_0)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1264; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1264: ; return (10+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80e8_0)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1265; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1265: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80f0_0)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1266; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel1266: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80f8_0)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1267; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1267: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80f9_0)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1268; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1268: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fa_0)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1269; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel1269: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fb_0)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1270; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel1270: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fc_0)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel1271; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}endlabel1271: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_8100_0)(uae_u32 opcode) /* SBCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 10; CurrentInstrCycles = 6; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); uae_u16 newv, tmp_newv; int bcd = 0; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_8108_0)(uae_u32 opcode) /* SBCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 10; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); uae_u16 newv, tmp_newv; int bcd = 0; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); put_byte(dsta,newv); }}}}}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_8110_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8118_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8120_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_8128_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8130_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_8138_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8139_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8140_0)(uae_u32 opcode) /* PACK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 96; CurrentInstrCycles = 8; { uae_u16 val = m68k_dreg(regs, srcreg) + get_iword(2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf); }m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8148_0)(uae_u32 opcode) /* PACK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 96; CurrentInstrCycles = 8; { uae_u16 val; m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; val = (uae_u16)get_byte(m68k_areg(regs, srcreg)); m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; val = (val | ((uae_u16)get_byte(m68k_areg(regs, srcreg)) << 8)) + get_iword(2); m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; put_byte(m68k_areg(regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf)); }m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8150_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8158_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8160_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_8168_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8170_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_8178_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_8179_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8180_0)(uae_u32 opcode) /* UNPK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 97; CurrentInstrCycles = 8; { uae_u16 val = m68k_dreg(regs, srcreg); val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword(2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & 0xffff0000) | (val & 0xffff); }m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8188_0)(uae_u32 opcode) /* UNPK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 97; CurrentInstrCycles = 8; { uae_u16 val; m68k_areg(regs, srcreg) -= areg_byteinc[srcreg]; val = (uae_u16)get_byte(m68k_areg(regs, srcreg)); val = (((val << 4) & 0xf00) | (val & 0xf)) + get_iword(2); m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; put_byte(m68k_areg(regs, dstreg),val); m68k_areg(regs, dstreg) -= areg_byteinc[dstreg]; put_byte(m68k_areg(regs, dstreg),val >> 8); }m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8190_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_8198_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_81a0_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_81a8_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_81b0_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_81b8_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_81b9_0)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_81c0_0)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 4; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1299; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}endlabel1299: ; return (4+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81d0_0)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1300; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1300: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81d8_0)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1301; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1301: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81e0_0)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1302; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1302: ; return (10+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81e8_0)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1303; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1303: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81f0_0)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1304; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel1304: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81f8_0)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1305; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1305: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81f9_0)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1306; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1306: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fa_0)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1307; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel1307: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fb_0)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); {m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1308; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel1308: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fc_0)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = get_iword(2); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel1309; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}endlabel1309: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_9000_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9010_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9018_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9020_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_9028_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9030_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_9038_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9039_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_903a_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_903b_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_903c_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9040_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9048_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9050_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9058_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9060_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_9068_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9070_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_9078_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9079_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_907a_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_907b_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_907c_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9080_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9088_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9090_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_9098_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_90a0_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90a8_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_90b0_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_90b8_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_90b9_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_90ba_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_90bb_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_90bc_0)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90c0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_90c8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_90d0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_90d8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_90e0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_90e8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90f0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_90f8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90f9_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_90fa_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90fb_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_90fc_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9100_0)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9108_0)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_9110_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9118_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9120_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_9128_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_9130_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_9138_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_9139_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_9140_0)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9148_0)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_9150_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9158_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9160_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_9168_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_9170_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_9178_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_9179_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_9180_0)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9188_0)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 30; } unsigned long REGPARAM2 CPUFUNC(op_9190_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_9198_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_91a0_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_91a8_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_91b0_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_91b8_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_91b9_0)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_91c0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_91c8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_91d0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_91d8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_91e0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_91e8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_91f0_0)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_91f8_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_91f9_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_91fa_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_91fb_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_91fc_0)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b000_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b010_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b018_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b020_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b028_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b030_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_b038_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b039_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b03a_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b03b_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 14; } #endif #ifdef PART_7 unsigned long REGPARAM2 CPUFUNC(op_b03c_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b040_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b048_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b050_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b058_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b060_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b068_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b070_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_b078_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b079_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b07a_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b07b_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_b07c_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b080_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b088_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b090_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b098_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0a0_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0a8_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0b0_0)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_b0b8_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0b9_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_b0ba_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0bb_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_b0bc_0)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(6); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0c0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b0c8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b0d0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b0d8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b0e0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b0e8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0f0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0f8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0f9_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0fa_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0fb_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0fc_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 10; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b100_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b108_0)(uae_u32 opcode) /* CMPM */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 26; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b110_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b118_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b120_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b128_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b130_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_b138_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b139_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b140_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b148_0)(uae_u32 opcode) /* CMPM */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 26; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b150_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b158_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b160_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b168_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b170_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_b178_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b179_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b180_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b188_0)(uae_u32 opcode) /* CMPM */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 26; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b190_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b198_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1a0_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_b1a8_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_b1b0_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_b1b8_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_b1b9_0)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_b1c0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b1c8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b1d0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b1d8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b1e0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b1e8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1f0_0)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1f8_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1f9_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_b1fa_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1fb_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1fc_0)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(6); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c000_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_c010_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c018_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c020_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_c028_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c030_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_c038_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c039_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c03a_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c03b_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_c03c_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c040_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_c050_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c058_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c060_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_c068_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c070_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_c078_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c079_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c07a_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c07b_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_c07c_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c080_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c090_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c098_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c0a0_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c0a8_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c0b0_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_c0b8_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c0b9_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_c0ba_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c0bb_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_c0bc_0)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c0c0_0)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 38; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}m68k_incpc(2); return (38+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0d0_0)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(2); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0d8_0)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(2); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0e0_0)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 44; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(2); return (44+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0e8_0)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(4); return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0f0_0)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 48; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}} return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0f8_0)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 46; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(4); return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0f9_0)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 50; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(6); return (50+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fa_0)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(4); return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fb_0)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 48; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}} return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fc_0)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 42; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}m68k_incpc(4); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c100_0)(uae_u32 opcode) /* ABCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 14; CurrentInstrCycles = 6; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); uae_u16 newv, tmp_newv; int cflg; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } cflg = (newv & 0x3F0) > 0x90; if (cflg) newv += 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c108_0)(uae_u32 opcode) /* ABCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 14; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); uae_u16 newv, tmp_newv; int cflg; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } cflg = (newv & 0x3F0) > 0x90; if (cflg) newv += 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); put_byte(dsta,newv); }}}}}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c110_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c118_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c120_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c128_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c130_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c138_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c139_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c140_0)(uae_u32 opcode) /* EXG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 35; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_dreg(regs, srcreg) = (dst); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c148_0)(uae_u32 opcode) /* EXG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 35; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); m68k_areg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c150_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c158_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c160_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c168_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c170_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c178_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c179_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c188_0)(uae_u32 opcode) /* EXG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 35; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); m68k_dreg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c190_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c198_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c1a0_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_c1a8_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_c1b0_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_c1b8_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_c1b9_0)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_c1c0_0)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 38; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}m68k_incpc(2); return (38+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1d0_0)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(2); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1d8_0)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(2); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1e0_0)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 44; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(2); return (44+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1e8_0)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(4); return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1f0_0)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 48; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}} return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1f8_0)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 46; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(4); return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1f9_0)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 50; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(6); return (50+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fa_0)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(4); return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fb_0)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 48; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}} return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fc_0)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 42; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}m68k_incpc(4); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_d000_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d010_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d018_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d020_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_d028_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d030_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_d038_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d039_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d03a_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d03b_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_d03c_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte(2); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d040_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d048_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d050_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d058_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d060_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(2); return 10; } unsigned long REGPARAM2 CPUFUNC(op_d068_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d070_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_d078_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d079_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d07a_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d07b_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_d07c_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d080_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d088_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d090_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d098_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d0a0_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0a8_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0b0_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0b8_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0b9_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_d0ba_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0bb_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0bc_0)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0c0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d0c8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d0d0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d0d8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d0e0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d0e8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0f0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0f8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0f9_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0fa_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0fb_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0fc_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(4); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d100_0)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d108_0)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d110_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d118_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d120_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d128_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d130_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_d138_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d139_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d140_0)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}m68k_incpc(2); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d148_0)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d150_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d158_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d160_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; { uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d168_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d170_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_d178_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d179_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d180_0)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d188_0)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 30; } unsigned long REGPARAM2 CPUFUNC(op_d190_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d198_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1a0_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; { uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(2); return 22; } unsigned long REGPARAM2 CPUFUNC(op_d1a8_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_d1b0_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); {m68k_incpc(2); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_d1b8_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(2); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 24; } unsigned long REGPARAM2 CPUFUNC(op_d1b9_0)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong(2); { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(6); return 28; } unsigned long REGPARAM2 CPUFUNC(op_d1c0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d1c8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d1d0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 14; } #endif #ifdef PART_8 unsigned long REGPARAM2 CPUFUNC(op_d1d8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d1e0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d1e8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1f0_0)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr srca = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1f8_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1f9_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_d1fa_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1fb_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{m68k_incpc(2); { uaecptr tmppc = m68k_getpc(); uaecptr srca = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1fc_0)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(6); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e000_0)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; uae_u32 sign = (0x80 & val) >> 7; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { val = 0xff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xff << (8 - cnt)) & (uae_u32)-sign; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e008_0)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG ((cnt == 8) & (val >> 7)); COPY_CARRY; val = 0; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e010_0)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (7 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e018_0)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 hival; cnt &= 7; hival = val << (8 - cnt); val >>= cnt; val |= hival; val &= 0xff; SET_CFLG ((val & 0x80) >> 7); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e020_0)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; uae_u32 sign = (0x80 & val) >> 7; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { val = 0xff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xff << (8 - cnt)) & (uae_u32)-sign; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e028_0)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG ((cnt == 8) & (val >> 7)); COPY_CARRY; val = 0; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e030_0)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 36) cnt -= 36; if (cnt >= 18) cnt -= 18; if (cnt >= 9) cnt -= 9; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (7 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e038_0)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 hival; cnt &= 7; hival = val << (8 - cnt); val >>= cnt; val |= hival; val &= 0xff; SET_CFLG ((val & 0x80) >> 7); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e040_0)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; uae_u32 sign = (0x8000 & val) >> 15; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { val = 0xffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e048_0)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG ((cnt == 16) & (val >> 15)); COPY_CARRY; val = 0; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e050_0)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (15 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e058_0)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 hival; cnt &= 15; hival = val << (16 - cnt); val >>= cnt; val |= hival; val &= 0xffff; SET_CFLG ((val & 0x8000) >> 15); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e060_0)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; uae_u32 sign = (0x8000 & val) >> 15; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { val = 0xffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e068_0)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG ((cnt == 16) & (val >> 15)); COPY_CARRY; val = 0; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e070_0)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 34) cnt -= 34; if (cnt >= 17) cnt -= 17; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (15 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e078_0)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 hival; cnt &= 15; hival = val << (16 - cnt); val >>= cnt; val |= hival; val &= 0xffff; SET_CFLG ((val & 0x8000) >> 15); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e080_0)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; uae_u32 sign = (0x80000000 & val) >> 31; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { val = 0xffffffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e088_0)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG ((cnt == 32) & (val >> 31)); COPY_CARRY; val = 0; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e090_0)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (31 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e098_0)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 hival; cnt &= 31; hival = val << (32 - cnt); val >>= cnt; val |= hival; val &= 0xffffffff; SET_CFLG ((val & 0x80000000) >> 31); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0a0_0)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; uae_u32 sign = (0x80000000 & val) >> 31; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { val = 0xffffffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0a8_0)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG ((cnt == 32) & (val >> 31)); COPY_CARRY; val = 0; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0b0_0)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 33) cnt -= 33; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (31 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0b8_0)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 hival; cnt &= 31; hival = val << (32 - cnt); val >>= cnt; val |= hival; val &= 0xffffffff; SET_CFLG ((val & 0x80000000) >> 31); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0d0_0)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e0d8_0)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e0e0_0)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e0e8_0)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e0f0_0)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e0f8_0)(uae_u32 opcode) /* ASRW */ { OpcodeFamily = 72; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e0f9_0)(uae_u32 opcode) /* ASRW */ { OpcodeFamily = 72; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e100_0)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_VFLG (val != 0); SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else { uae_u32 mask = (0xff << (7 - cnt)) & 0xff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e108_0)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else { val <<= (cnt - 1); SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e110_0)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 loval = val >> (7 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e118_0)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 loval; cnt &= 7; loval = val >> (8 - cnt); val <<= cnt; val |= loval; val &= 0xff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e120_0)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_VFLG (val != 0); SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { uae_u32 mask = (0xff << (7 - cnt)) & 0xff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e128_0)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { val <<= (cnt - 1); SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e130_0)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 36) cnt -= 36; if (cnt >= 18) cnt -= 18; if (cnt >= 9) cnt -= 9; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 loval = val >> (7 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e138_0)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 loval; cnt &= 7; loval = val >> (8 - cnt); val <<= cnt; val |= loval; val &= 0xff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e140_0)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_VFLG (val != 0); SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else { uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e148_0)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else { val <<= (cnt - 1); SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e150_0)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 loval = val >> (15 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e158_0)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 loval; cnt &= 15; loval = val >> (16 - cnt); val <<= cnt; val |= loval; val &= 0xffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e160_0)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_VFLG (val != 0); SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e168_0)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { val <<= (cnt - 1); SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e170_0)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 34) cnt -= 34; if (cnt >= 17) cnt -= 17; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 loval = val >> (15 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e178_0)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 loval; cnt &= 15; loval = val >> (16 - cnt); val <<= cnt; val |= loval; val &= 0xffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e180_0)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_VFLG (val != 0); SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else { uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e188_0)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else { val <<= (cnt - 1); SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e190_0)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 loval = val >> (31 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e198_0)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 loval; cnt &= 31; loval = val >> (32 - cnt); val <<= cnt; val |= loval; val &= 0xffffffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1a0_0)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_VFLG (val != 0); SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1a8_0)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { val <<= (cnt - 1); SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1b0_0)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 33) cnt -= 33; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 loval = val >> (31 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1b8_0)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 loval; cnt &= 31; loval = val >> (32 - cnt); val <<= cnt; val |= loval; val &= 0xffffffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1d0_0)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e1d8_0)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e1e0_0)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e1e8_0)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e1f0_0)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e1f8_0)(uae_u32 opcode) /* ASLW */ { OpcodeFamily = 73; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e1f9_0)(uae_u32 opcode) /* ASLW */ { OpcodeFamily = 73; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e2d0_0)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e2d8_0)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e2e0_0)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e2e8_0)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e2f0_0)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e2f8_0)(uae_u32 opcode) /* LSRW */ { OpcodeFamily = 74; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e2f9_0)(uae_u32 opcode) /* LSRW */ { OpcodeFamily = 74; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e3d0_0)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e3d8_0)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e3e0_0)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e3e8_0)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e3f0_0)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e3f8_0)(uae_u32 opcode) /* LSLW */ { OpcodeFamily = 75; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e3f9_0)(uae_u32 opcode) /* LSLW */ { OpcodeFamily = 75; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e4d0_0)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e4d8_0)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e4e0_0)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e4e8_0)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e4f0_0)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e4f8_0)(uae_u32 opcode) /* ROXRW */ { OpcodeFamily = 79; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e4f9_0)(uae_u32 opcode) /* ROXRW */ { OpcodeFamily = 79; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e5d0_0)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e5d8_0)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e5e0_0)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e5e8_0)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e5f0_0)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e5f8_0)(uae_u32 opcode) /* ROXLW */ { OpcodeFamily = 78; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e5f9_0)(uae_u32 opcode) /* ROXLW */ { OpcodeFamily = 78; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e6d0_0)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e6d8_0)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e6e0_0)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e6e8_0)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e6f0_0)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e6f8_0)(uae_u32 opcode) /* RORW */ { OpcodeFamily = 77; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e6f9_0)(uae_u32 opcode) /* RORW */ { OpcodeFamily = 77; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e7d0_0)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e7d8_0)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); { uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e7e0_0)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; { uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_e7e8_0)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e7f0_0)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 18; {{m68k_incpc(2); { uaecptr dataa = get_disp_ea_020(m68k_areg(regs, srcreg), next_iword()); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_e7f8_0)(uae_u32 opcode) /* ROLW */ { OpcodeFamily = 76; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e7f9_0)(uae_u32 opcode) /* ROLW */ { OpcodeFamily = 76; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong(2); { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(6); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e8c0_0)(uae_u32 opcode) /* BFTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 88; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_e8d0_0)(uae_u32 opcode) /* BFTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 88; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_e8e8_0)(uae_u32 opcode) /* BFTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 88; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e8f0_0)(uae_u32 opcode) /* BFTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 88; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_e8f8_0)(uae_u32 opcode) /* BFTST */ { OpcodeFamily = 88; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e8f9_0)(uae_u32 opcode) /* BFTST */ { OpcodeFamily = 88; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e8fa_0)(uae_u32 opcode) /* BFTST */ { uae_u32 dstreg = 2; OpcodeFamily = 88; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e8fb_0)(uae_u32 opcode) /* BFTST */ { uae_u32 dstreg = 3; OpcodeFamily = 88; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_e9c0_0)(uae_u32 opcode) /* BFEXTU */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 89; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_e9d0_0)(uae_u32 opcode) /* BFEXTU */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 89; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_e9e8_0)(uae_u32 opcode) /* BFEXTU */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 89; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e9f0_0)(uae_u32 opcode) /* BFEXTU */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 89; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_e9f8_0)(uae_u32 opcode) /* BFEXTU */ { OpcodeFamily = 89; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e9f9_0)(uae_u32 opcode) /* BFEXTU */ { OpcodeFamily = 89; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e9fa_0)(uae_u32 opcode) /* BFEXTU */ { uae_u32 dstreg = 2; OpcodeFamily = 89; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_e9fb_0)(uae_u32 opcode) /* BFEXTU */ { uae_u32 dstreg = 3; OpcodeFamily = 89; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_eac0_0)(uae_u32 opcode) /* BFCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 90; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = ~tmp; tmp <<= (32 - width); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : (0xffffffff << (32 - (offset & 0x1f))))) | (tmp >> (offset & 0x1f)) | (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_ead0_0)(uae_u32 opcode) /* BFCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 90; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = ~tmp; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_eae8_0)(uae_u32 opcode) /* BFCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 90; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = ~tmp; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_eaf0_0)(uae_u32 opcode) /* BFCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 90; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = ~tmp; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_eaf8_0)(uae_u32 opcode) /* BFCHG */ { OpcodeFamily = 90; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = ~tmp; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_eaf9_0)(uae_u32 opcode) /* BFCHG */ { OpcodeFamily = 90; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = ~tmp; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_ebc0_0)(uae_u32 opcode) /* BFEXTS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 91; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_ebd0_0)(uae_u32 opcode) /* BFEXTS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 91; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_ebe8_0)(uae_u32 opcode) /* BFEXTS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 91; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_ebf0_0)(uae_u32 opcode) /* BFEXTS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 91; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_ebf8_0)(uae_u32 opcode) /* BFEXTS */ { OpcodeFamily = 91; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_ebf9_0)(uae_u32 opcode) /* BFEXTS */ { OpcodeFamily = 91; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_ebfa_0)(uae_u32 opcode) /* BFEXTS */ { uae_u32 dstreg = 2; OpcodeFamily = 91; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_ebfb_0)(uae_u32 opcode) /* BFEXTS */ { uae_u32 dstreg = 3; OpcodeFamily = 91; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); if (GET_NFLG) tmp |= width == 32 ? 0 : (-1 << width); m68k_dreg(regs, (extra >> 12) & 7) = tmp; }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_ecc0_0)(uae_u32 opcode) /* BFCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 92; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0; tmp <<= (32 - width); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : (0xffffffff << (32 - (offset & 0x1f))))) | (tmp >> (offset & 0x1f)) | (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_ecd0_0)(uae_u32 opcode) /* BFCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 92; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_ece8_0)(uae_u32 opcode) /* BFCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 92; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_ecf0_0)(uae_u32 opcode) /* BFCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 92; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_ecf8_0)(uae_u32 opcode) /* BFCLR */ { OpcodeFamily = 92; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_ecf9_0)(uae_u32 opcode) /* BFCLR */ { OpcodeFamily = 92; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_edc0_0)(uae_u32 opcode) /* BFFFO */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 93; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_edd0_0)(uae_u32 opcode) /* BFFFO */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 93; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_ede8_0)(uae_u32 opcode) /* BFFFO */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 93; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_edf0_0)(uae_u32 opcode) /* BFFFO */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 93; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_edf8_0)(uae_u32 opcode) /* BFFFO */ { OpcodeFamily = 93; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_edf9_0)(uae_u32 opcode) /* BFFFO */ { OpcodeFamily = 93; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_edfa_0)(uae_u32 opcode) /* BFFFO */ { uae_u32 dstreg = 2; OpcodeFamily = 93; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_edfb_0)(uae_u32 opcode) /* BFFFO */ { uae_u32 dstreg = 3; OpcodeFamily = 93; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr tmppc = m68k_getpc(); uaecptr dsta = get_disp_ea_020(tmppc, next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); { uae_u32 mask = 1 << (width-1); while (mask) { if (tmp & mask) break; mask >>= 1; offset++; }} m68k_dreg(regs, (extra >> 12) & 7) = offset; }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_eec0_0)(uae_u32 opcode) /* BFSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 94; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0xffffffff; tmp <<= (32 - width); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : (0xffffffff << (32 - (offset & 0x1f))))) | (tmp >> (offset & 0x1f)) | (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_eed0_0)(uae_u32 opcode) /* BFSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 94; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0xffffffff; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_eee8_0)(uae_u32 opcode) /* BFSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 94; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0xffffffff; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_eef0_0)(uae_u32 opcode) /* BFSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 94; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0xffffffff; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_eef8_0)(uae_u32 opcode) /* BFSET */ { OpcodeFamily = 94; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0xffffffff; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_eef9_0)(uae_u32 opcode) /* BFSET */ { OpcodeFamily = 94; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = 0xffffffff; tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_efc0_0)(uae_u32 opcode) /* BFINS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 95; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); {{ uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp = m68k_dreg(regs, dstreg) << (offset & 0x1f); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = m68k_dreg(regs, (extra >> 12) & 7); SET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0); SET_ZFLG (tmp == 0); tmp <<= (32 - width); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ((offset & 0x1f) == 0 ? 0 : (0xffffffff << (32 - (offset & 0x1f))))) | (tmp >> (offset & 0x1f)) | (((offset & 0x1f) + width) >= 32 ? 0 : (m68k_dreg(regs, dstreg) & ((uae_u32)0xffffffff >> ((offset & 0x1f) + width)))); }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_efd0_0)(uae_u32 opcode) /* BFINS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 95; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = m68k_dreg(regs, (extra >> 12) & 7); SET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0); SET_ZFLG (tmp == 0); tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(4); return 8; } unsigned long REGPARAM2 CPUFUNC(op_efe8_0)(uae_u32 opcode) /* BFINS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 95; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = m68k_dreg(regs, (extra >> 12) & 7); SET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0); SET_ZFLG (tmp == 0); tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_eff0_0)(uae_u32 opcode) /* BFINS */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 95; CurrentInstrCycles = 14; {{ uae_s16 extra = get_iword(2); {m68k_incpc(4); { uaecptr dsta = get_disp_ea_020(m68k_areg(regs, dstreg), next_iword()); BusCyclePenalty += 2; { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = m68k_dreg(regs, (extra >> 12) & 7); SET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0); SET_ZFLG (tmp == 0); tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_eff8_0)(uae_u32 opcode) /* BFINS */ { OpcodeFamily = 95; CurrentInstrCycles = 12; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = m68k_dreg(regs, (extra >> 12) & 7); SET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0); SET_ZFLG (tmp == 0); tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_eff9_0)(uae_u32 opcode) /* BFINS */ { OpcodeFamily = 95; CurrentInstrCycles = 16; {{ uae_s16 extra = get_iword(2); { uaecptr dsta = get_ilong(4); { uae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f; int width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1; uae_u32 tmp,bf0,bf1; dsta += (offset >> 3) | (offset & 0x80000000 ? ~0x1fffffff : 0); bf0 = get_long(dsta);bf1 = get_byte(dsta+4) & 0xff; tmp = (bf0 << (offset & 7)) | (bf1 >> (8 - (offset & 7))); tmp >>= (32 - width); SET_NFLG (tmp & (1 << (width-1)) ? 1 : 0); SET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0); tmp = m68k_dreg(regs, (extra >> 12) & 7); SET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0); SET_ZFLG (tmp == 0); tmp <<= (32 - width); bf0 = (bf0 & (0xff000000 << (8 - (offset & 7)))) | (tmp >> (offset & 7)) | (((offset & 7) + width) >= 32 ? 0 : (bf0 & ((uae_u32)0xffffffff >> ((offset & 7) + width)))); put_long(dsta,bf0 ); if (((offset & 7) + width) > 32) { bf1 = (bf1 & (0xff >> (width - 32 + (offset & 7)))) | (tmp << (8 - (offset & 7))); put_byte(dsta+4,bf1); } }}}}m68k_incpc(8); return 16; } unsigned long REGPARAM2 CPUFUNC(op_f200_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f208_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f210_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f218_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f220_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f228_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f230_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f238_0)(uae_u32 opcode) /* FPP */ { OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f239_0)(uae_u32 opcode) /* FPP */ { OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f23a_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = 2; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f23b_0)(uae_u32 opcode) /* FPP */ { uae_u32 dstreg = 3; OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f23c_0)(uae_u32 opcode) /* FPP */ { OpcodeFamily = 104; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fpp_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f240_0)(uae_u32 opcode) /* FScc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f248_0)(uae_u32 opcode) /* FDBcc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 105; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fdbcc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f250_0)(uae_u32 opcode) /* FScc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f258_0)(uae_u32 opcode) /* FScc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f260_0)(uae_u32 opcode) /* FScc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f268_0)(uae_u32 opcode) /* FScc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f270_0)(uae_u32 opcode) /* FScc */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f278_0)(uae_u32 opcode) /* FScc */ { OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f279_0)(uae_u32 opcode) /* FScc */ { OpcodeFamily = 106; CurrentInstrCycles = 8; {{ uae_s16 extra = get_iword(2); m68k_incpc(4); fscc_opp(opcode,extra); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f27a_0)(uae_u32 opcode) /* FTRAPcc */ { OpcodeFamily = 107; CurrentInstrCycles = 8; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s16 dummy = get_iword(0); m68k_incpc(2); ftrapcc_opp(opcode,oldpc); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f27b_0)(uae_u32 opcode) /* FTRAPcc */ { OpcodeFamily = 107; CurrentInstrCycles = 12; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); { uae_s32 dummy = get_ilong(0); m68k_incpc(4); ftrapcc_opp(opcode,oldpc); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_f27c_0)(uae_u32 opcode) /* FTRAPcc */ { OpcodeFamily = 107; CurrentInstrCycles = 4; {m68k_incpc(2); { uaecptr oldpc = m68k_getpc(); ftrapcc_opp(opcode,oldpc); }}return 4; } unsigned long REGPARAM2 CPUFUNC(op_f280_0)(uae_u32 opcode) /* FBcc */ { uae_u32 srcreg = (opcode & 63); OpcodeFamily = 108; CurrentInstrCycles = 8; {m68k_incpc(2); { uaecptr pc = m68k_getpc(); { uae_s16 extra = get_iword(0); m68k_incpc(2); fbcc_opp(opcode,pc,extra); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_f2c0_0)(uae_u32 opcode) /* FBcc */ { uae_u32 srcreg = (opcode & 63); OpcodeFamily = 108; CurrentInstrCycles = 12; {m68k_incpc(2); { uaecptr pc = m68k_getpc(); { uae_s32 extra = get_ilong(0); m68k_incpc(4); fbcc_opp(opcode,pc,extra); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_f310_0)(uae_u32 opcode) /* FSAVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 109; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1835; } {m68k_incpc(2); fsave_opp(opcode); }}endlabel1835: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f320_0)(uae_u32 opcode) /* FSAVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 109; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1836; } {m68k_incpc(2); fsave_opp(opcode); }}endlabel1836: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f328_0)(uae_u32 opcode) /* FSAVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 109; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1837; } {m68k_incpc(2); fsave_opp(opcode); }}endlabel1837: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f330_0)(uae_u32 opcode) /* FSAVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 109; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1838; } {m68k_incpc(2); fsave_opp(opcode); }}endlabel1838: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f338_0)(uae_u32 opcode) /* FSAVE */ { OpcodeFamily = 109; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1839; } {m68k_incpc(2); fsave_opp(opcode); }}endlabel1839: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f339_0)(uae_u32 opcode) /* FSAVE */ { OpcodeFamily = 109; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1840; } {m68k_incpc(2); fsave_opp(opcode); }}endlabel1840: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f350_0)(uae_u32 opcode) /* FRESTORE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1841; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1841: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f358_0)(uae_u32 opcode) /* FRESTORE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1842; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1842: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f368_0)(uae_u32 opcode) /* FRESTORE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1843; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1843: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f370_0)(uae_u32 opcode) /* FRESTORE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1844; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1844: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f378_0)(uae_u32 opcode) /* FRESTORE */ { OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1845; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1845: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f379_0)(uae_u32 opcode) /* FRESTORE */ { OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1846; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1846: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f37a_0)(uae_u32 opcode) /* FRESTORE */ { OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1847; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1847: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f37b_0)(uae_u32 opcode) /* FRESTORE */ { OpcodeFamily = 110; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1848; } {m68k_incpc(2); frestore_opp(opcode); }}endlabel1848: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f408_0)(uae_u32 opcode) /* CINVL */ { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; OpcodeFamily = 111; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1849; } {}}m68k_incpc(2); endlabel1849: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f410_0)(uae_u32 opcode) /* CINVP */ { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; OpcodeFamily = 112; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1850; } {}}m68k_incpc(2); endlabel1850: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f418_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1851; } {}}m68k_incpc(2); endlabel1851: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f419_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1852; } {}}m68k_incpc(2); endlabel1852: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f41a_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1853; } {}}m68k_incpc(2); endlabel1853: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f41b_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1854; } {}}m68k_incpc(2); endlabel1854: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f41c_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1855; } {}}m68k_incpc(2); endlabel1855: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f41d_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1856; } {}}m68k_incpc(2); endlabel1856: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f41e_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1857; } {}}m68k_incpc(2); endlabel1857: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f41f_0)(uae_u32 opcode) /* CINVA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 113; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1858; } {}}m68k_incpc(2); endlabel1858: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f428_0)(uae_u32 opcode) /* CPUSHL */ { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; OpcodeFamily = 114; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1859; } {}}m68k_incpc(2); endlabel1859: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f430_0)(uae_u32 opcode) /* CPUSHP */ { uae_u32 srcreg = ((opcode >> 6) & 3); uae_u32 dstreg = opcode & 7; OpcodeFamily = 115; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1860; } {}}m68k_incpc(2); endlabel1860: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f438_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1861; } {}}m68k_incpc(2); endlabel1861: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f439_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1862; } {}}m68k_incpc(2); endlabel1862: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f43a_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1863; } {}}m68k_incpc(2); endlabel1863: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f43b_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1864; } {}}m68k_incpc(2); endlabel1864: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f43c_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1865; } {}}m68k_incpc(2); endlabel1865: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f43d_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1866; } {}}m68k_incpc(2); endlabel1866: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f43e_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1867; } {}}m68k_incpc(2); endlabel1867: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f43f_0)(uae_u32 opcode) /* CPUSHA */ { uae_u32 srcreg = ((opcode >> 6) & 3); OpcodeFamily = 116; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1868; } {}}m68k_incpc(2); endlabel1868: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_f500_0)(uae_u32 opcode) /* MMUOP */ { uae_u32 srcreg = (uae_s32)(uae_s8)((opcode >> 3) & 255); uae_u32 dstreg = opcode & 7; OpcodeFamily = 118; CurrentInstrCycles = 4; {{ uae_u32 extra = srcreg; m68k_incpc(2); mmu_op(opcode,extra); }}return 4; } unsigned long REGPARAM2 CPUFUNC(op_f600_0)(uae_u32 opcode) /* MOVE16 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 117; CurrentInstrCycles = 12; {{ uaecptr memsa = m68k_areg(regs, srcreg); { uaecptr memda = get_ilong(2); memsa &= ~15; memda &= ~15; put_long(memda, get_long(memsa)); put_long(memda+4, get_long(memsa+4)); put_long(memda+8, get_long(memsa+8)); put_long(memda+12, get_long(memsa+12)); m68k_areg(regs, srcreg) += 16; }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_f608_0)(uae_u32 opcode) /* MOVE16 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 117; CurrentInstrCycles = 12; {{ uaecptr memsa = get_ilong(2); { uaecptr memda = m68k_areg(regs, dstreg); memsa &= ~15; memda &= ~15; put_long(memda, get_long(memsa)); put_long(memda+4, get_long(memsa+4)); put_long(memda+8, get_long(memsa+8)); put_long(memda+12, get_long(memsa+12)); m68k_areg(regs, dstreg) += 16; }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_f610_0)(uae_u32 opcode) /* MOVE16 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 117; CurrentInstrCycles = 12; {{ uaecptr memsa = m68k_areg(regs, srcreg); { uaecptr memda = get_ilong(2); memsa &= ~15; memda &= ~15; put_long(memda, get_long(memsa)); put_long(memda+4, get_long(memsa+4)); put_long(memda+8, get_long(memsa+8)); put_long(memda+12, get_long(memsa+12)); }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_f618_0)(uae_u32 opcode) /* MOVE16 */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 117; CurrentInstrCycles = 12; {{ uaecptr memsa = get_ilong(2); { uaecptr memda = m68k_areg(regs, dstreg); memsa &= ~15; memda &= ~15; put_long(memda, get_long(memsa)); put_long(memda+4, get_long(memsa+4)); put_long(memda+8, get_long(memsa+8)); put_long(memda+12, get_long(memsa+12)); }}}m68k_incpc(6); return 12; } unsigned long REGPARAM2 CPUFUNC(op_f620_0)(uae_u32 opcode) /* MOVE16 */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = 0; OpcodeFamily = 117; CurrentInstrCycles = 8; { uaecptr mems = m68k_areg(regs, srcreg) & ~15, memd; dstreg = (get_iword(2) >> 12) & 7; memd = m68k_areg(regs, dstreg) & ~15; put_long(memd, get_long(mems)); put_long(memd+4, get_long(mems+4)); put_long(memd+8, get_long(mems+8)); put_long(memd+12, get_long(mems+12)); if (srcreg != dstreg) m68k_areg(regs, srcreg) += 16; m68k_areg(regs, dstreg) += 16; }m68k_incpc(4); return 8; } #endif #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 #define PART_3 1 #define PART_4 1 #define PART_5 1 #define PART_6 1 #define PART_7 1 #define PART_8 1 #endif #ifdef PART_1 #endif #ifdef PART_2 #endif #ifdef PART_3 #endif #ifdef PART_4 #endif #ifdef PART_5 #endif #ifdef PART_6 #endif #ifdef PART_7 #endif #ifdef PART_8 #endif #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 #define PART_3 1 #define PART_4 1 #define PART_5 1 #define PART_6 1 #define PART_7 1 #define PART_8 1 #endif #ifdef PART_1 #endif #ifdef PART_2 #endif #ifdef PART_3 #endif #ifdef PART_4 #endif #ifdef PART_5 #endif #ifdef PART_6 #endif #ifdef PART_7 #endif #ifdef PART_8 #endif #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 #define PART_3 1 #define PART_4 1 #define PART_5 1 #define PART_6 1 #define PART_7 1 #define PART_8 1 #endif #ifdef PART_1 unsigned long REGPARAM2 CPUFUNC(op_30_3)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_70_3)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_b0_3)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_130_3)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_13b_3)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_170_3)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_17b_3)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1b0_3)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1bb_3)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1f0_3)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1fb_3)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_230_3)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_270_3)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_2b0_3)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_430_3)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_470_3)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_4b0_3)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_630_3)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_670_3)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_6b0_3)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_830_3)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_83b_3)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = 3; OpcodeFamily = 21; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_870_3)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_87b_3)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = 3; OpcodeFamily = 22; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_8b0_3)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_8bb_3)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = 3; OpcodeFamily = 23; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_8f0_3)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_8fb_3)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = 3; OpcodeFamily = 24; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); put_byte(dsta,dst); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_a30_3)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_a70_3)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } #endif #ifdef PART_2 unsigned long REGPARAM2 CPUFUNC(op_ab0_3)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_c30_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c3b_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c70_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c7b_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_cb0_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_cbb_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong(2); { uaecptr tmppc = m68k_getpc() + 6; uaecptr dsta = get_disp_ea_000(tmppc, get_iword(6)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_1030_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_103b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_10b0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_10bb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_10f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_10fb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1130_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_113b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1170_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_117b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_1180_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_1188_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_1190_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_1198_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_11a0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_11a8_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_11b0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 24; } unsigned long REGPARAM2 CPUFUNC(op_11b8_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_11b9_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_ilong(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_11ba_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_11bb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 24; } unsigned long REGPARAM2 CPUFUNC(op_11bc_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_11f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_11fb_3)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_13f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_13fb_3)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_2030_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_203b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_2070_3)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_207b_3)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_20b0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_20bb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_20f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_20fb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_2130_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } #endif #ifdef PART_3 unsigned long REGPARAM2 CPUFUNC(op_213b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_2170_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_217b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_2180_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_2188_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_2190_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_2198_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_21a0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; { uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 28; } unsigned long REGPARAM2 CPUFUNC(op_21a8_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_21b0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 32; } unsigned long REGPARAM2 CPUFUNC(op_21b8_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_21b9_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr srca = get_ilong(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_21ba_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_21bb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 32; } unsigned long REGPARAM2 CPUFUNC(op_21bc_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_21f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_21fb_3)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(6); return 30; } unsigned long REGPARAM2 CPUFUNC(op_23f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_23fb_3)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(8); return 34; } unsigned long REGPARAM2 CPUFUNC(op_3030_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_303b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_3070_3)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_307b_3)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_30b0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_30bb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_30f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_30fb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_3130_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_313b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_3170_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_317b_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_3180_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_3188_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_3190_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_3198_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_31a0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; { uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_31a8_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_31b0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 24; } unsigned long REGPARAM2 CPUFUNC(op_31b8_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_31b9_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_ilong(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_31ba_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword(2); { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_31bb_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 24; } unsigned long REGPARAM2 CPUFUNC(op_31bc_3)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}m68k_incpc(6); return 18; } unsigned long REGPARAM2 CPUFUNC(op_31f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_31fb_3)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(6); return 22; } unsigned long REGPARAM2 CPUFUNC(op_33f0_3)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_33fb_3)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong(4); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(8); return 26; } unsigned long REGPARAM2 CPUFUNC(op_4030_3)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4070_3)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); put_word(srca,newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_40b0_3)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); put_long(srca,newv); }}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_40f0_3)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 18; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel1997; } {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; MakeSR(); put_word(srca,regs.sr); }}}m68k_incpc(4); endlabel1997: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41b0_3)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel1998; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel1998; } }}}}endlabel1998: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_41bb_3)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); { uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel1999; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel1999; } }}}}endlabel1999: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_41f0_3)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_41fb_3)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4230_3)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); put_byte(srca,0); }}m68k_incpc(4); return 18; } #endif #ifdef PART_4 unsigned long REGPARAM2 CPUFUNC(op_4270_3)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); put_word(srca,0); }}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_42b0_3)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); put_long(srca,0); }}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_42f0_3)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; MakeSR(); put_word(srca,regs.sr & 0xff); }}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4430_3)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(srca,dst); }}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4470_3)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(srca,dst); }}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_44b0_3)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(srca,dst); }}}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_44f0_3)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(4); return 22; } unsigned long REGPARAM2 CPUFUNC(op_44fb_3)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}m68k_incpc(4); return 22; } unsigned long REGPARAM2 CPUFUNC(op_4630_3)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); put_byte(srca,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4670_3)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); put_word(srca,dst); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_46b0_3)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); put_long(srca,dst); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_46f0_3)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 22; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2014; } {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(4); endlabel2014: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_46fb_3)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 22; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2015; } {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}m68k_incpc(4); endlabel2015: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_4830_3)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); put_byte(srca,newv); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4870_3)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(4); return 22; } unsigned long REGPARAM2 CPUFUNC(op_487b_3)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uaecptr dsta = m68k_areg(regs, 7) - 4; m68k_areg (regs, 7) = dsta; put_long(dsta,srca); }}}m68k_incpc(4); return 22; } unsigned long REGPARAM2 CPUFUNC(op_48b0_3)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 14; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f0_3)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 14; { uae_u16 mask = get_iword(2); retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4a30_3)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a3b_3)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a70_3)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a7b_3)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ab0_3)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4abb_3)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_4af0_3)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; put_byte(srca,src); }}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_4cb0_3)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cbb_3)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 3; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr tmppc = m68k_getpc() + 4; uaecptr srca = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}m68k_incpc(6); return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf0_3)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4)); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cfb_3)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 3; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr tmppc = m68k_getpc() + 4; uaecptr srca = get_disp_ea_000(tmppc, get_iword(4)); BusCyclePenalty += 2; { while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}m68k_incpc(6); return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4eb0_3)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; m68k_do_jsr(m68k_getpc() + 4, srca); }}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4ebb_3)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; m68k_do_jsr(m68k_getpc() + 4, srca); }}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4ef0_3)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; m68k_setpc(srca); }}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4efb_3)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; m68k_setpc(srca); }}return 14; } #endif #ifdef PART_5 unsigned long REGPARAM2 CPUFUNC(op_5030_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5070_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_50b0_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 26; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_50f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(0) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5130_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5170_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_51b0_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 26; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_51f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(1) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_52f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(2) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_53f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(3) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_54f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(4) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_55f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(5) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_56f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(6) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_57f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(7) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_58f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(8) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_59f0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(9) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5af0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(10) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5bf0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(11) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5cf0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(12) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5df0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(13) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_5ef0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(14) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } #endif #ifdef PART_6 unsigned long REGPARAM2 CPUFUNC(op_5ff0_3)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { int val = cctrue(15) ? 0xff : 0; put_byte(srca,val); }}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_60ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(0)) goto endlabel2058; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2058; { uae_s32 src = get_ilong(2); if (!cctrue(0)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2058: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_62ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(2)) goto endlabel2059; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2059; { uae_s32 src = get_ilong(2); if (!cctrue(2)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2059: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_63ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(3)) goto endlabel2060; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2060; { uae_s32 src = get_ilong(2); if (!cctrue(3)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2060: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_64ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(4)) goto endlabel2061; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2061; { uae_s32 src = get_ilong(2); if (!cctrue(4)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2061: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_65ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(5)) goto endlabel2062; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2062; { uae_s32 src = get_ilong(2); if (!cctrue(5)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2062: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_66ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(6)) goto endlabel2063; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2063; { uae_s32 src = get_ilong(2); if (!cctrue(6)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2063: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_67ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(7)) goto endlabel2064; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2064; { uae_s32 src = get_ilong(2); if (!cctrue(7)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2064: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_68ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(8)) goto endlabel2065; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2065; { uae_s32 src = get_ilong(2); if (!cctrue(8)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2065: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_69ff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(9)) goto endlabel2066; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2066; { uae_s32 src = get_ilong(2); if (!cctrue(9)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2066: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6aff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(10)) goto endlabel2067; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2067; { uae_s32 src = get_ilong(2); if (!cctrue(10)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2067: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6bff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(11)) goto endlabel2068; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2068; { uae_s32 src = get_ilong(2); if (!cctrue(11)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2068: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6cff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(12)) goto endlabel2069; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2069; { uae_s32 src = get_ilong(2); if (!cctrue(12)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2069: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6dff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(13)) goto endlabel2070; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2070; { uae_s32 src = get_ilong(2); if (!cctrue(13)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2070: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6eff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(14)) goto endlabel2071; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2071; { uae_s32 src = get_ilong(2); if (!cctrue(14)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2071: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6fff_3)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(15)) goto endlabel2072; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2072; { uae_s32 src = get_ilong(2); if (!cctrue(15)) goto didnt_jump; m68k_incpc ((uae_s32)src + 2); return 10; didnt_jump:; }}m68k_incpc(6); endlabel2072: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_8030_3)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_803b_3)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_8070_3)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_807b_3)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_80b0_3)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_80bb_3)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_80f0_3)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2079; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel2079: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fb_3)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel2080; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}endlabel2080: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_8130_3)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_8170_3)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_81b0_3)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_81f0_3)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2084; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel2084: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fb_3)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel2085; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}endlabel2085: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_9030_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_903b_3)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_9070_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_907b_3)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_90b0_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_90bb_3)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_90f0_3)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_90fb_3)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_9130_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_9170_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_91b0_3)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_91f0_3)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_91fb_3)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b030_3)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b03b_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } #endif #ifdef PART_7 unsigned long REGPARAM2 CPUFUNC(op_b070_3)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b07b_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0b0_3)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b0bb_3)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b0f0_3)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0fb_3)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b130_3)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b170_3)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1b0_3)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_b1f0_3)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1fb_3)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c030_3)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c03b_3)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c070_3)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c07b_3)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c0b0_3)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c0bb_3)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c0f0_3)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 48; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(4); return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fb_3)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 48; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}m68k_incpc(4); return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c130_3)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); put_byte(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c170_3)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); put_word(dsta,src); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c1b0_3)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); put_long(dsta,src); }}}}m68k_incpc(4); return 26; } unsigned long REGPARAM2 CPUFUNC(op_c1f0_3)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 48; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(4); return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fb_3)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 48; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}m68k_incpc(4); return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_d030_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d03b_3)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d070_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d07b_3)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}m68k_incpc(4); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d0b0_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0bb_3)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0f0_3)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0fb_3)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d130_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_byte(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d170_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_word(dsta,newv); }}}}}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1b0_3)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); put_long(dsta,newv); }}}}}}}m68k_incpc(4); return 26; } #endif #ifdef PART_8 unsigned long REGPARAM2 CPUFUNC(op_d1f0_3)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1fb_3)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword(2)); BusCyclePenalty += 2; { uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}m68k_incpc(4); return 20; } unsigned long REGPARAM2 CPUFUNC(op_e0f0_3)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e1f0_3)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e2f0_3)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e3f0_3)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e4f0_3)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e5f0_3)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e6f0_3)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); put_word(dataa,val); }}}}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_e7f0_3)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; { uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); put_word(dataa,val); }}}}m68k_incpc(4); return 18; } #endif #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 #define PART_3 1 #define PART_4 1 #define PART_5 1 #define PART_6 1 #define PART_7 1 #define PART_8 1 #endif #ifdef PART_1 #endif #ifdef PART_2 #endif #ifdef PART_3 unsigned long REGPARAM2 CPUFUNC(op_40c0_4)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 6; {{ MakeSR(); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); }}m68k_incpc(2); return 6; } unsigned long REGPARAM2 CPUFUNC(op_40d0_4)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_40d8_4)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += 2; MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(2); return 12; } unsigned long REGPARAM2 CPUFUNC(op_40e0_4)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; m68k_areg (regs, srcreg) = srca; MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(2); return 14; } unsigned long REGPARAM2 CPUFUNC(op_40e8_4)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword(2); MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_40f0_4)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2)); BusCyclePenalty += 2; MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(4); return 18; } unsigned long REGPARAM2 CPUFUNC(op_40f8_4)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword(2); MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(4); return 16; } unsigned long REGPARAM2 CPUFUNC(op_40f9_4)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong(2); MakeSR(); put_word(srca,regs.sr); }}m68k_incpc(6); return 20; } #endif #ifdef PART_4 unsigned long REGPARAM2 CPUFUNC(op_4e73_4)(uae_u32 opcode) /* RTE */ { OpcodeFamily = 45; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2154; } {{ uaecptr sra = m68k_areg(regs, 7); { uae_s16 sr = get_word(sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); { uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; regs.sr = sr; m68k_setpc_rte(pc); MakeFromSR(); }}}}}}endlabel2154: ; return 20; } #endif #ifdef PART_5 #endif #ifdef PART_6 #endif #ifdef PART_7 #endif #ifdef PART_8 #endif #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8) #define PART_1 1 #define PART_2 1 #define PART_3 1 #define PART_4 1 #define PART_5 1 #define PART_6 1 #define PART_7 1 #define PART_8 1 #endif #ifdef PART_1 unsigned long REGPARAM2 CPUFUNC(op_0_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_10_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_18_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_20_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_28_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_30_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_38_5)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_39_5)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_3c_5)(uae_u32 opcode) /* ORSR */ { OpcodeFamily = 4; CurrentInstrCycles = 20; { MakeSR(); { uae_s16 src = get_iword_prefetch(2); src &= 0xFF; regs.sr |= src; MakeFromSR(); }}m68k_incpc(4); fill_prefetch_0 (); return 20; } unsigned long REGPARAM2 CPUFUNC(op_40_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_50_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2165; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2165: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_58_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2166; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2166: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_60_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2167; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2167: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_68_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2168; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2168: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_70_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2169; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2169: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_78_5)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2170; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2170: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_79_5)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2171; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2171: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_7c_5)(uae_u32 opcode) /* ORSR */ { OpcodeFamily = 4; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2172; } { MakeSR(); { uae_s16 src = get_iword_prefetch(2); regs.sr |= src; MakeFromSR(); }}}m68k_incpc(4); fill_prefetch_0 (); endlabel2172: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_80_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2174; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2174: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_98_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2175; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2175: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_a0_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2176; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2176: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_a8_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2177; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2177: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_b0_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2178; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2178: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_b8_5)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2179; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2179: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_b9_5)(uae_u32 opcode) /* OR */ { OpcodeFamily = 1; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2180; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2180: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_100_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_108_5)(uae_u32 opcode) /* MVPMR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 29; CurrentInstrCycles = 16; { uaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_u16 val = (get_byte(memp) << 8) + get_byte(memp + 2); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}m68k_incpc(4); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_110_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_118_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_120_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 10; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_128_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_130_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_138_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_139_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_13a_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_13b_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_13c_5)(uae_u32 opcode) /* BTST */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 21; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = get_ibyte_prefetch(2); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_140_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_148_5)(uae_u32 opcode) /* MVPMR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 29; CurrentInstrCycles = 24; { uaecptr memp = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_u32 val = (get_byte(memp) << 24) + (get_byte(memp + 2) << 16) + (get_byte(memp + 4) << 8) + get_byte(memp + 6); m68k_dreg(regs, dstreg) = (val); }}m68k_incpc(4); fill_prefetch_0 (); return 24; } unsigned long REGPARAM2 CPUFUNC(op_150_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_158_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_160_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_168_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_170_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_178_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_179_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_17a_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_17b_5)(uae_u32 opcode) /* BCHG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_180_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 10; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); if ( src < 16 ) { m68k_incpc(2); return 8; } }}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_188_5)(uae_u32 opcode) /* MVPRM */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 28; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); uaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); put_byte(memp, src >> 8); put_byte(memp + 2, src); }}m68k_incpc(4); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_190_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_198_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1a0_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1a8_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1b0_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1b8_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1b9_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_1ba_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1bb_5)(uae_u32 opcode) /* BCLR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1c0_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1c8_5)(uae_u32 opcode) /* MVPRM */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 28; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); uaecptr memp = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); put_byte(memp, src >> 24); put_byte(memp + 2, src >> 16); put_byte(memp + 4, src >> 8); put_byte(memp + 6, src); }}m68k_incpc(4); fill_prefetch_0 (); return 24; } unsigned long REGPARAM2 CPUFUNC(op_1d0_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1d8_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1e0_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,dst); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1e8_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1f0_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1f8_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1f9_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_1fa_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 2; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_getpc () + 2; dsta += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1fb_5)(uae_u32 opcode) /* BSET */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = 3; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr tmppc = m68k_getpc() + 2; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_200_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_210_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_218_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_220_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_228_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_230_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_238_5)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_239_5)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_23c_5)(uae_u32 opcode) /* ANDSR */ { OpcodeFamily = 5; CurrentInstrCycles = 20; { MakeSR(); { uae_s16 src = get_iword_prefetch(2); src |= 0xFF00; regs.sr &= src; MakeFromSR(); }}m68k_incpc(4); fill_prefetch_0 (); return 20; } unsigned long REGPARAM2 CPUFUNC(op_240_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_250_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2236; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2236: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_258_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2237; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2237: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_260_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2238; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2238: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_268_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2239; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2239: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_270_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2240; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2240: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_278_5)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2241; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2241: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_279_5)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2242; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2242: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_27c_5)(uae_u32 opcode) /* ANDSR */ { OpcodeFamily = 5; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2243; } { MakeSR(); { uae_s16 src = get_iword_prefetch(2); regs.sr &= src; MakeFromSR(); }}}m68k_incpc(4); fill_prefetch_0 (); endlabel2243: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_280_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_290_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2245; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2245: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_298_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2246; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2246: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_2a0_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2247; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2247: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_2a8_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2248; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2248: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_2b0_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2249; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2249: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_2b8_5)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2250; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2250: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_2b9_5)(uae_u32 opcode) /* AND */ { OpcodeFamily = 2; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2251; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2251: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_400_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_410_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_418_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_420_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_428_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_430_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_438_5)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_439_5)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_440_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_450_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2261; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2261: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_458_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2262; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2262: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_460_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2263; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2263: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_468_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2264; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2264: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_470_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2265; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2265: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_478_5)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2266; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2266: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_479_5)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2267; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2267: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_480_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_490_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2269; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2269: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_498_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2270; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2270: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_4a0_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2271; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2271: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_4a8_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2272; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2272: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_4b0_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2273; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2273: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_4b8_5)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2274; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2274: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_4b9_5)(uae_u32 opcode) /* SUB */ { OpcodeFamily = 7; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2275; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2275: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_600_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_610_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_618_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_620_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_628_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_630_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_638_5)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_639_5)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_640_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_650_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2285; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2285: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_658_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2286; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2286: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_660_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2287; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2287: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_668_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2288; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2288: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_670_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2289; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2289: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_678_5)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2290; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2290: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_679_5)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2291; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2291: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_680_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_690_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2293; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2293: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_698_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2294; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2294: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_6a0_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2295; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2295: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_6a8_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2296; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2296: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_6b0_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2297; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2297: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_6b8_5)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2298; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2298: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_6b9_5)(uae_u32 opcode) /* ADD */ { OpcodeFamily = 11; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2299; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2299: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_800_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 10; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(4); fill_prefetch_0 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_810_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_818_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_820_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 14; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_828_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_830_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 21; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); fill_prefetch_0 (); return 18; } unsigned long REGPARAM2 CPUFUNC(op_838_5)(uae_u32 opcode) /* BTST */ { OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_839_5)(uae_u32 opcode) /* BTST */ { OpcodeFamily = 21; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(8); fill_prefetch_0 (); return 20; } unsigned long REGPARAM2 CPUFUNC(op_83a_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = 2; OpcodeFamily = 21; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_83b_5)(uae_u32 opcode) /* BTST */ { uae_u32 dstreg = 3; OpcodeFamily = 21; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}}m68k_incpc(6); fill_prefetch_0 (); return 18; } unsigned long REGPARAM2 CPUFUNC(op_83c_5)(uae_u32 opcode) /* BTST */ { OpcodeFamily = 21; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uae_s8 dst = get_ibyte_prefetch(4); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); }}}m68k_incpc(6); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_840_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_850_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_858_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_860_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_868_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_870_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 22; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_878_5)(uae_u32 opcode) /* BCHG */ { OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_879_5)(uae_u32 opcode) /* BCHG */ { OpcodeFamily = 22; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_87a_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = 2; OpcodeFamily = 22; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_87b_5)(uae_u32 opcode) /* BCHG */ { uae_u32 dstreg = 3; OpcodeFamily = 22; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; dst ^= (1 << src); SET_ZFLG (((uae_u32)dst & (1 << src)) >> src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_880_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 14; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_dreg(regs, dstreg) = (dst); if ( src < 16 ) { m68k_incpc(4); return 12; } }}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_890_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_898_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_8a0_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_8a8_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8b0_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 23; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_8b8_5)(uae_u32 opcode) /* BCLR */ { OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8b9_5)(uae_u32 opcode) /* BCLR */ { OpcodeFamily = 23; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_8ba_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = 2; OpcodeFamily = 23; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8bb_5)(uae_u32 opcode) /* BCLR */ { uae_u32 dstreg = 3; OpcodeFamily = 23; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst &= ~(1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_8c0_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= 31; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_dreg(regs, dstreg) = (dst); }}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8d0_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_8d8_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_8e0_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_8e8_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8f0_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 24; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_8f8_5)(uae_u32 opcode) /* BSET */ { OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8f9_5)(uae_u32 opcode) /* BSET */ { OpcodeFamily = 24; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_8fa_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = 2; OpcodeFamily = 24; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8fb_5)(uae_u32 opcode) /* BSET */ { uae_u32 dstreg = 3; OpcodeFamily = 24; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= 7; SET_ZFLG (1 ^ ((dst >> src) & 1)); dst |= (1 << src); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,dst); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_a00_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_a10_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_a18_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_a20_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_a28_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_a30_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_a38_5)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_a39_5)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_a3c_5)(uae_u32 opcode) /* EORSR */ { OpcodeFamily = 6; CurrentInstrCycles = 20; { MakeSR(); { uae_s16 src = get_iword_prefetch(2); src &= 0xFF; regs.sr ^= src; MakeFromSR(); }}m68k_incpc(4); fill_prefetch_0 (); return 20; } unsigned long REGPARAM2 CPUFUNC(op_a40_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_a50_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2351; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2351: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_a58_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2352; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2352: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_a60_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2353; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2353: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_a68_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2354; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2354: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_a70_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2355; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2355: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_a78_5)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2356; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2356: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_a79_5)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2357; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel2357: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_a7c_5)(uae_u32 opcode) /* EORSR */ { OpcodeFamily = 6; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2358; } { MakeSR(); { uae_s16 src = get_iword_prefetch(2); regs.sr ^= src; MakeFromSR(); }}}m68k_incpc(4); fill_prefetch_0 (); endlabel2358: ; return 20; } #endif #ifdef PART_2 unsigned long REGPARAM2 CPUFUNC(op_a80_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_a90_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2360; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2360: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_a98_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2361; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2361: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_aa0_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 30; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2362; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2362: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_aa8_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2363; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2363: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_ab0_5)(uae_u32 opcode) /* EOR */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 34; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2364; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2364: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_ab8_5)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 32; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2365; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2365: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_ab9_5)(uae_u32 opcode) /* EOR */ { OpcodeFamily = 3; CurrentInstrCycles = 36; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2366; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel2366: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_c00_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c10_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c18_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c20_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c28_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c30_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c38_5)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c39_5)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(8); fill_prefetch_0 (); return 20; } unsigned long REGPARAM2 CPUFUNC(op_c3a_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 2; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword_prefetch(4); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c3b_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 18; } unsigned long REGPARAM2 CPUFUNC(op_c40_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c50_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2378; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2378: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c58_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2379; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2379: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c60_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2380; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2380: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_c68_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2381; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2381: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c70_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2382; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2382: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_c78_5)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2383; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2383: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c79_5)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2384; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2384: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c7a_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 2; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_getpc () + 4; dsta += (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2385; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2385: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c7b_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr tmppc = m68k_getpc() + 4; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2386; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2386: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_c80_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c90_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2388; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2388: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c98_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2389; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2389: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_ca0_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 22; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2390; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2390: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_ca8_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2391; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2391: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_cb0_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = opcode & 7; OpcodeFamily = 25; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2392; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2392: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_cb8_5)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2393; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2393: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_cb9_5)(uae_u32 opcode) /* CMP */ { OpcodeFamily = 25; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2394; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(10); fill_prefetch_0 (); endlabel2394: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_cba_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 2; OpcodeFamily = 25; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_getpc () + 6; dsta += (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2395; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2395: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_cbb_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = 3; OpcodeFamily = 25; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr tmppc = m68k_getpc() + 6; uaecptr dsta = get_disp_ea_000(tmppc, get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2396; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2396: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_1000_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_1008_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_areg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_1010_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1018_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1020_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_1028_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1030_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_1038_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_1039_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_103a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_103b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_103c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_1080_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_1088_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_1090_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1098_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_10a0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_10a8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_10b0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10b8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_10b9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_10ba_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_10bb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10bc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_10c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_10c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_10d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_10d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_10e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_10e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_10f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10f8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_10f9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_10fa_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_10fb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_10fc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1100_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_1108_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}return 8; } unsigned long REGPARAM2 CPUFUNC(op_1110_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1118_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1120_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1128_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1130_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1138_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1139_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_113a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_113b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_113c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1140_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1148_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_1150_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1158_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1160_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1168_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_1170_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_1178_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_1179_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_117a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_117b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_117c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_1180_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1188_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_1190_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_1198_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_11a0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_11a8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11b0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_11b8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11b9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_11ba_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11bb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_11bc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_11c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_11c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_11d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_11d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_11e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_11e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_11f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11f8_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_11f9_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_11fa_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_11fb_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_11fc_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_13c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_13c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_13d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_13d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = get_ilong_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_13e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_ilong_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_13e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_13f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_13f8_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_13f9_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(6); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 28; } unsigned long REGPARAM2 CPUFUNC(op_13fa_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 24; } unsigned long REGPARAM2 CPUFUNC(op_13fb_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uaecptr dsta = get_ilong_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 26; } unsigned long REGPARAM2 CPUFUNC(op_13fc_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s8 src = get_ibyte_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_byte(dsta,src); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_2000_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2008_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_areg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2010_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2495; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2495: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2018_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2496; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2496: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2020_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2497; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2497: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_2028_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2498; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2498: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2030_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2499; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2499: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_2038_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2500; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2500: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2039_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2501; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2501: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_203a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2502; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2502: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_203b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2503; } {{ uae_s32 src = get_long(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2503: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_203c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong_prefetch(2); { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2040_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2048_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_2050_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2507; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2507: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2058_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2508; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2508: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2060_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2509; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2509: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_2068_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2510; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2510: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2070_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2511; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2511: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_2078_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2512; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2512: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2079_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2513; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2513: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_207a_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2514; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2514: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_207b_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2515; } {{ uae_s32 src = get_long(srca); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2515: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_207c_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong_prefetch(2); { uae_u32 val = src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(6); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_2080_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2517; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}endlabel2517: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2088_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2518; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}endlabel2518: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2090_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2519; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2519; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2519: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_2098_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2520; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2520; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2520: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_20a0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2521; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2521; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2521: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_20a8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2522; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2522; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2522: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_20b0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2523; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2523; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2523: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_20b8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2524; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2524; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2524: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_20b9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2525; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2525; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2525: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_20ba_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2526; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2526; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2526: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_20bb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2527; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2527; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2527: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_20bc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2528; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2528: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_20c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2529; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}endlabel2529: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_20c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2530; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}endlabel2530: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_20d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2531; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2531; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2531: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_20d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2532; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2532; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2532: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_20e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2533; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2533; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2533: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_20e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2534; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2534; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2534: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_20f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2535; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2535; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2535: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_20f8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2536; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2536; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2536: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_20f9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2537; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2537; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2537: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_20fa_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2538; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2538; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2538: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_20fb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2539; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2539; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2539: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_20fc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2540; } { m68k_areg(regs, dstreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2540: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_2100_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2541; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}endlabel2541: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2108_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2542; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}endlabel2542: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_2110_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2543; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2543; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2543: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_2118_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2544; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2544; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2544: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_2120_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2545; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2545; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}}endlabel2545: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_2128_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2546; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2546; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2546: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_2130_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2547; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2547; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2547: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_2138_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2548; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2548; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2548: ; return 24; } #endif #ifdef PART_3 unsigned long REGPARAM2 CPUFUNC(op_2139_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2549; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2549; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2549: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_213a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2550; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2550; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2550: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_213b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2551; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2551; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2551: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_213c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2552; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2552: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_2140_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2553; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2553: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2148_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2554; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2554: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_2150_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2555; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2555; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2555: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_2158_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2556; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2556; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2556: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_2160_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2557; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2557; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2557: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_2168_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2558; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2558; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2558: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_2170_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2559; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2559; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2559: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_2178_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2560; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2560; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2560: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_2179_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2561; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2561; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2561: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_217a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2562; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2562; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2562: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_217b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2563; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2563; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2563: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_217c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2564; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2564: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_2180_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2565; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2565: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_2188_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2566; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2566: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_2190_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2567; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2567; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2567: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_2198_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2568; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2568; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2568: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_21a0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2569; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2569; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2569: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_21a8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2570; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2570; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2570: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_21b0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2571; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2571; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2571: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_21b8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2572; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2572; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2572: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_21b9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2573; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2573; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2573: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_21ba_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2574; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2574; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2574: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_21bb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2575; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2575; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2575: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_21bc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2576; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2576: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_21c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2577; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2577: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_21c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2578; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2578: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_21d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2579; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2579; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2579: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_21d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2580; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2580; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2580: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_21e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2581; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2581; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2581: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_21e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2582; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2582; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2582: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_21f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2583; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2583; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2583: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_21f8_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2584; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2584; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2584: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_21f9_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2585; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2585; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2585: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_21fa_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2586; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2586; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2586: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_21fb_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2587; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2587; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2587: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_21fc_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2588; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2588: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_23c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2589; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2589: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_23c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2590; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2590: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_23d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2591; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2591; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2591: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_23d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2592; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2592; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2592: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_23e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2593; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2593; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2593: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_23e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2594; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2594; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2594: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_23f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2595; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2595; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2595: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_23f8_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2596; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2596; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2596: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_23f9_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 36; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2597; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2597; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2597: ; return 36; } unsigned long REGPARAM2 CPUFUNC(op_23fa_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 32; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2598; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2598; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2598: ; return 32; } unsigned long REGPARAM2 CPUFUNC(op_23fb_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 34; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2599; } {{ uae_s32 src = get_long(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2599; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_long(dsta,src); }}}}}}endlabel2599: ; return 34; } unsigned long REGPARAM2 CPUFUNC(op_23fc_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uae_s32 src = get_ilong_prefetch(2); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2600; } { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_long(dsta,src); }}}}endlabel2600: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_3000_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3008_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3010_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2603; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2603: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3018_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2604; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2604: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3020_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2605; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2605: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_3028_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2606; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2606: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3030_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2607; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2607: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_3038_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2608; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2608: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3039_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2609; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2609: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_303a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2610; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2610: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_303b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2611; } {{ uae_s16 src = get_word(srca); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2611: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_303c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3040_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3048_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_3050_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2615; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2615: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3058_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2616; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2616: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3060_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2617; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2617: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_3068_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2618; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2618: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3070_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2619; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2619: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_3078_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2620; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2620: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3079_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2621; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2621: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_307a_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2622; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2622: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_307b_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2623; } {{ uae_s16 src = get_word(srca); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2623: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_307c_5)(uae_u32 opcode) /* MOVEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 31; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_u32 val = (uae_s32)(uae_s16)src; m68k_areg(regs, dstreg) = (val); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_3080_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2625; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}endlabel2625: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3088_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2626; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}endlabel2626: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3090_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2627; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2627; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2627: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3098_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2628; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2628; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2628: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_30a0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2629; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2629; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2629: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_30a8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2630; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2630; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2630: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_30b0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2631; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2631; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2631: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_30b8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2632; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2632; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2632: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_30b9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2633; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2633; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2633: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_30ba_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2634; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2634; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2634: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_30bb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2635; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2635; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2635: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_30bc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2636; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2636: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_30c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2637; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}endlabel2637: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_30c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2638; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}endlabel2638: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_30d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2639; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2639; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2639: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_30d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2640; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2640; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2640: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_30e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2641; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2641; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2641: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_30e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2642; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2642; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2642: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_30f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2643; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2643; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2643: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_30f8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2644; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2644; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2644: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_30f9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2645; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2645; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2645: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_30fa_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2646; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2646; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2646: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_30fb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2647; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2647; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2647: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_30fc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2648; } { m68k_areg(regs, dstreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2648: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3100_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2649; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}endlabel2649: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3108_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2650; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}endlabel2650: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_3110_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2651; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2651; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2651: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3118_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2652; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2652; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2652: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3120_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2653; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2653; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}}endlabel2653: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_3128_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2654; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2654; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2654: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_3130_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2655; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2655; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2655: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_3138_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2656; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2656; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2656: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_3139_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2657; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2657; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2657: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_313a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2658; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2658; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2658: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_313b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2659; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2659; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2659: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_313c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2660; } { m68k_areg (regs, dstreg) = dsta; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2660: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3140_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2661; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2661: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3148_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2662; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2662: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_3150_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2663; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2663; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2663: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_3158_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2664; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2664; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2664: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_3160_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2665; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2665; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2665: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_3168_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2666; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2666; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2666: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_3170_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2667; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2667; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2667: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_3178_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2668; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2668; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2668: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_3179_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2669; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2669; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2669: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_317a_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2670; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2670; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2670: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_317b_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2671; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2671; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2671: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_317c_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2672; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2672: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_3180_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2673; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2673: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_3188_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2674; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2674: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_3190_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2675; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2675; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2675: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_3198_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2676; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2676; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2676: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_31a0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2677; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2677; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2677: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_31a8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2678; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2678; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2678: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_31b0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2679; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2679; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2679: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_31b8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2680; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2680; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2680: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_31b9_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2681; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(6)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2681; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2681: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_31ba_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2682; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2682; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2682: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_31bb_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2683; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2683; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2683: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_31bc_5)(uae_u32 opcode) /* MOVE */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2684; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2684: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_31c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2685; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2685: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_31c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2686; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2686: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_31d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2687; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2687; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2687: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_31d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2688; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2688; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2688: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_31e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2689; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2689; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2689: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_31e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2690; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2690; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2690: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_31f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2691; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2691; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2691: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_31f8_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2692; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2692; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2692: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_31f9_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2693; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2693; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2693: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_31fa_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2694; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2694; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2694: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_31fb_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2695; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2695; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2695: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_31fc_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2696; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2696: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_33c0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2697; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2697: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_33c8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_areg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2698; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2698: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_33d0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2699; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2699; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2699: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_33d8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2700; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2700; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2700: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_33e0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2701; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2701; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2701: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_33e8_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2702; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2702; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2702: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_33f0_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2703; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2703; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2703: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_33f8_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2704; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2704; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2704: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_33f9_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2705; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(6); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 10; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2705; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(10); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2705: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_33fa_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2706; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2706; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2706: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_33fb_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 26; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2707; } {{ uae_s16 src = get_word(srca); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2707; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}}}endlabel2707: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_33fc_5)(uae_u32 opcode) /* MOVE */ { OpcodeFamily = 30; CurrentInstrCycles = 20; {{ uae_s16 src = get_iword_prefetch(2); { uaecptr dsta = get_ilong_prefetch(4); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2708; } { CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(8); fill_prefetch_0 (); put_word(dsta,src); }}}}endlabel2708: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4000_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4010_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,newv); }}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4018_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,newv); }}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4020_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,newv); }}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4028_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,newv); }}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4030_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,newv); }}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4038_5)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,newv); }}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4039_5)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,newv); }}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4040_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((newv) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4050_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2718; } {{ uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,newv); }}}}}}endlabel2718: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4058_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2719; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,newv); }}}}}}endlabel2719: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4060_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2720; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,newv); }}}}}}endlabel2720: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4068_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2721; } {{ uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,newv); }}}}}}endlabel2721: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4070_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2722; } {{ uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,newv); }}}}}}endlabel2722: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4078_5)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2723; } {{ uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,newv); }}}}}}endlabel2723: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4079_5)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2724; } {{ uae_s16 src = get_word(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(srca,newv); }}}}}}endlabel2724: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4080_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, srcreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4090_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2726; } {{ uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,newv); }}}}}}endlabel2726: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4098_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2727; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,newv); }}}}}}endlabel2727: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_40a0_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2728; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,newv); }}}}}}endlabel2728: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_40a8_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2729; } {{ uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,newv); }}}}}}endlabel2729: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_40b0_5)(uae_u32 opcode) /* NEGX */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 16; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2730; } {{ uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,newv); }}}}}}endlabel2730: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_40b8_5)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2731; } {{ uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,newv); }}}}}}endlabel2731: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_40b9_5)(uae_u32 opcode) /* NEGX */ { OpcodeFamily = 16; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2732; } {{ uae_s32 src = get_long(srca); { uae_u32 newv = 0 - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(srca,newv); }}}}}}endlabel2732: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_40c0_5)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 6; {{ MakeSR(); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((regs.sr) & 0xffff); }}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_40d0_5)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2734; } { MakeSR(); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,regs.sr); }}}endlabel2734: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_40d8_5)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2735; } { m68k_areg(regs, srcreg) += 2; MakeSR(); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,regs.sr); }}}endlabel2735: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_40e0_5)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2736; } { m68k_areg (regs, srcreg) = srca; MakeSR(); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,regs.sr); }}}endlabel2736: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_40e8_5)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2737; } { MakeSR(); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,regs.sr); }}}endlabel2737: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_40f0_5)(uae_u32 opcode) /* MVSR2 */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 32; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2738; } { MakeSR(); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,regs.sr); }}}endlabel2738: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_40f8_5)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2739; } { MakeSR(); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,regs.sr); }}}endlabel2739: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_40f9_5)(uae_u32 opcode) /* MVSR2 */ { OpcodeFamily = 32; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2740; } { MakeSR(); m68k_incpc(6); fill_prefetch_0 (); put_word(srca,regs.sr); }}}endlabel2740: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4180_5)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2741; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2741; } }}}endlabel2741: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_4190_5)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2742; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2742; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2742; } }}}}}endlabel2742: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4198_5)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2743; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2743; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2743; } }}}}}endlabel2743: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_41a0_5)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2744; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2744; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2744; } }}}}}endlabel2744: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_41a8_5)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2745; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2745; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2745; } }}}}}endlabel2745: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41b0_5)(uae_u32 opcode) /* CHK */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2746; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2746; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2746; } }}}}}endlabel2746: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_41b8_5)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2747; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2747; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2747; } }}}}}endlabel2747: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41b9_5)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 22; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2748; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2748; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2748; } }}}}}endlabel2748: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_41ba_5)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 18; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2749; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2749; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2749; } }}}}}endlabel2749: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_41bb_5)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 20; { uaecptr oldpc = m68k_getpc(); { uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2750; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2750; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2750; } }}}}}endlabel2750: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_41bc_5)(uae_u32 opcode) /* CHK */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 80; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if ((uae_s32)dst < 0) { SET_NFLG (1); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2751; } else if (dst > src) { SET_NFLG (0); Exception(6,oldpc,M68000_EXC_SRC_CPU); goto endlabel2751; } }}}endlabel2751: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_41d0_5)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 4; {{ uaecptr srca = m68k_areg(regs, srcreg); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_41e8_5)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_41f0_5)(uae_u32 opcode) /* LEA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_41f8_5)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 8; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_41f9_5)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 12; {{ uaecptr srca = get_ilong_prefetch(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(6); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_41fa_5)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_41fb_5)(uae_u32 opcode) /* LEA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 56; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { m68k_areg(regs, dstreg) = (srca); }}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4200_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 4; {{ CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((0) & 0xff); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4210_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,0); }}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4218_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,0); }}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4220_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,0); }}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4228_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,0); }}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4230_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,0); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4238_5)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,0); }}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4239_5)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(0)) == 0); SET_NFLG (((uae_s8)(0)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,0); }}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4240_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 4; {{ CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((0) & 0xffff); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4250_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2768; } { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,0); }}}endlabel2768: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4258_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2769; } { m68k_areg(regs, srcreg) += 2; uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,0); }}}endlabel2769: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4260_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2770; } { m68k_areg (regs, srcreg) = srca; uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,0); }}}endlabel2770: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4268_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2771; } { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,0); }}}endlabel2771: ; return 16; } #endif #ifdef PART_4 unsigned long REGPARAM2 CPUFUNC(op_4270_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2772; } { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,0); }}}endlabel2772: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4278_5)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2773; } { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,0); }}}endlabel2773: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4279_5)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2774; } { uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(0)) == 0); SET_NFLG (((uae_s16)(0)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(srca,0); }}}endlabel2774: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4280_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 6; {{ CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_dreg(regs, srcreg) = (0); }}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4290_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2776; } { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,0); }}}endlabel2776: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4298_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2777; } { m68k_areg(regs, srcreg) += 4; uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,0); }}}endlabel2777: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_42a0_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2778; } { m68k_areg (regs, srcreg) = srca; uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,0); }}}endlabel2778: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_42a8_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2779; } { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,0); }}}endlabel2779: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_42b0_5)(uae_u32 opcode) /* CLR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 18; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2780; } { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,0); }}}endlabel2780: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_42b8_5)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2781; } { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,0); }}}endlabel2781: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_42b9_5)(uae_u32 opcode) /* CLR */ { OpcodeFamily = 18; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2782; } { uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(0)) == 0); SET_NFLG (((uae_s32)(0)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(srca,0); }}}endlabel2782: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_4400_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4410_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,dst); }}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4418_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,dst); }}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4420_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,dst); }}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4428_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,dst); }}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4430_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,dst); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4438_5)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,dst); }}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4439_5)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); {{uae_u32 dst = ((uae_s8)(0)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(0)) < 0; int flgn = ((uae_s8)(dst)) < 0; SET_ZFLG (((uae_s8)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,dst); }}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4440_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4450_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2792; } {{ uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,dst); }}}}}}}endlabel2792: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4458_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2793; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,dst); }}}}}}}endlabel2793: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4460_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2794; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,dst); }}}}}}}endlabel2794: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4468_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2795; } {{ uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,dst); }}}}}}}endlabel2795: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4470_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2796; } {{ uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,dst); }}}}}}}endlabel2796: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4478_5)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2797; } {{ uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,dst); }}}}}}}endlabel2797: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4479_5)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2798; } {{ uae_s16 src = get_word(srca); {{uae_u32 dst = ((uae_s16)(0)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(0)) < 0; int flgn = ((uae_s16)(dst)) < 0; SET_ZFLG (((uae_s16)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(srca,dst); }}}}}}}endlabel2798: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4480_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, srcreg) = (dst); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4490_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2800; } {{ uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,dst); }}}}}}}endlabel2800: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4498_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2801; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,dst); }}}}}}}endlabel2801: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_44a0_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2802; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,dst); }}}}}}}endlabel2802: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_44a8_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2803; } {{ uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,dst); }}}}}}}endlabel2803: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_44b0_5)(uae_u32 opcode) /* NEG */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 15; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2804; } {{ uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,dst); }}}}}}}endlabel2804: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_44b8_5)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2805; } {{ uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,dst); }}}}}}}endlabel2805: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_44b9_5)(uae_u32 opcode) /* NEG */ { OpcodeFamily = 15; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2806; } {{ uae_s32 src = get_long(srca); {{uae_u32 dst = ((uae_s32)(0)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(0)) < 0; int flgn = ((uae_s32)(dst)) < 0; SET_ZFLG (((uae_s32)(dst)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(0))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(srca,dst); }}}}}}}endlabel2806: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_44c0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}m68k_incpc(2); fill_prefetch_2 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_44d0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2808; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2808: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_44d8_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2809; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2809: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_44e0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2810; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2810: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_44e8_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2811; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2811: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_44f0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2812; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2812: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_44f8_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2813; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2813: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_44f9_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 24; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2814; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2814: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_44fa_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2815; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2815: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_44fb_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2816; } {{ uae_s16 src = get_word(srca); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2816: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_44fc_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 16; {{ uae_s16 src = get_iword_prefetch(2); MakeSR(); regs.sr &= 0xFF00; regs.sr |= src & 0xFF; MakeFromSR(); }}m68k_incpc(4); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4600_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((dst) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4610_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4618_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,dst); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4620_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,dst); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4628_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4630_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,dst); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4638_5)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,dst); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4639_5)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s8)(dst)) == 0); SET_NFLG (((uae_s8)(dst)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,dst); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4640_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4650_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2827; } {{ uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,dst); }}}}}endlabel2827: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4658_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2828; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,dst); }}}}}endlabel2828: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4660_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2829; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(srca,dst); }}}}}endlabel2829: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4668_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2830; } {{ uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,dst); }}}}}endlabel2830: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4670_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2831; } {{ uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,dst); }}}}}endlabel2831: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4678_5)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2832; } {{ uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(srca,dst); }}}}}endlabel2832: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4679_5)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2833; } {{ uae_s16 src = get_word(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(srca,dst); }}}}}endlabel2833: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4680_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4690_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2835; } {{ uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,dst); }}}}}endlabel2835: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4698_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2836; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,dst); }}}}}endlabel2836: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46a0_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 22; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2837; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(srca,dst); }}}}}endlabel2837: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_46a8_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 24; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2838; } {{ uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,dst); }}}}}endlabel2838: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_46b0_5)(uae_u32 opcode) /* NOT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 19; CurrentInstrCycles = 26; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2839; } {{ uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,dst); }}}}}endlabel2839: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_46b8_5)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 24; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2840; } {{ uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(srca,dst); }}}}}endlabel2840: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_46b9_5)(uae_u32 opcode) /* NOT */ { OpcodeFamily = 19; CurrentInstrCycles = 28; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2841; } {{ uae_s32 src = get_long(srca); { uae_u32 dst = ~src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(srca,dst); }}}}}endlabel2841: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_46c0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 12; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2842; } {{ uae_s16 src = m68k_dreg(regs, srcreg); regs.sr = src; MakeFromSR(); }}}m68k_incpc(2); fill_prefetch_2 (); endlabel2842: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_46d0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2843; } {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2843; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2843: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_46d8_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2844; } {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2844; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2844: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_46e0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 18; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2845; } {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2845; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2845: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_46e8_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2846; } {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2846; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2846: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46f0_5)(uae_u32 opcode) /* MV2SR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 33; CurrentInstrCycles = 22; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2847; } {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2847; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2847: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_46f8_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2848; } {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2848; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2848: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46f9_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 24; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2849; } {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2849; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2849: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_46fa_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2850; } {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2850; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2850: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_46fb_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 22; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2851; } {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2851; } {{ uae_s16 src = get_word(srca); regs.sr = src; MakeFromSR(); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2851: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_46fc_5)(uae_u32 opcode) /* MV2SR */ { OpcodeFamily = 33; CurrentInstrCycles = 16; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2852; } {{ uae_s16 src = get_iword_prefetch(2); regs.sr = src; MakeFromSR(); }}}m68k_incpc(4); fill_prefetch_0 (); endlabel2852: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4800_5)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 6; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((newv) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_4810_5)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,newv); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4818_5)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,newv); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4820_5)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,newv); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4828_5)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,newv); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4830_5)(uae_u32 opcode) /* NBCD */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 17; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,newv); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4838_5)(uae_u32 opcode) /* NBCD */ { OpcodeFamily = 17; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,newv); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4839_5)(uae_u32 opcode) /* NBCD */ { OpcodeFamily = 17; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_u16 newv_lo = - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = - (src & 0xF0); uae_u16 newv; int cflg; if (newv_lo > 9) { newv_lo -= 6; } newv = newv_hi + newv_lo; cflg = (newv & 0x1F0) > 0x90; if (cflg) newv -= 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,newv); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4840_5)(uae_u32 opcode) /* SWAP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 34; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16); CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4850_5)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2862; } { m68k_areg (regs, 7) = dsta; m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,srca); }}}}endlabel2862: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4868_5)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2863; } { m68k_areg (regs, 7) = dsta; m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,srca); }}}}endlabel2863: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4870_5)(uae_u32 opcode) /* PEA */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 57; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2864; } { m68k_areg (regs, 7) = dsta; m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,srca); }}}}endlabel2864: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_4878_5)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2865; } { m68k_areg (regs, 7) = dsta; m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,srca); }}}}endlabel2865: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4879_5)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2866; } { m68k_areg (regs, 7) = dsta; m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,srca); }}}}endlabel2866: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_487a_5)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2867; } { m68k_areg (regs, 7) = dsta; m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,srca); }}}}endlabel2867: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_487b_5)(uae_u32 opcode) /* PEA */ { OpcodeFamily = 57; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uaecptr dsta = m68k_areg(regs, 7) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2868; } { m68k_areg (regs, 7) = dsta; m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,srca); }}}}endlabel2868: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_4880_5)(uae_u32 opcode) /* EXT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 36; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u16 dst = (uae_s16)(uae_s8)src; CLEAR_CZNV; SET_ZFLG (((uae_s16)(dst)) == 0); SET_NFLG (((uae_s16)(dst)) < 0); m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | ((dst) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4890_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2870; } {m68k_incpc(4); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}endlabel2870: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48a0_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) - 0; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2871; } {m68k_incpc(4); fill_prefetch_0 (); { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; while (amask) { srca -= 2; put_word(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=4; } while (dmask) { srca -= 2; put_word(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=4; } m68k_areg(regs, dstreg) = srca; }}}}endlabel2871: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48a8_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2872; } {m68k_incpc(6); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}endlabel2872: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48b0_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 14; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2873; } {m68k_incpc(6); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}endlabel2873: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48b8_5)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2874; } {m68k_incpc(6); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}endlabel2874: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48b9_5)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = get_ilong_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2875; } {m68k_incpc(8); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_word(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { put_word(srca, m68k_areg(regs, movem_index1[amask])); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}endlabel2875: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48c0_5)(uae_u32 opcode) /* EXT */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 36; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_u32 dst = (uae_s32)(uae_s16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(dst)) == 0); SET_NFLG (((uae_s32)(dst)) < 0); m68k_dreg(regs, srcreg) = (dst); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_48d0_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2877; } {m68k_incpc(4); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}endlabel2877: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48e0_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 8; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) - 0; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2878; } {m68k_incpc(4); fill_prefetch_0 (); { uae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff; while (amask) { srca -= 4; put_long(srca, m68k_areg(regs, movem_index2[amask])); amask = movem_next[amask]; retcycles+=8; } while (dmask) { srca -= 4; put_long(srca, m68k_dreg(regs, movem_index2[dmask])); dmask = movem_next[dmask]; retcycles+=8; } m68k_areg(regs, dstreg) = srca; }}}}endlabel2878: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48e8_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2879; } {m68k_incpc(6); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}endlabel2879: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f0_5)(uae_u32 opcode) /* MVMLE */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 14; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2880; } {m68k_incpc(6); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}endlabel2880: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f8_5)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2881; } {m68k_incpc(6); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}endlabel2881: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_48f9_5)(uae_u32 opcode) /* MVMLE */ { unsigned int retcycles = 0; OpcodeFamily = 38; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); retcycles = 0; { uaecptr srca = get_ilong_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2882; } {m68k_incpc(8); fill_prefetch_0 (); { uae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff; while (dmask) { put_long(srca, m68k_dreg(regs, movem_index1[dmask])); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { put_long(srca, m68k_areg(regs, movem_index1[amask])); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}endlabel2882: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4a00_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a10_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a18_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a20_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_4a28_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a30_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a38_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a39_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_4a3a_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a3b_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a3c_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); }}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a40_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a48_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a50_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2896; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2896: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a58_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2897; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2897: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a60_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2898; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2898: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_4a68_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2899; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2899: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a70_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2900; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2900: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a78_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2901; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2901: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a79_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2902; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2902: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4a7a_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2903; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2903: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a7b_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2904; } {{ uae_s16 src = get_word(srca); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2904: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4a7c_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); }}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_4a80_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a88_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 4; {{ uae_s32 src = m68k_areg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4a90_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2908; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2908: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4a98_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2909; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2909: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4aa0_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2910; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2910: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_4aa8_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2911; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2911: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ab0_5)(uae_u32 opcode) /* TST */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 20; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2912; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2912: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4ab8_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2913; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2913: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ab9_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2914; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2914: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4aba_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2915; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2915: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4abb_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2916; } {{ uae_s32 src = get_long(srca); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2916: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4abc_5)(uae_u32 opcode) /* TST */ { OpcodeFamily = 20; CurrentInstrCycles = 12; {{ uae_s32 src = get_ilong_prefetch(2); CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); }}m68k_incpc(6); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_4ac0_5)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((src) & 0xff); }}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4ad0_5)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,src); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ad8_5)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,src); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ae0_5)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,src); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ae8_5)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,src); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4af0_5)(uae_u32 opcode) /* TAS */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 98; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,src); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4af8_5)(uae_u32 opcode) /* TAS */ { OpcodeFamily = 98; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,src); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4af9_5)(uae_u32 opcode) /* TAS */ { OpcodeFamily = 98; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); src |= 0x80; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,src); }}}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4c90_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2926; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2926: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4c98_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2927; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } m68k_areg(regs, dstreg) = srca; }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2927: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4ca8_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2928; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2928: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cb0_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2929; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2929: ; return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cb8_5)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2930; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2930: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cb9_5)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 20; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_ilong_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2931; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2931: ; return (20+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cba_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 2; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2932; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2932: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cbb_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 3; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr tmppc = m68k_getpc() + 4; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2933; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; dmask = movem_next[dmask]; retcycles+=4; } while (amask) { m68k_areg(regs, movem_index1[amask]) = (uae_s32)(uae_s16)get_word(srca); srca += 2; amask = movem_next[amask]; retcycles+=4; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2933: ; return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cd0_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2934; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2934: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cd8_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 12; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2935; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } m68k_areg(regs, dstreg) = srca; }}}}m68k_incpc(4); fill_prefetch_0 (); endlabel2935: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4ce8_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2936; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2936: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf0_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(4)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2937; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2937: ; return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf8_5)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2938; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2938: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cf9_5)(uae_u32 opcode) /* MVMEL */ { unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 20; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = get_ilong_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 8; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2939; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(8); fill_prefetch_0 (); endlabel2939: ; return (20+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cfa_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 2; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 16; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr srca = m68k_getpc () + 4; srca += (uae_s32)(uae_s16)get_iword_prefetch(4); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2940; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2940: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4cfb_5)(uae_u32 opcode) /* MVMEL */ { uae_u32 dstreg = 3; unsigned int retcycles = 0; OpcodeFamily = 37; CurrentInstrCycles = 18; { uae_u16 mask = get_iword_prefetch(2); unsigned int dmask = mask & 0xff, amask = (mask >> 8) & 0xff; retcycles = 0; { uaecptr tmppc = m68k_getpc() + 4; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(4)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2941; } {{ while (dmask) { m68k_dreg(regs, movem_index1[dmask]) = get_long(srca); srca += 4; dmask = movem_next[dmask]; retcycles+=8; } while (amask) { m68k_areg(regs, movem_index1[amask]) = get_long(srca); srca += 4; amask = movem_next[amask]; retcycles+=8; } }}}}m68k_incpc(6); fill_prefetch_0 (); endlabel2941: ; return (18+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_4e40_5)(uae_u32 opcode) /* TRAP */ { uae_u32 srcreg = (opcode & 15); OpcodeFamily = 39; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; m68k_incpc(2); fill_prefetch_2 (); Exception(src+32,0,M68000_EXC_SRC_CPU); }}return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e50_5)(uae_u32 opcode) /* LINK */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 47; CurrentInstrCycles = 18; {{ uaecptr olda = m68k_areg(regs, 7) - 4; if ((olda & 1) != 0) { last_fault_for_exception_3 = olda; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2943; } { m68k_areg (regs, 7) = olda; { uae_s32 src = m68k_areg(regs, srcreg); m68k_incpc(2); fill_prefetch_2 (); put_long(olda,src); m68k_areg(regs, srcreg) = (m68k_areg(regs, 7)); { uae_s16 offs = get_iword_prefetch(0); m68k_areg(regs, 7) += offs; }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2943: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_4e58_5)(uae_u32 opcode) /* UNLK */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 48; CurrentInstrCycles = 12; {{ uae_s32 src = m68k_areg(regs, srcreg); m68k_areg(regs, 7) = src; { uaecptr olda = m68k_areg(regs, 7); if ((olda & 1) != 0) { last_fault_for_exception_3 = olda; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2944; } {{ uae_s32 old = get_long(olda); m68k_areg(regs, 7) += 4; m68k_areg(regs, srcreg) = (old); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel2944: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_4e60_5)(uae_u32 opcode) /* MVR2USP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 40; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2945; } {{ uae_s32 src = m68k_areg(regs, srcreg); regs.usp = src; }}}m68k_incpc(2); fill_prefetch_2 (); endlabel2945: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e68_5)(uae_u32 opcode) /* MVUSP2R */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 41; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2946; } {{ m68k_areg(regs, srcreg) = (regs.usp); }}}m68k_incpc(2); fill_prefetch_2 (); endlabel2946: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e70_5)(uae_u32 opcode) /* RESET */ { OpcodeFamily = 42; CurrentInstrCycles = 132; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2947; } { customreset(); }}m68k_incpc(2); fill_prefetch_2 (); endlabel2947: ; return 132; } unsigned long REGPARAM2 CPUFUNC(op_4e71_5)(uae_u32 opcode) /* NOP */ { OpcodeFamily = 43; CurrentInstrCycles = 4; {}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e72_5)(uae_u32 opcode) /* STOP */ { OpcodeFamily = 44; CurrentInstrCycles = 4; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2949; } {{ uae_s16 src = get_iword_prefetch(2); regs.sr = src; MakeFromSR(); m68k_setstopped(1); }}}m68k_incpc(4); fill_prefetch_0 (); endlabel2949: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e73_5)(uae_u32 opcode) /* RTE */ { OpcodeFamily = 45; CurrentInstrCycles = 20; {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel2950; } {{ uaecptr sra = m68k_areg(regs, 7); if ((sra & 1) != 0) { last_fault_for_exception_3 = sra; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2950; } {{ uae_s16 sr = get_word(sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); if ((pca & 1) != 0) { last_fault_for_exception_3 = pca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2950; } {{ uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; regs.sr = sr; m68k_setpc_rte(pc); fill_prefetch_0 (); MakeFromSR(); }}}}}}}}endlabel2950: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4e74_5)(uae_u32 opcode) /* RTD */ { OpcodeFamily = 46; CurrentInstrCycles = 16; {{ uaecptr pca = m68k_areg(regs, 7); if ((pca & 1) != 0) { last_fault_for_exception_3 = pca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2951; } {{ uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; { uae_s16 offs = get_iword_prefetch(2); m68k_areg(regs, 7) += offs; m68k_setpc_rte(pc); fill_prefetch_0 (); }}}}}endlabel2951: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_4e75_5)(uae_u32 opcode) /* RTS */ { OpcodeFamily = 49; CurrentInstrCycles = 16; { m68k_do_rts(); fill_prefetch_0 (); }return 16; } unsigned long REGPARAM2 CPUFUNC(op_4e76_5)(uae_u32 opcode) /* TRAPV */ { OpcodeFamily = 50; CurrentInstrCycles = 4; {m68k_incpc(2); fill_prefetch_2 (); if (GET_VFLG) { Exception(7,m68k_getpc(),M68000_EXC_SRC_CPU); goto endlabel2953; } }endlabel2953: ; return 4; } unsigned long REGPARAM2 CPUFUNC(op_4e77_5)(uae_u32 opcode) /* RTR */ { OpcodeFamily = 51; CurrentInstrCycles = 20; { MakeSR(); { uaecptr sra = m68k_areg(regs, 7); if ((sra & 1) != 0) { last_fault_for_exception_3 = sra; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2954; } {{ uae_s16 sr = get_word(sra); m68k_areg(regs, 7) += 2; { uaecptr pca = m68k_areg(regs, 7); if ((pca & 1) != 0) { last_fault_for_exception_3 = pca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2954; } {{ uae_s32 pc = get_long(pca); m68k_areg(regs, 7) += 4; regs.sr &= 0xFF00; sr &= 0xFF; regs.sr |= sr; m68k_setpc(pc); fill_prefetch_0 (); MakeFromSR(); }}}}}}}endlabel2954: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_4e90_5)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_do_jsr(m68k_getpc() + 2, srca); fill_prefetch_0 (); }}return 16; } unsigned long REGPARAM2 CPUFUNC(op_4ea8_5)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); m68k_do_jsr(m68k_getpc() + 4, srca); fill_prefetch_0 (); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4eb0_5)(uae_u32 opcode) /* JSR */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 52; CurrentInstrCycles = 22; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; m68k_do_jsr(m68k_getpc() + 4, srca); fill_prefetch_0 (); }}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4eb8_5)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); m68k_do_jsr(m68k_getpc() + 4, srca); fill_prefetch_0 (); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4eb9_5)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); m68k_do_jsr(m68k_getpc() + 6, srca); fill_prefetch_0 (); }}return 20; } unsigned long REGPARAM2 CPUFUNC(op_4eba_5)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); m68k_do_jsr(m68k_getpc() + 4, srca); fill_prefetch_0 (); }}return 18; } unsigned long REGPARAM2 CPUFUNC(op_4ebb_5)(uae_u32 opcode) /* JSR */ { OpcodeFamily = 52; CurrentInstrCycles = 22; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; m68k_do_jsr(m68k_getpc() + 4, srca); fill_prefetch_0 (); }}return 22; } unsigned long REGPARAM2 CPUFUNC(op_4ed0_5)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_setpc(srca); fill_prefetch_0 (); }}return 8; } unsigned long REGPARAM2 CPUFUNC(op_4ee8_5)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); m68k_setpc(srca); fill_prefetch_0 (); }}return 10; } unsigned long REGPARAM2 CPUFUNC(op_4ef0_5)(uae_u32 opcode) /* JMP */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 53; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; m68k_setpc(srca); fill_prefetch_0 (); }}return 14; } unsigned long REGPARAM2 CPUFUNC(op_4ef8_5)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 10; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); m68k_setpc(srca); fill_prefetch_0 (); }}return 10; } unsigned long REGPARAM2 CPUFUNC(op_4ef9_5)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 12; {{ uaecptr srca = get_ilong_prefetch(2); m68k_setpc(srca); fill_prefetch_0 (); }}return 12; } unsigned long REGPARAM2 CPUFUNC(op_4efa_5)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); m68k_setpc(srca); fill_prefetch_0 (); }}return 10; } unsigned long REGPARAM2 CPUFUNC(op_4efb_5)(uae_u32 opcode) /* JMP */ { OpcodeFamily = 53; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; m68k_setpc(srca); fill_prefetch_0 (); }}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5000_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5010_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5018_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } #endif #ifdef PART_5 unsigned long REGPARAM2 CPUFUNC(op_5020_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5028_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5030_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5038_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5039_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5040_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5048_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5050_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2979; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel2979: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5058_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2980; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel2980: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5060_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2981; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel2981: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_5068_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2982; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2982: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_5070_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2983; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2983: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_5078_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2984; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2984: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_5079_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2985; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel2985: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_5080_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5088_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5090_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2988; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel2988: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_5098_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2989; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel2989: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_50a0_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2990; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel2990: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_50a8_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2991; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2991: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_50b0_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 26; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2992; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2992: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_50b8_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2993; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2993: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_50b9_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel2994; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel2994: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_50c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(0) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_50c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(0)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel2996; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel2996: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_50d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(0) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_50d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(0) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_50e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(0) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_50e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(0) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_50f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(0) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_50f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(0) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_50f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(0) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5100_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5110_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5118_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5120_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5128_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5130_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5138_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5139_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5140_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5148_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5150_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3014; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3014: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5158_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3015; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3015: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5160_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3016; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3016: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_5168_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3017; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3017: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_5170_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3018; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3018: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_5178_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3019; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3019: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_5179_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3020; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3020: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_5180_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5188_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_5190_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3023; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3023: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_5198_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3024; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3024: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_51a0_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3025; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3025: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_51a8_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3026; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3026: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_51b0_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 26; {{ uae_u32 src = srcreg; { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3027; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3027: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_51b8_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_u32 src = srcreg; { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3028; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3028: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_51b9_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_u32 src = srcreg; { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3029; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3029: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_51c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(1) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_51c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(1)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3031; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3031: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_51d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(1) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_51d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(1) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_51e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(1) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_51e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(1) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_51f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(1) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_51f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(1) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_51f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(1) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_52c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(2) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_52c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(2)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3040; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3040: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_52d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(2) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_52d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(2) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_52e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(2) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_52e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(2) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_52f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(2) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_52f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(2) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_52f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(2) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_53c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(3) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_53c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(3)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3049; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3049: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_53d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(3) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_53d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(3) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_53e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(3) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_53e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(3) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_53f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(3) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_53f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(3) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_53f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(3) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_54c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(4) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_54c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(4)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3058; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3058: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_54d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(4) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_54d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(4) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_54e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(4) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_54e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(4) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_54f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(4) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_54f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(4) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_54f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(4) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_55c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(5) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_55c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(5)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3067; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3067: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_55d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(5) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_55d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(5) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_55e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(5) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_55e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(5) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_55f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(5) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_55f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(5) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_55f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(5) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_56c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(6) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_56c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(6)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3076; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3076: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_56d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(6) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_56d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(6) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_56e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(6) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_56e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(6) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_56f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(6) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_56f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(6) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_56f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(6) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_57c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(7) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_57c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(7)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3085; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3085: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_57d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(7) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_57d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(7) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_57e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(7) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_57e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(7) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_57f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(7) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_57f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(7) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_57f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(7) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_58c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(8) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_58c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(8)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3094; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3094: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_58d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(8) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_58d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(8) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_58e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(8) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_58e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(8) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_58f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(8) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_58f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(8) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_58f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(8) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_59c0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(9) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_59c8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(9)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3103; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3103: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_59d0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(9) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_59d8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(9) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_59e0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(9) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_59e8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(9) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_59f0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(9) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_59f8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(9) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_59f9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(9) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5ac0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(10) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5ac8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(10)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3112; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3112: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ad0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(10) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ad8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(10) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ae0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(10) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5ae8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(10) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5af0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(10) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5af8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(10) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5af9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(10) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5bc0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(11) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5bc8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(11)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3121; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3121: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5bd0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(11) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5bd8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(11) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5be0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(11) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5be8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(11) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5bf0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(11) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5bf8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(11) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5bf9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(11) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5cc0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(12) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5cc8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(12)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3130; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3130: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5cd0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(12) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5cd8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(12) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ce0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(12) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5ce8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(12) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5cf0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(12) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5cf8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(12) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5cf9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(12) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5dc0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(13) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5dc8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(13)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3139; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3139: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5dd0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(13) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5dd8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(13) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5de0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(13) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5de8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(13) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5df0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(13) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5df8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(13) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5df9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(13) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5ec0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(14) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5ec8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(14)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3148; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3148: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ed0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(14) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ed8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(14) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5ee0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(14) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_5ee8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(14) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ef0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(14) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5ef8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(14) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ef9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(14) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_5fc0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 4; {{{ int val = cctrue(15) ? 0xff : 0; m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xff) | ((val) & 0xff); if (val) { m68k_incpc(2) ; return 4+2; } }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_5fc8_5)(uae_u32 opcode) /* DBcc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 58; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 offs = get_iword_prefetch(2); if (!cctrue(15)) { m68k_dreg(regs, srcreg) = (m68k_dreg(regs, srcreg) & ~0xffff) | (((src-1)) & 0xffff); if (src) { if (offs & 1) { last_addr_for_exception_3 = m68k_getpc() + 2 + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)offs + 2; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3157; } m68k_incpc((uae_s32)offs + 2); fill_prefetch_0 (); return 10; } else { m68k_incpc(4); fill_prefetch_0 (); return 14; } } }}}m68k_incpc(4); fill_prefetch_0 (); endlabel3157: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_5fd0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { int val = cctrue(15) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5fd8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { int val = cctrue(15) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_5fe0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; m68k_areg (regs, srcreg) = srca; { int val = cctrue(15) ? 0xff : 0; m68k_incpc(2); fill_prefetch_2 (); put_byte(srca,val); }}}return 14; } #endif #ifdef PART_6 unsigned long REGPARAM2 CPUFUNC(op_5fe8_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(15) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ff0_5)(uae_u32 opcode) /* Scc */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 59; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { int val = cctrue(15) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_5ff8_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { int val = cctrue(15) ? 0xff : 0; m68k_incpc(4); fill_prefetch_0 (); put_byte(srca,val); }}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_5ff9_5)(uae_u32 opcode) /* Scc */ { OpcodeFamily = 59; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); { int val = cctrue(15) ? 0xff : 0; m68k_incpc(6); fill_prefetch_0 (); put_byte(srca,val); }}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_6000_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(0)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3165; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3165: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6001_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(0)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3166; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3166: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_60ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(0)) goto endlabel3167; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3167; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(0)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3167; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3167: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6100_5)(uae_u32 opcode) /* BSR */ { OpcodeFamily = 54; CurrentInstrCycles = 18; {{ uae_s16 src = get_iword_prefetch(2); uae_s32 s = (uae_s32)src + 2; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + s; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3168; } m68k_do_bsr(m68k_getpc() + 4, s); fill_prefetch_0 (); }}endlabel3168: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_6101_5)(uae_u32 opcode) /* BSR */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 54; CurrentInstrCycles = 18; {{ uae_u32 src = srcreg; uae_s32 s = (uae_s32)src + 2; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + s; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3169; } m68k_do_bsr(m68k_getpc() + 2, s); fill_prefetch_0 (); }}endlabel3169: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_61ff_5)(uae_u32 opcode) /* BSR */ { OpcodeFamily = 54; CurrentInstrCycles = 18; {{ uae_s32 src = get_ilong_prefetch(2); uae_s32 s = (uae_s32)src + 2; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + s; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3170; } m68k_do_bsr(m68k_getpc() + 6, s); fill_prefetch_0 (); }}endlabel3170: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_6200_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(2)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3171; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3171: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6201_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(2)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3172; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3172: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_62ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(2)) goto endlabel3173; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3173; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(2)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3173; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3173: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6300_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(3)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3174; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3174: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6301_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(3)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3175; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3175: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_63ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(3)) goto endlabel3176; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3176; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(3)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3176; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3176: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6400_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(4)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3177; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3177: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6401_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(4)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3178; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3178: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_64ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(4)) goto endlabel3179; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3179; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(4)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3179; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3179: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6500_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(5)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3180; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3180: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6501_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(5)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3181; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3181: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_65ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(5)) goto endlabel3182; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3182; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(5)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3182; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3182: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6600_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(6)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3183; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3183: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6601_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(6)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3184; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3184: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_66ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(6)) goto endlabel3185; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3185; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(6)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3185; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3185: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6700_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(7)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3186; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3186: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6701_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(7)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3187; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3187: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_67ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(7)) goto endlabel3188; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3188; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(7)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3188; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3188: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6800_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(8)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3189; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3189: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6801_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(8)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3190; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3190: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_68ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(8)) goto endlabel3191; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3191; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(8)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3191; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3191: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6900_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(9)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3192; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3192: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6901_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(9)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3193; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3193: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_69ff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(9)) goto endlabel3194; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3194; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(9)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3194; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3194: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6a00_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(10)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3195; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3195: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6a01_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(10)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3196; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3196: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6aff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(10)) goto endlabel3197; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3197; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(10)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3197; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3197: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6b00_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(11)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3198; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3198: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6b01_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(11)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3199; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3199: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6bff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(11)) goto endlabel3200; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3200; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(11)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3200; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3200: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6c00_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(12)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3201; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3201: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6c01_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(12)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3202; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3202: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6cff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(12)) goto endlabel3203; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3203; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(12)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3203; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3203: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6d00_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(13)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3204; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3204: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6d01_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(13)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3205; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3205: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6dff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(13)) goto endlabel3206; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3206; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(13)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3206; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3206: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6e00_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(14)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3207; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3207: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6e01_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(14)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3208; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3208: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6eff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(14)) goto endlabel3209; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3209; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(14)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3209; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3209: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6f00_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); if (!cctrue(15)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3210; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(4); fill_prefetch_0 (); endlabel3210: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_6f01_5)(uae_u32 opcode) /* Bcc */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); OpcodeFamily = 55; CurrentInstrCycles = 8; {{ uae_u32 src = srcreg; if (!cctrue(15)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3211; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(2); fill_prefetch_2 (); endlabel3211: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_6fff_5)(uae_u32 opcode) /* Bcc */ { OpcodeFamily = 55; CurrentInstrCycles = 12; { m68k_incpc(2); if (!cctrue(15)) goto endlabel3212; last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 1; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3212; { uae_s32 src = get_ilong_prefetch(2); if (!cctrue(15)) goto didnt_jump; if (src & 1) { last_addr_for_exception_3 = m68k_getpc() + 2; last_fault_for_exception_3 = m68k_getpc() + 2 + (uae_s32)src; last_op_for_exception_3 = opcode; Exception(3,0,M68000_EXC_SRC_CPU); goto endlabel3212; } m68k_incpc ((uae_s32)src + 2); fill_prefetch_0 (); return 10; didnt_jump:; }}m68k_incpc(6); fill_prefetch_0 (); endlabel3212: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_7000_5)(uae_u32 opcode) /* MOVE */ { uae_u32 srcreg = (uae_s32)(uae_s8)(opcode & 255); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 30; CurrentInstrCycles = 4; {{ uae_u32 src = srcreg; { CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_8000_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_8010_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8018_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8020_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_8028_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8030_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_8038_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_8039_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_803a_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_803b_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_803c_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8040_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_8050_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3226; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3226: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_8058_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3227; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3227: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_8060_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3228; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3228: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_8068_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3229; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3229: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_8070_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3230; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3230: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_8078_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3231; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3231: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_8079_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3232; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3232: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_807a_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3233; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3233: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_807b_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3234; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3234: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_807c_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8080_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_8090_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3237; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3237: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_8098_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3238; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3238: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_80a0_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3239; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3239: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_80a8_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3240; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3240: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_80b0_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3241; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3241: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_80b8_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3242; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3242: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_80b9_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3243; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3243: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_80ba_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3244; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3244: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_80bb_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3245; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3245: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_80bc_5)(uae_u32 opcode) /* OR */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_80c0_5)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 4; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3247; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}endlabel3247: ; return (4+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80d0_5)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3248; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3248; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3248: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80d8_5)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3249; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3249; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3249: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80e0_5)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3250; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3250; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3250: ; return (10+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80e8_5)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3251; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3251; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3251: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80f0_5)(uae_u32 opcode) /* DIVU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3252; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3252; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3252: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80f8_5)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3253; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3253; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3253: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80f9_5)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3254; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3254; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3254: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fa_5)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3255; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3255; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3255: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fb_5)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3256; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3256; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}}}endlabel3256: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_80fc_5)(uae_u32 opcode) /* DIVU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 60; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception (5, oldpc,M68000_EXC_SRC_CPU); goto endlabel3257; } else { uae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src; uae_u32 rem = (uae_u32)dst % (uae_u32)(uae_u16)src; if (newv > 0xffff) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivu68kCycles((uae_u32)dst, (uae_u16)src); }}}endlabel3257: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_8100_5)(uae_u32 opcode) /* SBCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 10; CurrentInstrCycles = 6; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); uae_u16 newv, tmp_newv; int bcd = 0; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_8108_5)(uae_u32 opcode) /* SBCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 10; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0); uae_u16 newv, tmp_newv; int bcd = 0; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo & 0xF0) { newv -= 6; bcd = 6; }; if ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; } SET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG ? 1 : 0)) & 0x300) > 0xFF); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_8110_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_8118_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_8120_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_8128_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_8130_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_8138_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_8139_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_8150_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3267; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3267: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_8158_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3268; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3268: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_8160_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3269; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3269: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_8168_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3270; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3270: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_8170_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3271; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3271: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_8178_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3272; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3272: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_8179_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3273; } {{ uae_s16 dst = get_word(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3273: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_8190_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3274; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3274: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_8198_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3275; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3275: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_81a0_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3276; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3276: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_81a8_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3277; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3277: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_81b0_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 1; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3278; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3278: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_81b8_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3279; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3279: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_81b9_5)(uae_u32 opcode) /* OR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 1; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3280; } {{ uae_s32 dst = get_long(dsta); src |= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3280: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_81c0_5)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 4; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3281; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}endlabel3281: ; return (4+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81d0_5)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3282; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3282; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3282: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81d8_5)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3283; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3283; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3283: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81e0_5)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 10; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3284; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(2); fill_prefetch_2 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3284; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3284: ; return (10+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81e8_5)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3285; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3285; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3285: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81f0_5)(uae_u32 opcode) /* DIVS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3286; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3286; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3286: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81f8_5)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3287; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3287; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3287: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81f9_5)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 16; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3288; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(6); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3288; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3288: ; return (16+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fa_5)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 12; { uaecptr oldpc = m68k_getpc(); { uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3289; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3289; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3289: ; return (12+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fb_5)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 14; { uaecptr oldpc = m68k_getpc(); { uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3290; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3290; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}}}endlabel3290: ; return (14+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_81fc_5)(uae_u32 opcode) /* DIVS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 61; CurrentInstrCycles = 8; { uaecptr oldpc = m68k_getpc(); { uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_incpc(4); fill_prefetch_0 (); if (src == 0) { SET_VFLG (0); Exception(5,oldpc,M68000_EXC_SRC_CPU); goto endlabel3291; } else { uae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src; uae_u16 rem = (uae_s32)dst % (uae_s32)(uae_s16)src; if ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) { SET_VFLG (1); SET_NFLG (1); SET_CFLG (0); } else { if (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem; CLEAR_CZNV; SET_ZFLG (((uae_s16)(newv)) == 0); SET_NFLG (((uae_s16)(newv)) < 0); newv = (newv & 0xffff) | ((uae_u32)rem << 16); m68k_dreg(regs, dstreg) = (newv); } } retcycles = getDivs68kCycles((uae_s32)dst, (uae_s16)src); }}}endlabel3291: ; return (8+retcycles); } unsigned long REGPARAM2 CPUFUNC(op_9000_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9010_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9018_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9020_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_9028_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9030_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_9038_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9039_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_903a_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_903b_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_903c_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9040_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9048_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9050_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3305; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3305: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_9058_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3306; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3306: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_9060_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3307; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3307: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_9068_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3308; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3308: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_9070_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3309; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3309: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_9078_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3310; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3310: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_9079_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3311; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3311: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_907a_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3312; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3312: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_907b_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3313; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3313: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_907c_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9080_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9088_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9090_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3317; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3317: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_9098_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3318; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3318: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_90a0_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3319; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3319: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_90a8_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3320; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3320: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_90b0_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3321; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3321: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_90b8_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3322; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3322: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_90b9_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3323; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3323: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_90ba_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3324; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3324: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_90bb_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3325; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3325: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_90bc_5)(uae_u32 opcode) /* SUB */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_90c0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_90c8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_90d0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3329; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3329: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_90d8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3330; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3330: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_90e0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3331; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3331: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_90e8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3332; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3332: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_90f0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3333; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3333: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_90f8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3334; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3334: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_90f9_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3335; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3335: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_90fa_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3336; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3336: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_90fb_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3337; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3337: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_90fc_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_9100_5)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9108_5)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_9110_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_9118_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_9120_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_9128_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_9130_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_9138_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_9139_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_9140_5)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_9148_5)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3349; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3349; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}}endlabel3349: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_9150_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3350; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3350: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_9158_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3351; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3351: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_9160_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3352; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3352: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_9168_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3353; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3353: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_9170_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3354; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3354: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_9178_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3355; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3355: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_9179_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3356; } {{ uae_s16 dst = get_word(dsta); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3356: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_9180_5)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_9188_5)(uae_u32 opcode) /* SUBX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 9; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3358; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3358; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst - src - (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgo) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}}endlabel3358: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_9190_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3359; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3359: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_9198_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3360; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3360: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_91a0_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3361; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3361: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_91a8_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3362; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3362: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_91b0_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 7; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3363; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3363: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_91b8_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3364; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3364: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_91b9_5)(uae_u32 opcode) /* SUB */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 7; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3365; } {{ uae_s32 dst = get_long(dsta); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3365: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_91c0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_91c8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_91d0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3368; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3368: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_91d8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3369; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3369: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_91e0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3370; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3370: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_91e8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3371; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3371: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_91f0_5)(uae_u32 opcode) /* SUBA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3372; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3372: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_91f8_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3373; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3373: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_91f9_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3374; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3374: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_91fa_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3375; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3375: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_91fb_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3376; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3376: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_91fc_5)(uae_u32 opcode) /* SUBA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 8; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst - src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b000_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b010_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b018_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b020_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b028_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b030_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b038_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b039_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_b03a_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b03b_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } #endif #ifdef PART_7 unsigned long REGPARAM2 CPUFUNC(op_b03c_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b040_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b048_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b050_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3391; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3391: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_b058_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3392; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3392: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_b060_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3393; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3393: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_b068_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3394; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3394: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b070_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3395; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3395: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b078_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3396; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3396: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b079_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3397; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3397: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b07a_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3398; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3398: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b07b_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3399; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3399: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b07c_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b080_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b088_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b090_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3403; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3403: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b098_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3404; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3404: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0a0_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3405; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3405: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0a8_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3406; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3406: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0b0_5)(uae_u32 opcode) /* CMP */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3407; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3407: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b0b8_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3408; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3408: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0b9_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3409; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3409: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_b0ba_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3410; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3410: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0bb_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3411; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3411: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b0bc_5)(uae_u32 opcode) /* CMP */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 25; CurrentInstrCycles = 14; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0c0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b0c8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b0d0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3415; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3415: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_b0d8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3416; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3416: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_b0e0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3417; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3417: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b0e8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3418; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3418: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0f0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3419; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3419: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0f8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3420; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3420: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0f9_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3421; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3421: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b0fa_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3422; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3422: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b0fb_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3423; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3423: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b0fc_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 10; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_b100_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b108_5)(uae_u32 opcode) /* CMPM */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 26; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; {{uae_u32 newv = ((uae_s8)(dst)) - ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u8)(src)) > ((uae_u8)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_b110_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_b118_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_b120_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_b128_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_b130_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_b138_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_b139_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_b140_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_b148_5)(uae_u32 opcode) /* CMPM */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 26; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3435; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3435; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; {{uae_u32 newv = ((uae_s16)(dst)) - ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u16)(src)) > ((uae_u16)(dst))); SET_NFLG (flgn != 0); }}}}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3435: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b150_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3436; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3436: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b158_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3437; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3437: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_b160_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3438; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3438: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b168_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3439; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3439: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b170_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3440; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3440: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b178_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3441; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3441: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b179_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3442; } {{ uae_s16 dst = get_word(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3442: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b180_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_b188_5)(uae_u32 opcode) /* CMPM */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 26; CurrentInstrCycles = 20; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3444; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3444; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3444: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b190_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3445; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3445: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b198_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3446; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3446: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1a0_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3447; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3447: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_b1a8_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3448; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3448: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_b1b0_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 3; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3449; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3449: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_b1b8_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3450; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3450: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_b1b9_5)(uae_u32 opcode) /* EOR */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 3; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3451; } {{ uae_s32 dst = get_long(dsta); src ^= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3451: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_b1c0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b1c8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_b1d0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3454; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3454: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b1d8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3455; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3455: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_b1e0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3456; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3456: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_b1e8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3457; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3457: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1f0_5)(uae_u32 opcode) /* CMPA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3458; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3458: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1f8_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3459; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3459: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1f9_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3460; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3460: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_b1fa_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3461; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3461: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_b1fb_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3462; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3462: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_b1fc_5)(uae_u32 opcode) /* CMPA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 27; CurrentInstrCycles = 14; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_areg(regs, dstreg); {{uae_u32 newv = ((uae_s32)(dst)) - ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs != flgo) && (flgn != flgo)); SET_CFLG (((uae_u32)(src)) > ((uae_u32)(dst))); SET_NFLG (flgn != 0); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c000_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_c010_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c018_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c020_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_c028_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c030_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c038_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c039_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c03a_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_c03b_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_c03c_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c040_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_c050_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3476; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3476: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_c058_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3477; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3477: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_c060_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3478; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3478: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_c068_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3479; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3479: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c070_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3480; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3480: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_c078_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3481; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3481: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c079_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3482; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3482: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c07a_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3483; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3483: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c07b_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3484; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3484: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_c07c_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff); }}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c080_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_c090_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3487; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3487: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_c098_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3488; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3488: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_c0a0_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3489; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3489: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c0a8_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3490; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3490: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_c0b0_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3491; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3491: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c0b8_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3492; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3492: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_c0b9_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3493; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3493: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_c0ba_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3494; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3494: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_c0bb_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3495; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3495: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c0bc_5)(uae_u32 opcode) /* AND */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_c0c0_5)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 38; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}m68k_incpc(2); fill_prefetch_2 (); return (38+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0d0_5)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3498; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3498: ; return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0d8_5)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3499; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3499: ; return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0e0_5)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 44; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3500; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3500: ; return (44+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0e8_5)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3501; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3501: ; return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0f0_5)(uae_u32 opcode) /* MULU */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 48; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3502; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3502: ; return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0f8_5)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 46; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3503; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3503: ; return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0f9_5)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 50; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3504; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3504: ; return (50+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fa_5)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3505; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3505: ; return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fb_5)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 48; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3506; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3506: ; return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c0fc_5)(uae_u32 opcode) /* MULU */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 62; CurrentInstrCycles = 42; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); while (src) { if (src & 1) retcycles++; src = (uae_u16)src >> 1; } }}}}m68k_incpc(4); fill_prefetch_0 (); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c100_5)(uae_u32 opcode) /* ABCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 14; CurrentInstrCycles = 6; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); uae_u16 newv, tmp_newv; int cflg; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } cflg = (newv & 0x3F0) > 0x90; if (cflg) newv += 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c108_5)(uae_u32 opcode) /* ABCD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 14; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG ? 1 : 0); uae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0); uae_u16 newv, tmp_newv; int cflg; newv = tmp_newv = newv_hi + newv_lo; if (newv_lo > 9) { newv += 6; } cflg = (newv & 0x3F0) > 0x90; if (cflg) newv += 0x60; SET_CFLG (cflg); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); SET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c110_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_c118_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_c120_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,src); }}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_c128_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_c130_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_c138_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_c139_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s8)(src)) == 0); SET_NFLG (((uae_s8)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,src); }}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_c140_5)(uae_u32 opcode) /* EXG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 35; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); m68k_dreg(regs, srcreg) = (dst); m68k_dreg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c148_5)(uae_u32 opcode) /* EXG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 35; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); m68k_areg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c150_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3519; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3519: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c158_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3520; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3520: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_c160_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3521; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,src); }}}}}endlabel3521: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_c168_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3522; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3522: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c170_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3523; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3523: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_c178_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3524; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3524: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_c179_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3525; } {{ uae_s16 dst = get_word(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s16)(src)) == 0); SET_NFLG (((uae_s16)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,src); }}}}}endlabel3525: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c188_5)(uae_u32 opcode) /* EXG */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 35; CurrentInstrCycles = 6; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); m68k_dreg(regs, srcreg) = (dst); m68k_areg(regs, dstreg) = (src); }}}m68k_incpc(2); fill_prefetch_2 (); return 6; } unsigned long REGPARAM2 CPUFUNC(op_c190_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3527; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3527: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c198_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3528; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3528: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_c1a0_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3529; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,src); }}}}}endlabel3529: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_c1a8_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3530; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3530: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_c1b0_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 2; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3531; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3531: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_c1b8_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3532; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3532: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_c1b9_5)(uae_u32 opcode) /* AND */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 2; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3533; } {{ uae_s32 dst = get_long(dsta); src &= dst; CLEAR_CZNV; SET_ZFLG (((uae_s32)(src)) == 0); SET_NFLG (((uae_s32)(src)) < 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,src); }}}}}endlabel3533: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_c1c0_5)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 38; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}m68k_incpc(2); fill_prefetch_2 (); return (38+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1d0_5)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3535; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3535: ; return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1d8_5)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 42; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3536; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3536: ; return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1e0_5)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 44; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3537; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3537: ; return (44+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1e8_5)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3538; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3538: ; return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1f0_5)(uae_u32 opcode) /* MULS */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 48; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3539; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3539: ; return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1f8_5)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 46; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3540; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3540: ; return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1f9_5)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 50; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3541; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3541: ; return (50+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fa_5)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 46; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3542; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3542: ; return (46+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fb_5)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 48; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3543; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3543: ; return (48+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_c1fc_5)(uae_u32 opcode) /* MULS */ { uae_u32 dstreg = (opcode >> 9) & 7; unsigned int retcycles = 0; OpcodeFamily = 63; CurrentInstrCycles = 42; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src; uae_u32 src2; CLEAR_CZNV; SET_ZFLG (((uae_s32)(newv)) == 0); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); src2 = ((uae_u32)src) << 1; while (src2) { if ( ( (src2 & 3) == 1 ) || ( (src2 & 3) == 2 ) ) retcycles++; src2 >>= 1; } }}}}m68k_incpc(4); fill_prefetch_0 (); return (42+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_d000_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d010_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d018_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); { uae_s8 src = get_byte(srca); m68k_areg(regs, srcreg) += areg_byteinc[srcreg]; { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d020_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(2); fill_prefetch_2 (); return 10; } unsigned long REGPARAM2 CPUFUNC(op_d028_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d030_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d038_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d039_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d03a_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d03b_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 src = get_byte(srca); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}}m68k_incpc(4); fill_prefetch_0 (); return 14; } unsigned long REGPARAM2 CPUFUNC(op_d03c_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s8 src = get_ibyte_prefetch(2); { uae_s8 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d040_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d048_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d050_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3558; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3558: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_d058_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3559; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3559: ; return 8; } unsigned long REGPARAM2 CPUFUNC(op_d060_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 10; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3560; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3560: ; return 10; } unsigned long REGPARAM2 CPUFUNC(op_d068_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3561; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3561: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d070_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3562; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3562: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d078_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3563; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3563: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d079_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3564; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3564: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d07a_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3565; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3565: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d07b_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3566; } {{ uae_s16 src = get_word(srca); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3566: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d07c_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s16 src = get_iword_prefetch(2); { uae_s16 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}}m68k_incpc(4); fill_prefetch_0 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d080_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d088_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d090_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3570; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3570: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d098_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3571; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3571: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d0a0_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3572; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3572: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0a8_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3573; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3573: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0b0_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3574; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3574: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0b8_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3575; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3575: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0b9_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3576; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3576: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_d0ba_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3577; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3577: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0bb_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3578; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3578: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0bc_5)(uae_u32 opcode) /* ADD */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_dreg(regs, dstreg); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_dreg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0c0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d0c8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s16 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d0d0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3582; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3582: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d0d8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 12; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3583; } {{ uae_s16 src = get_word(srca); m68k_areg(regs, srcreg) += 2; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3583: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d0e0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3584; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3584: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d0e8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3585; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3585: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0f0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3586; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3586: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0f8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3587; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3587: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0f9_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3588; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3588: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d0fa_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3589; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3589: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d0fb_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3590; } {{ uae_s16 src = get_word(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3590: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d0fc_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 12; {{ uae_s16 src = get_iword_prefetch(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(4); fill_prefetch_0 (); return 12; } unsigned long REGPARAM2 CPUFUNC(op_d100_5)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 4; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uae_s8 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d108_5)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg]; { uae_s8 src = get_byte(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s8)(newv)) == 0)); SET_NFLG (((uae_s8)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_d110_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_d118_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); { uae_s8 dst = get_byte(dsta); m68k_areg(regs, dstreg) += areg_byteinc[dstreg]; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 12; } unsigned long REGPARAM2 CPUFUNC(op_d120_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg]; { uae_s8 dst = get_byte(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_byte(dsta,newv); }}}}}}}return 14; } unsigned long REGPARAM2 CPUFUNC(op_d128_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_d130_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 18; } unsigned long REGPARAM2 CPUFUNC(op_d138_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 16; } unsigned long REGPARAM2 CPUFUNC(op_d139_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s8 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); { uae_s8 dst = get_byte(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s8)(dst)) + ((uae_s8)(src)); { int flgs = ((uae_s8)(src)) < 0; int flgo = ((uae_s8)(dst)) < 0; int flgn = ((uae_s8)(newv)) < 0; SET_ZFLG (((uae_s8)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u8)(~dst)) < ((uae_u8)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_byte(dsta,newv); }}}}}}}return 20; } unsigned long REGPARAM2 CPUFUNC(op_d140_5)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 4; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uae_s16 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 4; } unsigned long REGPARAM2 CPUFUNC(op_d148_5)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) - 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3602; } {{ uae_s16 src = get_word(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3602; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s16)(newv)) == 0)); SET_NFLG (((uae_s16)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}}endlabel3602: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d150_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3603; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3603: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d158_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 12; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3604; } {{ uae_s16 dst = get_word(dsta); m68k_areg(regs, dstreg) += 2; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3604: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_d160_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 14; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3605; } {{ uae_s16 dst = get_word(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_word(dsta,newv); }}}}}}}}endlabel3605: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d168_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3606; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3606: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d170_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 18; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3607; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3607: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d178_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 16; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3608; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3608: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d179_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s16 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3609; } {{ uae_s16 dst = get_word(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s16)(dst)) + ((uae_s16)(src)); { int flgs = ((uae_s16)(src)) < 0; int flgo = ((uae_s16)(dst)) < 0; int flgn = ((uae_s16)(newv)) < 0; SET_ZFLG (((uae_s16)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u16)(~dst)) < ((uae_u16)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_word(dsta,newv); }}}}}}}}endlabel3609: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d180_5)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_dreg(regs, dstreg); { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_dreg(regs, dstreg) = (newv); }}}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d188_5)(uae_u32 opcode) /* ADDX */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 13; CurrentInstrCycles = 30; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3611; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3611; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { uae_u32 newv = dst + src + (GET_XFLG ? 1 : 0); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn))); COPY_CARRY; SET_ZFLG (GET_ZFLG & (((uae_s32)(newv)) == 0)); SET_NFLG (((uae_s32)(newv)) < 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}}endlabel3611: ; return 30; } unsigned long REGPARAM2 CPUFUNC(op_d190_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3612; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3612: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d198_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 20; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3613; } {{ uae_s32 dst = get_long(dsta); m68k_areg(regs, dstreg) += 4; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3613: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1a0_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 22; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) - 4; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3614; } {{ uae_s32 dst = get_long(dsta); m68k_areg (regs, dstreg) = dsta; { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(2); fill_prefetch_2 (); put_long(dsta,newv); }}}}}}}}endlabel3614: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_d1a8_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = m68k_areg(regs, dstreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3615; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3615: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_d1b0_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; OpcodeFamily = 11; CurrentInstrCycles = 26; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3616; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3616: ; return 26; } unsigned long REGPARAM2 CPUFUNC(op_d1b8_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 24; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3617; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(4); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3617: ; return 24; } unsigned long REGPARAM2 CPUFUNC(op_d1b9_5)(uae_u32 opcode) /* ADD */ { uae_u32 srcreg = ((opcode >> 9) & 7); OpcodeFamily = 11; CurrentInstrCycles = 28; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uaecptr dsta = get_ilong_prefetch(2); if ((dsta & 1) != 0) { last_fault_for_exception_3 = dsta; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3618; } {{ uae_s32 dst = get_long(dsta); { refill_prefetch (m68k_getpc(), 2); {uae_u32 newv = ((uae_s32)(dst)) + ((uae_s32)(src)); { int flgs = ((uae_s32)(src)) < 0; int flgo = ((uae_s32)(dst)) < 0; int flgn = ((uae_s32)(newv)) < 0; SET_ZFLG (((uae_s32)(newv)) == 0); SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn)); SET_CFLG (((uae_u32)(~dst)) < ((uae_u32)(src))); COPY_CARRY; SET_NFLG (flgn != 0); m68k_incpc(6); fill_prefetch_0 (); put_long(dsta,newv); }}}}}}}}endlabel3618: ; return 28; } unsigned long REGPARAM2 CPUFUNC(op_d1c0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_dreg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d1c8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 8; {{ uae_s32 src = m68k_areg(regs, srcreg); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(2); fill_prefetch_2 (); return 8; } unsigned long REGPARAM2 CPUFUNC(op_d1d0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3621; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3621: ; return 14; } #endif #ifdef PART_8 unsigned long REGPARAM2 CPUFUNC(op_d1d8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 14; {{ uaecptr srca = m68k_areg(regs, srcreg); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3622; } {{ uae_s32 src = get_long(srca); m68k_areg(regs, srcreg) += 4; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3622: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_d1e0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uaecptr srca = m68k_areg(regs, srcreg) - 4; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3623; } {{ uae_s32 src = get_long(srca); m68k_areg (regs, srcreg) = srca; { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(2); fill_prefetch_2 (); endlabel3623: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_d1e8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3624; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3624: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1f0_5)(uae_u32 opcode) /* ADDA */ { uae_u32 srcreg = (opcode & 7); uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{ uaecptr srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3625; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3625: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1f8_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3626; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3626: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1f9_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 22; {{ uaecptr srca = get_ilong_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3627; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(6); fill_prefetch_0 (); endlabel3627: ; return 22; } unsigned long REGPARAM2 CPUFUNC(op_d1fa_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 18; {{ uaecptr srca = m68k_getpc () + 2; srca += (uae_s32)(uae_s16)get_iword_prefetch(2); if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3628; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3628: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_d1fb_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 20; {{ uaecptr tmppc = m68k_getpc() + 2; uaecptr srca = get_disp_ea_000(tmppc, get_iword_prefetch(2)); BusCyclePenalty += 2; if ((srca & 1) != 0) { last_fault_for_exception_3 = srca; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3629; } {{ uae_s32 src = get_long(srca); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}}}m68k_incpc(4); fill_prefetch_0 (); endlabel3629: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_d1fc_5)(uae_u32 opcode) /* ADDA */ { uae_u32 dstreg = (opcode >> 9) & 7; OpcodeFamily = 12; CurrentInstrCycles = 16; {{ uae_s32 src = get_ilong_prefetch(2); { uae_s32 dst = m68k_areg(regs, dstreg); { uae_u32 newv = dst + src; m68k_areg(regs, dstreg) = (newv); }}}}m68k_incpc(6); fill_prefetch_0 (); return 16; } unsigned long REGPARAM2 CPUFUNC(op_e000_5)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; uae_u32 sign = (0x80 & val) >> 7; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { val = 0xff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xff << (8 - cnt)) & (uae_u32)-sign; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e008_5)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG ((cnt == 8) & (val >> 7)); COPY_CARRY; val = 0; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e010_5)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (7 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e018_5)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 hival; cnt &= 7; hival = val << (8 - cnt); val >>= cnt; val |= hival; val &= 0xff; SET_CFLG ((val & 0x80) >> 7); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e020_5)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; uae_u32 sign = (0x80 & val) >> 7; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { val = 0xff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xff << (8 - cnt)) & (uae_u32)-sign; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e028_5)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG ((cnt == 8) & (val >> 7)); COPY_CARRY; val = 0; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e030_5)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 36) cnt -= 36; if (cnt >= 18) cnt -= 18; if (cnt >= 9) cnt -= 9; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (7 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e038_5)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 hival; cnt &= 7; hival = val << (8 - cnt); val >>= cnt; val |= hival; val &= 0xff; SET_CFLG ((val & 0x80) >> 7); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e040_5)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; uae_u32 sign = (0x8000 & val) >> 15; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { val = 0xffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e048_5)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG ((cnt == 16) & (val >> 15)); COPY_CARRY; val = 0; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e050_5)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (15 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e058_5)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 hival; cnt &= 15; hival = val << (16 - cnt); val >>= cnt; val |= hival; val &= 0xffff; SET_CFLG ((val & 0x8000) >> 15); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e060_5)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; uae_u32 sign = (0x8000 & val) >> 15; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { val = 0xffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffff << (16 - cnt)) & (uae_u32)-sign; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e068_5)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG ((cnt == 16) & (val >> 15)); COPY_CARRY; val = 0; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e070_5)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 34) cnt -= 34; if (cnt >= 17) cnt -= 17; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (15 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e078_5)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 hival; cnt &= 15; hival = val << (16 - cnt); val >>= cnt; val |= hival; val &= 0xffff; SET_CFLG ((val & 0x8000) >> 15); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e080_5)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; uae_u32 sign = (0x80000000 & val) >> 31; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { val = 0xffffffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e088_5)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG ((cnt == 32) & (val >> 31)); COPY_CARRY; val = 0; } else { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e090_5)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (31 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e098_5)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 hival; cnt &= 31; hival = val << (32 - cnt); val >>= cnt; val |= hival; val &= 0xffffffff; SET_CFLG ((val & 0x80000000) >> 31); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0a0_5)(uae_u32 opcode) /* ASR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 64; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; uae_u32 sign = (0x80000000 & val) >> 31; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { val = 0xffffffff & (uae_u32)-sign; SET_CFLG (sign); COPY_CARRY; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; val |= (0xffffffff << (32 - cnt)) & (uae_u32)-sign; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0a8_5)(uae_u32 opcode) /* LSR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 66; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG ((cnt == 32) & (val >> 31)); COPY_CARRY; val = 0; } else if (cnt > 0) { val >>= cnt - 1; SET_CFLG (val & 1); COPY_CARRY; val >>= 1; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0b0_5)(uae_u32 opcode) /* ROXR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 71; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 33) cnt -= 33; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 hival = (val << 1) | GET_XFLG; hival <<= (31 - cnt); val >>= cnt; carry = val & 1; val >>= 1; val |= hival; SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0b8_5)(uae_u32 opcode) /* ROR */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 69; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 hival; cnt &= 31; hival = val << (32 - cnt); val >>= cnt; val |= hival; val &= 0xffffffff; SET_CFLG ((val & 0x80000000) >> 31); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e0d0_5)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3655; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3655: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e0d8_5)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3656; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3656: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e0e0_5)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3657; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3657: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e0e8_5)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3658; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3658: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e0f0_5)(uae_u32 opcode) /* ASRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 72; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3659; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3659: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e0f8_5)(uae_u32 opcode) /* ASRW */ { OpcodeFamily = 72; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3660; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3660: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e0f9_5)(uae_u32 opcode) /* ASRW */ { OpcodeFamily = 72; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3661; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 cflg = val & 1; val = (val >> 1) | sign; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (cflg); COPY_CARRY; m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3661: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e100_5)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_VFLG (val != 0); SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else { uae_u32 mask = (0xff << (7 - cnt)) & 0xff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e108_5)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else { val <<= (cnt - 1); SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e110_5)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 loval = val >> (7 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e118_5)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 loval; cnt &= 7; loval = val >> (8 - cnt); val <<= cnt; val |= loval; val &= 0xff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e120_5)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_VFLG (val != 0); SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { uae_u32 mask = (0xff << (7 - cnt)) & 0xff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e128_5)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 8) { SET_CFLG (cnt == 8 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { val <<= (cnt - 1); SET_CFLG ((val & 0x80) >> 7); COPY_CARRY; val <<= 1; val &= 0xff; } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e130_5)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 36) cnt -= 36; if (cnt >= 18) cnt -= 18; if (cnt >= 9) cnt -= 9; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 loval = val >> (7 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e138_5)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_s8 cnt = m68k_dreg(regs, srcreg); { uae_s8 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u8)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 loval; cnt &= 7; loval = val >> (8 - cnt); val <<= cnt; val |= loval; val &= 0xff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s8)(val)) == 0); SET_NFLG (((uae_s8)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((val) & 0xff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e140_5)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_VFLG (val != 0); SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else { uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e148_5)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else { val <<= (cnt - 1); SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e150_5)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 loval = val >> (15 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e158_5)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 loval; cnt &= 15; loval = val >> (16 - cnt); val <<= cnt; val |= loval; val &= 0xffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e160_5)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_VFLG (val != 0); SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { uae_u32 mask = (0xffff << (15 - cnt)) & 0xffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e168_5)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 16) { SET_CFLG (cnt == 16 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { val <<= (cnt - 1); SET_CFLG ((val & 0x8000) >> 15); COPY_CARRY; val <<= 1; val &= 0xffff; } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e170_5)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 34) cnt -= 34; if (cnt >= 17) cnt -= 17; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 loval = val >> (15 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e178_5)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_s16 cnt = m68k_dreg(regs, srcreg); { uae_s16 data = m68k_dreg(regs, dstreg); { uae_u32 val = (uae_u16)data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 loval; cnt &= 15; loval = val >> (16 - cnt); val <<= cnt; val |= loval; val &= 0xffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff); }}}}m68k_incpc(2); fill_prefetch_2 (); return (6+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e180_5)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_VFLG (val != 0); SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else { uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e188_5)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else { val <<= (cnt - 1); SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e190_5)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { cnt--; { uae_u32 carry; uae_u32 loval = val >> (31 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e198_5)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = imm8_table[((opcode >> 9) & 7)]; uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_u32 cnt = srcreg; { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; { uae_u32 loval; cnt &= 31; loval = val >> (32 - cnt); val <<= cnt; val |= loval; val &= 0xffffffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1a0_5)(uae_u32 opcode) /* ASL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 65; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_VFLG (val != 0); SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { uae_u32 mask = (0xffffffff << (31 - cnt)) & 0xffffffff; SET_VFLG ((val & mask) != mask && (val & mask) != 0); val <<= cnt - 1; SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1a8_5)(uae_u32 opcode) /* LSL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 67; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 32) { SET_CFLG (cnt == 32 ? val & 1 : 0); COPY_CARRY; val = 0; } else if (cnt > 0) { val <<= (cnt - 1); SET_CFLG ((val & 0x80000000) >> 31); COPY_CARRY; val <<= 1; val &= 0xffffffff; } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1b0_5)(uae_u32 opcode) /* ROXL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 70; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt >= 33) cnt -= 33; if (cnt > 0) { cnt--; { uae_u32 carry; uae_u32 loval = val >> (31 - cnt); carry = loval & 1; val = (((val << 1) | GET_XFLG) << cnt) | (loval >> 1); SET_XFLG (carry); val &= 0xffffffff; } } SET_CFLG (GET_XFLG); SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1b8_5)(uae_u32 opcode) /* ROL */ { uae_u32 srcreg = ((opcode >> 9) & 7); uae_u32 dstreg = opcode & 7; unsigned int retcycles = 0; OpcodeFamily = 68; CurrentInstrCycles = 4; {{ uae_s32 cnt = m68k_dreg(regs, srcreg); { uae_s32 data = m68k_dreg(regs, dstreg); { uae_u32 val = data; cnt &= 63; retcycles = cnt; CLEAR_CZNV; if (cnt > 0) { uae_u32 loval; cnt &= 31; loval = val >> (32 - cnt); val <<= cnt; val |= loval; val &= 0xffffffff; SET_CFLG (val & 1); } SET_ZFLG (((uae_s32)(val)) == 0); SET_NFLG (((uae_s32)(val)) < 0); m68k_dreg(regs, dstreg) = (val); }}}}m68k_incpc(2); fill_prefetch_2 (); return (8+retcycles*2); } unsigned long REGPARAM2 CPUFUNC(op_e1d0_5)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3686; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3686: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e1d8_5)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3687; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3687: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e1e0_5)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3688; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3688: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e1e8_5)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3689; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3689: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e1f0_5)(uae_u32 opcode) /* ASLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 73; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3690; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3690: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e1f8_5)(uae_u32 opcode) /* ASLW */ { OpcodeFamily = 73; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3691; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3691: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e1f9_5)(uae_u32 opcode) /* ASLW */ { OpcodeFamily = 73; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3692; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 sign = 0x8000 & val; uae_u32 sign2; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); sign2 = 0x8000 & val; SET_CFLG (sign != 0); COPY_CARRY; SET_VFLG (GET_VFLG | (sign2 != sign)); m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3692: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e2d0_5)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3693; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3693: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e2d8_5)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3694; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3694: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e2e0_5)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3695; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3695: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e2e8_5)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3696; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3696: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e2f0_5)(uae_u32 opcode) /* LSRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 74; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3697; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3697: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e2f8_5)(uae_u32 opcode) /* LSRW */ { OpcodeFamily = 74; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3698; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3698: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e2f9_5)(uae_u32 opcode) /* LSRW */ { OpcodeFamily = 74; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3699; } {{ uae_s16 data = get_word(dataa); { uae_u32 val = (uae_u16)data; uae_u32 carry = val & 1; val >>= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3699: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e3d0_5)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3700; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3700: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e3d8_5)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3701; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3701: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e3e0_5)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3702; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3702: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e3e8_5)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3703; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3703: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e3f0_5)(uae_u32 opcode) /* LSLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 75; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3704; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3704: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e3f8_5)(uae_u32 opcode) /* LSLW */ { OpcodeFamily = 75; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3705; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3705: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e3f9_5)(uae_u32 opcode) /* LSLW */ { OpcodeFamily = 75; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3706; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3706: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e4d0_5)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3707; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3707: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e4d8_5)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3708; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3708: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e4e0_5)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3709; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3709: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e4e8_5)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3710; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3710: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e4f0_5)(uae_u32 opcode) /* ROXRW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 79; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3711; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3711: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e4f8_5)(uae_u32 opcode) /* ROXRW */ { OpcodeFamily = 79; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3712; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3712: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e4f9_5)(uae_u32 opcode) /* ROXRW */ { OpcodeFamily = 79; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3713; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (GET_XFLG) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); COPY_CARRY; m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3713: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e5d0_5)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3714; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3714: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e5d8_5)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3715; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3715: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e5e0_5)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3716; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3716: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e5e8_5)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3717; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3717: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e5f0_5)(uae_u32 opcode) /* ROXLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 78; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3718; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3718: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e5f8_5)(uae_u32 opcode) /* ROXLW */ { OpcodeFamily = 78; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3719; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3719: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e5f9_5)(uae_u32 opcode) /* ROXLW */ { OpcodeFamily = 78; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3720; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (GET_XFLG) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); COPY_CARRY; m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3720: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e6d0_5)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3721; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3721: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e6d8_5)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3722; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3722: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e6e0_5)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3723; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3723: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e6e8_5)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3724; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3724: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e6f0_5)(uae_u32 opcode) /* RORW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 77; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3725; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3725: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e6f8_5)(uae_u32 opcode) /* RORW */ { OpcodeFamily = 77; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3726; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3726: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e6f9_5)(uae_u32 opcode) /* RORW */ { OpcodeFamily = 77; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3727; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 1; val >>= 1; if (carry) val |= 0x8000; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry); m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3727: ; return 20; } unsigned long REGPARAM2 CPUFUNC(op_e7d0_5)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3728; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3728: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e7d8_5)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 12; {{ uaecptr dataa = m68k_areg(regs, srcreg); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3729; } {{ uae_s16 data = get_word(dataa); m68k_areg(regs, srcreg) += 2; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3729: ; return 12; } unsigned long REGPARAM2 CPUFUNC(op_e7e0_5)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 14; {{ uaecptr dataa = m68k_areg(regs, srcreg) - 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 2; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3730; } {{ uae_s16 data = get_word(dataa); m68k_areg (regs, srcreg) = dataa; { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(2); fill_prefetch_2 (); put_word(dataa,val); }}}}}endlabel3730: ; return 14; } unsigned long REGPARAM2 CPUFUNC(op_e7e8_5)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 16; {{ uaecptr dataa = m68k_areg(regs, srcreg) + (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3731; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3731: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e7f0_5)(uae_u32 opcode) /* ROLW */ { uae_u32 srcreg = (opcode & 7); OpcodeFamily = 76; CurrentInstrCycles = 18; {{ uaecptr dataa = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword_prefetch(2)); BusCyclePenalty += 2; if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3732; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3732: ; return 18; } unsigned long REGPARAM2 CPUFUNC(op_e7f8_5)(uae_u32 opcode) /* ROLW */ { OpcodeFamily = 76; CurrentInstrCycles = 16; {{ uaecptr dataa = (uae_s32)(uae_s16)get_iword_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 4; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3733; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(4); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3733: ; return 16; } unsigned long REGPARAM2 CPUFUNC(op_e7f9_5)(uae_u32 opcode) /* ROLW */ { OpcodeFamily = 76; CurrentInstrCycles = 20; {{ uaecptr dataa = get_ilong_prefetch(2); if ((dataa & 1) != 0) { last_fault_for_exception_3 = dataa; last_op_for_exception_3 = opcode; last_addr_for_exception_3 = m68k_getpc() + 6; Exception(3, 0, M68000_EXC_SRC_CPU); goto endlabel3734; } {{ uae_s16 data = get_word(dataa); { uae_u16 val = data; uae_u32 carry = val & 0x8000; val <<= 1; if (carry) val |= 1; CLEAR_CZNV; SET_ZFLG (((uae_s16)(val)) == 0); SET_NFLG (((uae_s16)(val)) < 0); SET_CFLG (carry >> 15); m68k_incpc(6); fill_prefetch_0 (); put_word(dataa,val); }}}}}endlabel3734: ; return 20; } #endif

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