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Annotation of previous_trunk/src/cpu/cpummu.h, revision 1.1

1.1     ! root        1: /*
        !             2:  * cpummu.h - MMU emulation
        !             3:  *
        !             4:  * Copyright (c) 2001-2004 Milan Jurik of ARAnyM dev team (see AUTHORS)
        !             5:  * 
        !             6:  * Inspired by UAE MMU patch
        !             7:  *
        !             8:  * This file is part of the ARAnyM project which builds a new and powerful
        !             9:  * TOS/FreeMiNT compatible virtual machine running on almost any hardware.
        !            10:  *
        !            11:  * ARAnyM is free software; you can redistribute it and/or modify
        !            12:  * it under the terms of the GNU General Public License as published by
        !            13:  * the Free Software Foundation; either version 2 of the License, or
        !            14:  * (at your option) any later version.
        !            15:  *
        !            16:  * ARAnyM is distributed in the hope that it will be useful,
        !            17:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
        !            18:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
        !            19:  * GNU General Public License for more details.
        !            20:  *
        !            21:  * You should have received a copy of the GNU General Public License
        !            22:  * along with ARAnyM; if not, write to the Free Software
        !            23:  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
        !            24:  */
        !            25: 
        !            26: 
        !            27: #ifndef UAE_CPUMMU_H
        !            28: #define UAE_CPUMMU_H
        !            29: 
        !            30: //#include "uae/types.h"
        !            31: 
        !            32: #include "mmu_common.h"
        !            33: 
        !            34: #ifndef FULLMMU
        !            35: #define FULLMMU
        !            36: #endif
        !            37: 
        !            38: #define DUNUSED(x)
        !            39: #define D
        !            40: #if DEBUG
        !            41: #define bug write_log
        !            42: #else
        !            43: #define bug
        !            44: #endif
        !            45: 
        !            46: static __inline void flush_internals (void) { }
        !            47: 
        !            48: extern int mmu060_state;
        !            49: 
        !            50: extern int mmu040_movem;
        !            51: extern uaecptr mmu040_movem_ea;
        !            52: extern uae_u32 mmu040_move16[4];
        !            53: 
        !            54: extern bool mmu_pagesize_8k;
        !            55: extern uae_u16 mmu_opcode;
        !            56: extern bool mmu_restart;
        !            57: extern bool mmu_ttr_enabled;
        !            58: 
        !            59: //typedef uae_u8 flagtype;
        !            60: 
        !            61: //static m68k_exception except;
        !            62: 
        !            63: struct xttrx {
        !            64:     uae_u32 log_addr_base : 8;
        !            65:     uae_u32 log_addr_mask : 8;
        !            66:     uae_u32 enable : 1;
        !            67:     uae_u32 s_field : 2;
        !            68:     uae_u32 : 3;
        !            69:     uae_u32 usr1 : 1;
        !            70:     uae_u32 usr0 : 1;
        !            71:     uae_u32 : 1;
        !            72:     uae_u32 cmode : 2;
        !            73:     uae_u32 : 2;
        !            74:     uae_u32 write : 1;
        !            75:     uae_u32 : 2;
        !            76: };
        !            77: 
        !            78: struct mmusr_t {
        !            79:    uae_u32 phys_addr : 20;
        !            80:    uae_u32 bus_err : 1;
        !            81:    uae_u32 global : 1;
        !            82:    uae_u32 usr1 : 1;
        !            83:    uae_u32 usr0 : 1;
        !            84:    uae_u32 super : 1;
        !            85:    uae_u32 cmode : 2;
        !            86:    uae_u32 modif : 1;
        !            87:    uae_u32 : 1;
        !            88:    uae_u32 write : 1;
        !            89:    uae_u32 ttrhit : 1;
        !            90:    uae_u32 resident : 1;
        !            91: };
        !            92: 
        !            93: struct log_addr4 {
        !            94:    uae_u32 rif : 7;
        !            95:    uae_u32 pif : 7;
        !            96:    uae_u32 paif : 6;
        !            97:    uae_u32 poff : 12;
        !            98: };
        !            99: 
        !           100: struct log_addr8 {
        !           101:   uae_u32 rif : 7;
        !           102:   uae_u32 pif : 7;
        !           103:   uae_u32 paif : 5;
        !           104:   uae_u32 poff : 13;
        !           105: };
        !           106: 
        !           107: #define MMU_TEST_PTEST                                 1
        !           108: #define MMU_TEST_VERBOSE                               2
        !           109: #define MMU_TEST_FORCE_TABLE_SEARCH            4
        !           110: #define MMU_TEST_NO_BUSERR                             8
        !           111: 
        !           112: extern void mmu_dump_tables(void);
        !           113: 
        !           114: #define MMU_TTR_LOGICAL_BASE                           0xff000000
        !           115: #define MMU_TTR_LOGICAL_MASK                           0x00ff0000
        !           116: #define MMU_TTR_BIT_ENABLED                                    (1 << 15)
        !           117: #define MMU_TTR_BIT_SFIELD_ENABLED                     (1 << 14)
        !           118: #define MMU_TTR_BIT_SFIELD_SUPER                       (1 << 13)
        !           119: #define MMU_TTR_SFIELD_SHIFT                           13
        !           120: #define MMU_TTR_UX_MASK                                                ((1 << 9) | (1 << 8))
        !           121: #define MMU_TTR_UX_SHIFT                                       8
        !           122: #define MMU_TTR_CACHE_MASK                                     ((1 << 6) | (1 << 5))
        !           123: #define MMU_TTR_CACHE_SHIFT                                    5
        !           124: #define MMU_TTR_BIT_WRITE_PROTECT                      (1 << 2)
        !           125: 
        !           126: #define MMU_UDT_MASK   3
        !           127: #define MMU_PDT_MASK   3
        !           128: 
        !           129: #define MMU_DES_WP                     4
        !           130: #define MMU_DES_USED           8
        !           131: 
        !           132: /* page descriptors only */
        !           133: #define MMU_DES_MODIFIED       16
        !           134: #define MMU_DES_SUPER          (1 << 7)
        !           135: #define MMU_DES_GLOBAL         (1 << 10)
        !           136: 
        !           137: #define MMU_ROOT_PTR_ADDR_MASK                 0xfffffe00
        !           138: #define MMU_PTR_PAGE_ADDR_MASK_8               0xffffff80
        !           139: #define MMU_PTR_PAGE_ADDR_MASK_4               0xffffff00
        !           140: 
        !           141: #define MMU_PAGE_INDIRECT_MASK                 0xfffffffc
        !           142: #define MMU_PAGE_ADDR_MASK_8                   0xffffe000
        !           143: #define MMU_PAGE_ADDR_MASK_4                   0xfffff000
        !           144: #define MMU_PAGE_UR_MASK_8                             ((1 << 12) | (1 << 11))
        !           145: #define MMU_PAGE_UR_MASK_4                             (1 << 11)
        !           146: #define MMU_PAGE_UR_SHIFT                              11
        !           147: 
        !           148: #define MMU_MMUSR_ADDR_MASK                            0xfffff000
        !           149: #define MMU_MMUSR_B                                            (1 << 11)
        !           150: #define MMU_MMUSR_G                                            (1 << 10)
        !           151: #define MMU_MMUSR_U1                                   (1 << 9)
        !           152: #define MMU_MMUSR_U0                                   (1 << 8)
        !           153: #define MMU_MMUSR_Ux                                   (MMU_MMUSR_U1 | MMU_MMUSR_U0)
        !           154: #define MMU_MMUSR_S                                            (1 << 7)
        !           155: #define MMU_MMUSR_CM                                   ((1 << 6) | ( 1 << 5))
        !           156: #define MMU_MMUSR_M                                            (1 << 4)
        !           157: #define MMU_MMUSR_W                                            (1 << 2)
        !           158: #define MMU_MMUSR_T                                            (1 << 1)
        !           159: #define MMU_MMUSR_R                                            (1 << 0)
        !           160: 
        !           161: #define TTR_I0 4
        !           162: #define TTR_I1 5
        !           163: #define TTR_D0 6
        !           164: #define TTR_D1 7
        !           165: 
        !           166: #define TTR_NO_MATCH   0
        !           167: #define TTR_NO_WRITE   1
        !           168: #define TTR_OK_MATCH   2
        !           169: 
        !           170: struct mmu_atc_line {
        !           171:        uaecptr tag; // tag is 16 or 17 bits S+logical
        !           172:        uae_u32 valid;
        !           173:     uae_u32 status;
        !           174:        uaecptr phys; // phys base address
        !           175: };
        !           176: 
        !           177: /*
        !           178:  * 68040 ATC is a 4 way 16 slot associative address translation cache
        !           179:  * the 68040 has a DATA and an INSTRUCTION ATC.
        !           180:  * an ATC lookup may result in : a hit, a miss and a modified state.
        !           181:  * the 68060 can disable ATC allocation
        !           182:  * we must take care of 8k and 4k page size, index position is relative to page size
        !           183:  */
        !           184: 
        !           185: #define ATC_WAYS 4
        !           186: #define ATC_SLOTS 16
        !           187: #define ATC_TYPE 2
        !           188: 
        !           189: extern uae_u32 mmu_is_super;
        !           190: extern uae_u32 mmu_tagmask, mmu_pagemask;
        !           191: extern struct mmu_atc_line mmu_atc_array[ATC_TYPE][ATC_WAYS][ATC_SLOTS];
        !           192: 
        !           193: extern void mmu_tt_modified(void);
        !           194: extern int mmu_do_match_ttr(uae_u32 ttr, uaecptr addr, bool super);
        !           195: extern int mmu_match_ttr(uaecptr addr, bool super, bool data);
        !           196: extern int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool write);
        !           197: extern uaecptr mmu_translate(uaecptr addr, uae_u32 val, bool super, bool data, bool write, int size);
        !           198: 
        !           199: extern uae_u32 REGPARAM3 mmu060_get_rmw_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
        !           200: extern void REGPARAM3 mmu060_put_rmw_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
        !           201: 
        !           202: extern uae_u16 REGPARAM3 mmu_get_word_unaligned(uaecptr addr) REGPARAM;
        !           203: extern uae_u32 REGPARAM3 mmu_get_long_unaligned(uaecptr addr) REGPARAM;
        !           204: 
        !           205: extern uae_u32 REGPARAM3 mmu_get_ilong_unaligned(uaecptr addr) REGPARAM;
        !           206: 
        !           207: extern void REGPARAM3 mmu_put_word_unaligned(uaecptr addr, uae_u16 val) REGPARAM;
        !           208: extern void REGPARAM3 mmu_put_long_unaligned(uaecptr addr, uae_u32 val) REGPARAM;
        !           209: 
        !           210: extern void mmu_make_transparent_region(uaecptr baseaddr, uae_u32 size, int datamode);
        !           211: 
        !           212: #define FC_DATA                (regs.s ? 5 : 1)
        !           213: #define FC_INST                (regs.s ? 6 : 2)
        !           214: 
        !           215: extern void mmu_bus_error(uaecptr addr, uae_u32 val, int fc, bool write, int size, bool nonmmu);
        !           216: 
        !           217: extern uae_u32 REGPARAM3 sfc_get_long(uaecptr addr) REGPARAM;
        !           218: extern uae_u16 REGPARAM3 sfc_get_word(uaecptr addr) REGPARAM;
        !           219: extern uae_u8 REGPARAM3 sfc_get_byte(uaecptr addr) REGPARAM;
        !           220: extern void REGPARAM3 dfc_put_long(uaecptr addr, uae_u32 val) REGPARAM;
        !           221: extern void REGPARAM3 dfc_put_word(uaecptr addr, uae_u16 val) REGPARAM;
        !           222: extern void REGPARAM3 dfc_put_byte(uaecptr addr, uae_u8 val) REGPARAM;
        !           223: 
        !           224: #define sfc040_get_long sfc_get_long
        !           225: #define sfc040_get_word sfc_get_word
        !           226: #define sfc040_get_byte sfc_get_byte
        !           227: #define dfc040_put_long dfc_put_long
        !           228: #define dfc040_put_word dfc_put_word
        !           229: #define dfc040_put_byte dfc_put_byte
        !           230: 
        !           231: #define sfc060_get_long sfc_get_long
        !           232: #define sfc060_get_word sfc_get_word
        !           233: #define sfc060_get_byte sfc_get_byte
        !           234: #define dfc060_put_long dfc_put_long
        !           235: #define dfc060_put_word dfc_put_word
        !           236: #define dfc060_put_byte dfc_put_byte
        !           237: 
        !           238: extern void uae_mmu_put_lrmw (uaecptr addr, uae_u32 v, int size, int type);
        !           239: extern uae_u32 uae_mmu_get_lrmw (uaecptr addr, int size, int type);
        !           240: 
        !           241: extern void REGPARAM3 mmu_flush_atc(uaecptr addr, bool super, bool global) REGPARAM;
        !           242: extern void REGPARAM3 mmu_flush_atc_all(bool global) REGPARAM;
        !           243: extern void REGPARAM3 mmu_op_real(uae_u32 opcode, uae_u16 extra) REGPARAM;
        !           244: 
        !           245: extern void REGPARAM3 mmu_reset(void) REGPARAM;
        !           246: extern void REGPARAM3 mmu_set_funcs(void) REGPARAM;
        !           247: extern void REGPARAM3 mmu_set_tc(uae_u16 tc) REGPARAM;
        !           248: extern void REGPARAM3 mmu_set_super(bool super) REGPARAM;
        !           249: 
        !           250: static ALWAYS_INLINE uaecptr mmu_get_real_address(uaecptr addr, struct mmu_atc_line *cl)
        !           251: {
        !           252:     return cl->phys | (addr & mmu_pagemask);
        !           253: }
        !           254: 
        !           255: static ALWAYS_INLINE void mmu_get_move16(uaecptr addr, uae_u32 *v, int size)
        !           256: {
        !           257:     int i;
        !           258:     bool super = regs.s != 0;
        !           259:     addr &= ~15;
        !           260:     
        !           261:     if (mmu_match_ttr(addr,super,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           262:         addr = mmu_translate(addr, 0, super, true, false, size);
        !           263:     }
        !           264:     
        !           265:     for (i = 0; i < 4; i++) {
        !           266:         v[i] = phys_get_long(addr + i * 4);
        !           267:     }
        !           268: }
        !           269: 
        !           270: static ALWAYS_INLINE void mmu_put_move16(uaecptr addr, uae_u32 *v, int size)
        !           271: {
        !           272:     int i;
        !           273:     bool super = regs.s != 0;
        !           274:     addr &= ~15;
        !           275:     
        !           276:     if (mmu_match_ttr_write(addr,super,true,v[0],size,false) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           277:         addr = mmu_translate(addr, v[0], super, true, true, size);
        !           278:     }
        !           279:     
        !           280:     for (i = 0; i < 4; i++) {
        !           281:         phys_put_long(addr + i * 4, v[i]);
        !           282:     }
        !           283: }
        !           284: 
        !           285: static ALWAYS_INLINE uae_u32 mmu_get_ilong(uaecptr addr, int size)
        !           286: {
        !           287:     if (mmu_match_ttr(addr,regs.s!=0,false) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           288:         addr = mmu_translate(addr, 0, regs.s!=0, false, false, size);
        !           289:     }
        !           290:     return phys_get_long(addr);
        !           291: }
        !           292: 
        !           293: static ALWAYS_INLINE uae_u16 mmu_get_iword(uaecptr addr, int size)
        !           294: {
        !           295:     if (mmu_match_ttr(addr,regs.s!=0,false) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           296:         addr = mmu_translate(addr, 0, regs.s!=0, false, false, size);
        !           297:     }
        !           298:     return phys_get_word(addr);
        !           299: }
        !           300: 
        !           301: static ALWAYS_INLINE uae_u8 mmu_get_ibyte(uaecptr addr, int size)
        !           302: {
        !           303:     if (mmu_match_ttr(addr,regs.s!=0,false) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           304:         addr = mmu_translate(addr, 0, regs.s!=0, false, false, size);
        !           305:     }
        !           306:     return phys_get_byte(addr);
        !           307: }
        !           308: 
        !           309: static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, int size)
        !           310: {
        !           311:     if (mmu_match_ttr(addr,regs.s!=0,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           312:         addr = mmu_translate(addr, 0, regs.s!=0, true, false, size);
        !           313:     }
        !           314:     return phys_get_long(addr);
        !           315: }
        !           316: 
        !           317: static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, int size)
        !           318: {
        !           319:     if (mmu_match_ttr(addr,regs.s!=0,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           320:         addr = mmu_translate(addr, 0, regs.s!=0, true, false, size);
        !           321:     }
        !           322:     return phys_get_word(addr);
        !           323: }
        !           324: 
        !           325: static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, int size)
        !           326: {
        !           327:     if (mmu_match_ttr(addr,regs.s!=0,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           328:         addr = mmu_translate(addr, 0, regs.s!=0, true, false, size);
        !           329:     }
        !           330:     return phys_get_byte(addr);
        !           331: }
        !           332: 
        !           333: static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, int size)
        !           334: {
        !           335:     if (mmu_match_ttr_write(addr,regs.s!=0,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           336:         addr = mmu_translate(addr, val, regs.s!=0, true, true, size);
        !           337:     }
        !           338:     phys_put_long(addr, val);
        !           339: }
        !           340: 
        !           341: static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, int size)
        !           342: {
        !           343:     if (mmu_match_ttr_write(addr,regs.s!=0,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           344:         addr = mmu_translate(addr, val, regs.s!=0, true, true, size);
        !           345:     }
        !           346:     phys_put_word(addr, val);
        !           347: }
        !           348: 
        !           349: static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, int size)
        !           350: {
        !           351:     if (mmu_match_ttr_write(addr,regs.s!=0,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           352:         addr = mmu_translate(addr, val, regs.s!=0, true, true, size);
        !           353:     }
        !           354:     phys_put_byte(addr, val);
        !           355: }
        !           356: 
        !           357: static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool write, int size)
        !           358: {
        !           359:     if (mmu_match_ttr_write(addr,super,true,0,size,write) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           360:         addr = mmu_translate(addr, 0, super, true, write, size);
        !           361:     }
        !           362:     return phys_get_long(addr);
        !           363: }
        !           364: 
        !           365: static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool write, int size)
        !           366: {
        !           367:     if (mmu_match_ttr_write(addr,super,true,0,size,write) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           368:         addr = mmu_translate(addr, 0, super, true, write, size);
        !           369:     }
        !           370:     return phys_get_word(addr);
        !           371: }
        !           372: 
        !           373: static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool write, int size)
        !           374: {
        !           375:     if (mmu_match_ttr_write(addr,super,true,0,size,write) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           376:         addr = mmu_translate(addr, 0, super, true, write, size);
        !           377:     }
        !           378:     return phys_get_byte(addr);
        !           379: }
        !           380: 
        !           381: static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool super, int size)
        !           382: {
        !           383:     if (mmu_match_ttr_write(addr,super,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           384:         addr = mmu_translate(addr, val, super, true, true, size);
        !           385:     }
        !           386:     phys_put_long(addr, val);
        !           387: }
        !           388: 
        !           389: static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool super, int size)
        !           390: {
        !           391:     if (mmu_match_ttr_write(addr,super,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           392:         addr = mmu_translate(addr, val, super, true, true, size);
        !           393:     }
        !           394:     phys_put_word(addr, val);
        !           395: }
        !           396: 
        !           397: static ALWAYS_INLINE void mmu_put_user_byte(uaecptr addr, uae_u8 val, bool super, int size)
        !           398: {    
        !           399:     if (mmu_match_ttr_write(addr,super,true,val,size,true) == TTR_NO_MATCH && regs.mmu_enabled) {
        !           400:         addr = mmu_translate(addr, val, super, true, true, size);
        !           401:     }
        !           402:     phys_put_byte(addr, val);
        !           403: }
        !           404: 
        !           405: 
        !           406: static ALWAYS_INLINE void HWput_l(uaecptr addr, uae_u32 l)
        !           407: {
        !           408:     put_long (addr, l);
        !           409: }
        !           410: static ALWAYS_INLINE void HWput_w(uaecptr addr, uae_u32 w)
        !           411: {
        !           412:     put_word (addr, w);
        !           413: }
        !           414: static ALWAYS_INLINE void HWput_b(uaecptr addr, uae_u32 b)
        !           415: {
        !           416:     put_byte (addr, b);
        !           417: }
        !           418: static ALWAYS_INLINE uae_u32 HWget_l(uaecptr addr)
        !           419: {
        !           420:     return get_long (addr);
        !           421: }
        !           422: static ALWAYS_INLINE uae_u32 HWget_w(uaecptr addr)
        !           423: {
        !           424:     return get_word (addr);
        !           425: }
        !           426: static ALWAYS_INLINE uae_u32 HWget_b(uaecptr addr)
        !           427: {
        !           428:     return get_byte (addr);
        !           429: }
        !           430: 
        !           431: static ALWAYS_INLINE uae_u32 uae_mmu040_get_ilong(uaecptr addr)
        !           432: {
        !           433:        if (unlikely(is_unaligned(addr, 4)))
        !           434:                return mmu_get_ilong_unaligned(addr);
        !           435:        return mmu_get_ilong(addr, sz_long);
        !           436: }
        !           437: static ALWAYS_INLINE uae_u16 uae_mmu040_get_iword(uaecptr addr)
        !           438: {
        !           439:        return mmu_get_iword(addr, sz_word);
        !           440: }
        !           441: static ALWAYS_INLINE uae_u16 uae_mmu040_get_ibyte(uaecptr addr)
        !           442: {
        !           443:        return mmu_get_ibyte(addr, sz_byte);
        !           444: }
        !           445: static ALWAYS_INLINE uae_u32 uae_mmu040_get_long(uaecptr addr)
        !           446: {
        !           447:        if (unlikely(is_unaligned(addr, 4)))
        !           448:                return mmu_get_long_unaligned(addr);
        !           449:        return mmu_get_long(addr, sz_long);
        !           450: }
        !           451: static ALWAYS_INLINE uae_u16 uae_mmu040_get_word(uaecptr addr)
        !           452: {
        !           453:        if (unlikely(is_unaligned(addr, 2)))
        !           454:                return mmu_get_word_unaligned(addr);
        !           455:        return mmu_get_word(addr, sz_word);
        !           456: }
        !           457: static ALWAYS_INLINE uae_u8 uae_mmu040_get_byte(uaecptr addr)
        !           458: {
        !           459:        return mmu_get_byte(addr, sz_byte);
        !           460: }
        !           461: 
        !           462: static ALWAYS_INLINE void uae_mmu040_put_word(uaecptr addr, uae_u16 val)
        !           463: {
        !           464:        if (unlikely(is_unaligned(addr, 2)))
        !           465:                mmu_put_word_unaligned(addr, val);
        !           466:        else
        !           467:                mmu_put_word(addr, val, sz_word);
        !           468: }
        !           469: static ALWAYS_INLINE void uae_mmu040_put_byte(uaecptr addr, uae_u8 val)
        !           470: {
        !           471:        mmu_put_byte(addr, val, sz_byte);
        !           472: }
        !           473: static ALWAYS_INLINE void uae_mmu040_put_long(uaecptr addr, uae_u32 val)
        !           474: {
        !           475:        if (unlikely(is_unaligned(addr, 4)))
        !           476:                mmu_put_long_unaligned(addr, val);
        !           477:        else
        !           478:                mmu_put_long(addr, val, sz_long);
        !           479: }
        !           480: 
        !           481: 
        !           482: static ALWAYS_INLINE void uae_mmu_get_move16(uaecptr addr, uae_u32 *val)
        !           483: {
        !           484:        // move16 is always aligned
        !           485:        mmu_get_move16(addr, val, 16);
        !           486: }
        !           487: static ALWAYS_INLINE void uae_mmu_put_move16(uaecptr addr, uae_u32 *val)
        !           488: {
        !           489:        // move16 is always aligned
        !           490:        mmu_put_move16(addr, val, 16);
        !           491: }
        !           492: 
        !           493: // normal 040
        !           494: STATIC_INLINE void put_byte_mmu040 (uaecptr addr, uae_u32 v)
        !           495: {
        !           496:     uae_mmu040_put_byte (addr, v);
        !           497: }
        !           498: STATIC_INLINE void put_word_mmu040 (uaecptr addr, uae_u32 v)
        !           499: {
        !           500:     uae_mmu040_put_word (addr, v);
        !           501: }
        !           502: STATIC_INLINE void put_long_mmu040 (uaecptr addr, uae_u32 v)
        !           503: {
        !           504:     uae_mmu040_put_long (addr, v);
        !           505: }
        !           506: STATIC_INLINE uae_u32 get_byte_mmu040 (uaecptr addr)
        !           507: {
        !           508:     return uae_mmu040_get_byte (addr);
        !           509: }
        !           510: STATIC_INLINE uae_u32 get_word_mmu040 (uaecptr addr)
        !           511: {
        !           512:     return uae_mmu040_get_word (addr);
        !           513: }
        !           514: STATIC_INLINE uae_u32 get_long_mmu040 (uaecptr addr)
        !           515: {
        !           516:     return uae_mmu040_get_long (addr);
        !           517: }
        !           518: STATIC_INLINE void get_move16_mmu (uaecptr addr, uae_u32 *v)
        !           519: {
        !           520:     uae_mmu_get_move16 (addr, v);
        !           521: }
        !           522: STATIC_INLINE void put_move16_mmu (uaecptr addr, uae_u32 *v)
        !           523: {
        !           524:     uae_mmu_put_move16 (addr, v);
        !           525: }
        !           526: 
        !           527: // locked rmw 060
        !           528: STATIC_INLINE void put_lrmw_byte_mmu060 (uaecptr addr, uae_u32 v)
        !           529: {
        !           530:     uae_mmu_put_lrmw (addr, v, sz_byte, 1);
        !           531: }
        !           532: STATIC_INLINE void put_lrmw_word_mmu060 (uaecptr addr, uae_u32 v)
        !           533: {
        !           534:     uae_mmu_put_lrmw (addr, v, sz_word, 1);
        !           535: }
        !           536: STATIC_INLINE void put_lrmw_long_mmu060 (uaecptr addr, uae_u32 v)
        !           537: {
        !           538:     uae_mmu_put_lrmw (addr, v, sz_long, 1);
        !           539: }
        !           540: STATIC_INLINE uae_u32 get_lrmw_byte_mmu060 (uaecptr addr)
        !           541: {
        !           542:     return uae_mmu_get_lrmw (addr, sz_byte, 1);
        !           543: }
        !           544: STATIC_INLINE uae_u32 get_lrmw_word_mmu060 (uaecptr addr)
        !           545: {
        !           546:     return uae_mmu_get_lrmw (addr, sz_word, 1);
        !           547: }
        !           548: STATIC_INLINE uae_u32 get_lrmw_long_mmu060 (uaecptr addr)
        !           549: {
        !           550:     return uae_mmu_get_lrmw (addr, sz_long, 1);
        !           551: }
        !           552: 
        !           553: // locked rmw 040
        !           554: STATIC_INLINE void put_lrmw_byte_mmu040 (uaecptr addr, uae_u32 v)
        !           555: {
        !           556:     uae_mmu_put_lrmw (addr, v, sz_byte, 0);
        !           557: }
        !           558: STATIC_INLINE void put_lrmw_word_mmu040 (uaecptr addr, uae_u32 v)
        !           559: {
        !           560:     uae_mmu_put_lrmw (addr, v, sz_word, 0);
        !           561: }
        !           562: STATIC_INLINE void put_lrmw_long_mmu040 (uaecptr addr, uae_u32 v)
        !           563: {
        !           564:     uae_mmu_put_lrmw (addr, v, sz_long, 0);
        !           565: }
        !           566: STATIC_INLINE uae_u32 get_lrmw_byte_mmu040 (uaecptr addr)
        !           567: {
        !           568:     return uae_mmu_get_lrmw (addr, sz_byte, 0);
        !           569: }
        !           570: STATIC_INLINE uae_u32 get_lrmw_word_mmu040 (uaecptr addr)
        !           571: {
        !           572:     return uae_mmu_get_lrmw (addr, sz_word, 0);
        !           573: }
        !           574: STATIC_INLINE uae_u32 get_lrmw_long_mmu040 (uaecptr addr)
        !           575: {
        !           576:     return uae_mmu_get_lrmw (addr, sz_long, 0);
        !           577: }
        !           578: 
        !           579: STATIC_INLINE uae_u32 get_ibyte_mmu040 (int o)
        !           580: {
        !           581:     uae_u32 pc = m68k_getpci () + o;
        !           582:     return uae_mmu040_get_iword (pc);
        !           583: }
        !           584: STATIC_INLINE uae_u32 get_iword_mmu040 (int o)
        !           585: {
        !           586:     uae_u32 pc = m68k_getpci () + o;
        !           587:     return uae_mmu040_get_iword (pc);
        !           588: }
        !           589: STATIC_INLINE uae_u32 get_ilong_mmu040 (int o)
        !           590: {
        !           591:     uae_u32 pc = m68k_getpci () + o;
        !           592:     return uae_mmu040_get_ilong (pc);
        !           593: }
        !           594: STATIC_INLINE uae_u32 next_iword_mmu040 (void)
        !           595: {
        !           596:     uae_u32 pc = m68k_getpci ();
        !           597:     m68k_incpci (2);
        !           598:     return uae_mmu040_get_iword (pc);
        !           599: }
        !           600: STATIC_INLINE uae_u32 next_ilong_mmu040 (void)
        !           601: {
        !           602:     uae_u32 pc = m68k_getpci ();
        !           603:     m68k_incpci (4);
        !           604:     return uae_mmu040_get_ilong (pc);
        !           605: }
        !           606: 
        !           607: extern void flush_mmu040 (uaecptr, int);
        !           608: extern void m68k_do_rts_mmu040 (void);
        !           609: extern void m68k_do_rte_mmu040 (uaecptr a7);
        !           610: extern void m68k_do_bsr_mmu040 (uaecptr oldpc, uae_s32 offset);
        !           611: 
        !           612: extern void flush_mmu060 (uaecptr, int);
        !           613: extern void m68k_do_rts_mmu060 (void);
        !           614: extern void m68k_do_rte_mmu060 (uaecptr a7);
        !           615: extern void m68k_do_bsr_mmu060 (uaecptr oldpc, uae_s32 offset);
        !           616: 
        !           617: #endif /* UAE_CPUMMU_H */

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