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1.1 ! root 1: /* ! 2: * UAE - The Un*x Amiga Emulator - CPU core ! 3: * ! 4: * Memory management ! 5: * ! 6: * (c) 1995 Bernd Schmidt ! 7: * ! 8: * Adaptation to Hatari by Thomas Huth ! 9: * Adaptation to Previous by Andreas Grabher ! 10: * ! 11: * This file is distributed under the GNU Public License, version 2 or at ! 12: * your option any later version. Read the file gpl.txt for details. ! 13: */ ! 14: const char Memory_fileid[] = "Previous memory.c : " __DATE__ " " __TIME__; ! 15: ! 16: #include "config.h" ! 17: #include "sysdeps.h" ! 18: #include "hatari-glue.h" ! 19: #include "maccess.h" ! 20: #include "memory.h" ! 21: ! 22: #include "main.h" ! 23: #include "ioMem.h" ! 24: #include "bmap.h" ! 25: #include "tmc.h" ! 26: #include "nbic.h" ! 27: #include "reset.h" ! 28: #include "nextMemory.h" ! 29: #include "m68000.h" ! 30: #include "configuration.h" ! 31: #include "NextBus.hpp" ! 32: ! 33: #include "newcpu.h" ! 34: ! 35: ! 36: /* Set illegal_mem to 1 for debug output: */ ! 37: #define illegal_mem 1 ! 38: ! 39: #define illegal_trace(s) {static int count=0; if (count++<50) { s; }} ! 40: ! 41: /* ! 42: * NeXT memory map (example for 68030 NeXT Computer) ! 43: * ! 44: * Local bus: ! 45: * 0x00000000 - 0x0001FFFF: ROM ! 46: * 0x01000000 - 0x0101FFFF: ROM mirror ! 47: * ! 48: * 0x02000000 - 0x020FFFFF: Device space ! 49: * ! 50: * 0x04000000 - 0x04FFFFFF: RAM bank 0 ! 51: * 0x05000000 - 0x05FFFFFF: RAM bank 1 ! 52: * 0x06000000 - 0x06FFFFFF: RAM bank 2 ! 53: * 0x07000000 - 0x07FFFFFF: RAM bank 3 ! 54: * ! 55: * 0x0B000000 - 0x0B03FFFF: VRAM ! 56: * ! 57: * 0x0C000000 - 0x0C03FFFF: VRAM mirror for MWF0 ! 58: * 0x0D000000 - 0x0D03FFFF: VRAM mirror for MWF1 ! 59: * 0x0E000000 - 0x0E03FFFF: VRAM mirror for MWF2 ! 60: * 0x0F000000 - 0x0F03FFFF: VRAM mirror for MWF3 ! 61: * ! 62: * 0x10000000 - 0x13FFFFFF: RAM mirror for MWF0 ! 63: * 0x14000000 - 0x17FFFFFF: RAM mirror for MWF1 ! 64: * 0x18000000 - 0x1BFFFFFF: RAM mirror for MWF2 ! 65: * 0x1C000000 - 0x1FFFFFFF: RAM mirror for MWF3 ! 66: * ! 67: * NeXTbus: (Note: Boards can be configured to occupy 2 slots) ! 68: * 0x00000000 - 0x1FFFFFFF: NeXTbus board space for slot 0 ! 69: * 0x20000000 - 0x3FFFFFFF: NeXTbus board space for slot 2 ! 70: * 0x40000000 - 0x5FFFFFFF: NeXTbus board space for slot 4 ! 71: * 0x60000000 - 0x7FFFFFFF: NeXTbus board space for slot 6 ! 72: * ! 73: * 0xF0000000 - 0xF0FFFFFF: NeXTbus slot space for slot 0 ! 74: * 0xF2000000 - 0xF2FFFFFF: NeXTbus slot space for slot 2 ! 75: * 0xF4000000 - 0xF4FFFFFF: NeXTbus slot space for slot 4 ! 76: * 0xF6000000 - 0xF6FFFFFF: NeXTbus slot space for slot 6 ! 77: */ ! 78: ! 79: ! 80: /* ROM */ ! 81: #define NEXT_EPROM_START 0x00000000 ! 82: #define NEXT_EPROM_DIAG_START 0x01000000 ! 83: #define NEXT_EPROM_BMAP_START 0x01000000 ! 84: #define NEXT_EPROM_SIZE 0x00020000 ! 85: #define NEXT_EPROM_MASK 0x0001FFFF ! 86: ! 87: /* Main memory */ ! 88: #define NEXT_RAM_START 0x04000000 ! 89: ! 90: #define N_BANKS 4 ! 91: #define NEXT_RAM_BANK_MAX 0x01000000 ! 92: #define NEXT_RAM_BANK_MAX_C 0x00800000 ! 93: #define NEXT_RAM_BANK_MAX_T 0x02000000 ! 94: ! 95: #define NEXT_RAM_BANK_SEL 0x03000000 ! 96: #define NEXT_RAM_BANK_SEL_C 0x01800000 ! 97: #define NEXT_RAM_BANK_SEL_T 0x06000000 ! 98: ! 99: uae_u32 NEXT_ram_bank_size; ! 100: uae_u32 NEXT_ram_bank_mask; ! 101: uae_u32 NEXT_ram_bank0_mask; ! 102: uae_u32 NEXT_ram_bank1_mask; ! 103: uae_u32 NEXT_ram_bank2_mask; ! 104: uae_u32 NEXT_ram_bank3_mask; ! 105: ! 106: /* Main memory with memory write functions */ ! 107: #define NEXT_RAM_MWF0_START 0x10000000 ! 108: #define NEXT_RAM_MWF1_START 0x14000000 ! 109: #define NEXT_RAM_MWF2_START 0x18000000 ! 110: #define NEXT_RAM_MWF3_START 0x1C000000 ! 111: ! 112: /* VRAM monochrome */ ! 113: #define NEXT_VRAM_START 0x0B000000 ! 114: #define NEXT_VRAM_SIZE 0x00040000 ! 115: #define NEXT_VRAM_MASK 0x0003FFFF ! 116: ! 117: /* VRAM monochrome with memory write functions */ ! 118: #define NEXT_VRAM_MWF0_START 0x0C000000 ! 119: #define NEXT_VRAM_MWF1_START 0x0D000000 ! 120: #define NEXT_VRAM_MWF2_START 0x0E000000 ! 121: #define NEXT_VRAM_MWF3_START 0x0F000000 ! 122: ! 123: /* VRAM color */ ! 124: #define NEXT_VRAM_COLOR_START 0x2C000000 ! 125: #define NEXT_VRAM_COLOR_SIZE 0x00200000 ! 126: #define NEXT_VRAM_COLOR_MASK 0x001FFFFF ! 127: ! 128: /* VRAM turbo monochrome and color */ ! 129: #define NEXT_VRAM_TURBO_START 0x0C000000 ! 130: ! 131: /* IO memory */ ! 132: #define NEXT_IO_START 0x02000000 ! 133: #define NEXT_IO_BMAP_START 0x02100000 ! 134: #define NEXT_IO_TMC_START 0x02200000 ! 135: #define NEXT_IO_SIZE 0x00020000 ! 136: #define NEXT_IO_MASK 0x0001FFFF ! 137: ! 138: #define NEXT_BMAP_START 0x020C0000 ! 139: #define NEXT_BMAP_SIZE 0x00000040 ! 140: #define NEXT_BMAP_MASK 0x0000003F ! 141: ! 142: #define NEXT_BMAP_MAP_SIZE 0x00010000 ! 143: ! 144: #define NEXT_NBIC_START 0x02020000 ! 145: #define NEXT_NBIC_SIZE 0x00000008 ! 146: #define NEXT_NBIC_MASK 0x00000007 ! 147: ! 148: #define NEXT_NBIC_MAP_SIZE 0x00010000 ! 149: ! 150: /* Cache memory for nitro systems */ ! 151: #define NEXT_CACHE_TAG_START 0x03E00000 ! 152: #define NEXT_CACHE_TAG_SIZE 0x00100000 ! 153: #define NEXT_CACHE_TAG_MASK 0x000FFFFF ! 154: ! 155: #define NEXT_CACHE_START 0x03F00000 ! 156: #define NEXT_CACHE_SIZE 0x00100000 ! 157: #define NEXT_CACHE_MASK 0x000FFFFF ! 158: ! 159: /* NeXTbus slot memory space */ ! 160: #define NEXTBUS_SLOT_START(x) (0xF0000000|((x)<<24)) ! 161: #define NEXTBUS_SLOT_SIZE 0x01000000 ! 162: #define NEXTBUS_SLOT_MASK 0x00FFFFFF ! 163: ! 164: /* NeXTbus board memory space */ ! 165: #define NEXTBUS_BOARD_START(x) ((x)<<28) ! 166: #define NEXTBUS_BOARD_SIZE 0x10000000 ! 167: #define NEXTBUS_BOARD_MASK 0x0FFFFFFF ! 168: ! 169: ! 170: uae_u8 NEXTVideo[256*1024]; ! 171: ! 172: uae_u8 NEXTColorVideo[2*1024*1024]; ! 173: ! 174: ! 175: #ifdef SAVE_MEMORY_BANKS ! 176: addrbank *mem_banks[65536]; ! 177: #else ! 178: addrbank mem_banks[65536]; ! 179: #endif ! 180: ! 181: #ifdef NO_INLINE_MEMORY_ACCESS ! 182: __inline__ uae_u32 longget (uaecptr addr) ! 183: { ! 184: return call_mem_get_func (get_mem_bank (addr).lget, addr); ! 185: } ! 186: __inline__ uae_u32 wordget (uaecptr addr) ! 187: { ! 188: return call_mem_get_func (get_mem_bank (addr).wget, addr); ! 189: } ! 190: __inline__ uae_u32 byteget (uaecptr addr) ! 191: { ! 192: return call_mem_get_func (get_mem_bank (addr).bget, addr); ! 193: } ! 194: __inline__ void longput (uaecptr addr, uae_u32 l) ! 195: { ! 196: call_mem_put_func (get_mem_bank (addr).lput, addr, l); ! 197: } ! 198: __inline__ void wordput (uaecptr addr, uae_u32 w) ! 199: { ! 200: call_mem_put_func (get_mem_bank (addr).wput, addr, w); ! 201: } ! 202: __inline__ void byteput (uaecptr addr, uae_u32 b) ! 203: { ! 204: call_mem_put_func (get_mem_bank (addr).bput, addr, b); ! 205: } ! 206: #endif ! 207: ! 208: ! 209: /* Some prototypes: */ ! 210: void SDL_Quit(void); ! 211: ! 212: uae_u8 ce_cachable[65536]; ! 213: ! 214: ! 215: /* **** A dummy bank that only contains zeros **** */ ! 216: ! 217: static uae_u32 dummy_lget(uaecptr addr) ! 218: { ! 219: illegal_trace(write_log ("Illegal lget at %08lx PC=%08x\n", (long)addr,m68k_getpc())); ! 220: return 0; ! 221: } ! 222: ! 223: static uae_u32 dummy_wget(uaecptr addr) ! 224: { ! 225: illegal_trace(write_log ("Illegal wget at %08lx PC=%08x\n", (long)addr,m68k_getpc())); ! 226: return 0; ! 227: } ! 228: ! 229: static uae_u32 dummy_bget(uaecptr addr) ! 230: { ! 231: illegal_trace(write_log ("Illegal bget at %08lx PC=%08x\n", (long)addr,m68k_getpc())); ! 232: return 0; ! 233: } ! 234: ! 235: static void dummy_lput(uaecptr addr, uae_u32 l) ! 236: { ! 237: illegal_trace(write_log ("Illegal lput at %08lx PC=%08x\n", (long)addr,m68k_getpc())); ! 238: } ! 239: ! 240: static void dummy_wput(uaecptr addr, uae_u32 w) ! 241: { ! 242: illegal_trace(write_log ("Illegal wput at %08lx PC=%08x\n", (long)addr,m68k_getpc())); ! 243: } ! 244: ! 245: static void dummy_bput(uaecptr addr, uae_u32 b) ! 246: { ! 247: illegal_trace(write_log ("Illegal bput at %08lx PC=%08x\n", (long)addr,m68k_getpc())); ! 248: } ! 249: ! 250: ! 251: /* **** This memory bank only generates bus errors **** */ ! 252: ! 253: static uae_u32 BusErrMem_lget(uaecptr addr) ! 254: { ! 255: if (illegal_mem) ! 256: write_log ("Bus error lget at %08lx\n", (long)addr); ! 257: ! 258: M68000_BusError(addr, 1); ! 259: return 0; ! 260: } ! 261: ! 262: static uae_u32 BusErrMem_wget(uaecptr addr) ! 263: { ! 264: if (illegal_mem) ! 265: write_log ("Bus error wget at %08lx\n", (long)addr); ! 266: ! 267: M68000_BusError(addr, 1); ! 268: return 0; ! 269: } ! 270: ! 271: static uae_u32 BusErrMem_bget(uaecptr addr) ! 272: { ! 273: if (illegal_mem) ! 274: write_log ("Bus error bget at %08lx\n", (long)addr); ! 275: ! 276: M68000_BusError(addr, 1); ! 277: return 0; ! 278: } ! 279: ! 280: static void BusErrMem_lput(uaecptr addr, uae_u32 l) ! 281: { ! 282: if (illegal_mem) ! 283: write_log ("Bus error lput at %08lx\n", (long)addr); ! 284: ! 285: M68000_BusError(addr, 0); ! 286: } ! 287: ! 288: static void BusErrMem_wput(uaecptr addr, uae_u32 w) ! 289: { ! 290: if (illegal_mem) ! 291: write_log ("Bus error wput at %08lx\n", (long)addr); ! 292: ! 293: M68000_BusError(addr, 0); ! 294: } ! 295: ! 296: static void BusErrMem_bput(uaecptr addr, uae_u32 b) ! 297: { ! 298: if (illegal_mem) ! 299: write_log ("Bus error bput at %08lx\n", (long)addr); ! 300: ! 301: M68000_BusError(addr, 0); ! 302: } ! 303: ! 304: ! 305: /* **** ROM memory **** */ ! 306: ! 307: extern int SCR_ROM_overlay; ! 308: ! 309: uae_u8 *ROMmemory; ! 310: ! 311: static uae_u32 mem_rom_lget(uaecptr addr) ! 312: { ! 313: // if ((addr<0x2000) && (SCR_ROM_overlay)) {do_get_mem_long(NEXTRam + 0x03FFE000 +addr);} ! 314: addr &= NEXT_EPROM_MASK; ! 315: return do_get_mem_long(ROMmemory + addr); ! 316: } ! 317: ! 318: static uae_u32 mem_rom_wget(uaecptr addr) ! 319: { ! 320: // if ((addr<0x2000) && (SCR_ROM_overlay)) {do_get_mem_word(NEXTRam + 0x03FFE000 +addr);} ! 321: addr &= NEXT_EPROM_MASK; ! 322: return do_get_mem_word(ROMmemory + addr); ! 323: ! 324: } ! 325: ! 326: static uae_u32 mem_rom_bget(uaecptr addr) ! 327: { ! 328: // if ((addr<0x2000) && (SCR_ROM_overlay)) {return NEXTRam[0x03FFE000 +addr];} ! 329: addr &= NEXT_EPROM_MASK; ! 330: return ROMmemory[addr]; ! 331: } ! 332: ! 333: static void mem_rom_lput(uaecptr addr, uae_u32 b) ! 334: { ! 335: illegal_trace(write_log ("Illegal ROMmem lput at %08lx\n", (long)addr)); ! 336: M68000_BusError(addr, 0); ! 337: } ! 338: ! 339: static void mem_rom_wput(uaecptr addr, uae_u32 b) ! 340: { ! 341: illegal_trace(write_log ("Illegal ROMmem wput at %08lx\n", (long)addr)); ! 342: M68000_BusError(addr, 0); ! 343: } ! 344: ! 345: static void mem_rom_bput(uaecptr addr, uae_u32 b) ! 346: { ! 347: illegal_trace(write_log ("Illegal ROMmem bput at %08lx\n", (long)addr)); ! 348: M68000_BusError(addr, 0); ! 349: } ! 350: ! 351: ! 352: /* **** NEXT RAM memory **** */ ! 353: ! 354: static uae_u32 mem_ram_bank0_lget(uaecptr addr) ! 355: { ! 356: addr &= NEXT_ram_bank0_mask; ! 357: return do_get_mem_long(NEXTRam + addr); ! 358: } ! 359: ! 360: static uae_u32 mem_ram_bank0_wget(uaecptr addr) ! 361: { ! 362: addr &= NEXT_ram_bank0_mask; ! 363: return do_get_mem_word(NEXTRam + addr); ! 364: } ! 365: ! 366: static uae_u32 mem_ram_bank0_bget(uaecptr addr) ! 367: { ! 368: addr &= NEXT_ram_bank0_mask; ! 369: return NEXTRam[addr]; ! 370: } ! 371: ! 372: static void mem_ram_bank0_lput(uaecptr addr, uae_u32 l) ! 373: { ! 374: addr &= NEXT_ram_bank0_mask; ! 375: do_put_mem_long(NEXTRam + addr, l); ! 376: } ! 377: ! 378: static void mem_ram_bank0_wput(uaecptr addr, uae_u32 w) ! 379: { ! 380: addr &= NEXT_ram_bank0_mask; ! 381: do_put_mem_word(NEXTRam + addr, w); ! 382: } ! 383: ! 384: static void mem_ram_bank0_bput(uaecptr addr, uae_u32 b) ! 385: { ! 386: addr &= NEXT_ram_bank0_mask; ! 387: NEXTRam[addr] = b; ! 388: } ! 389: ! 390: ! 391: static uae_u32 mem_ram_bank1_lget(uaecptr addr) ! 392: { ! 393: addr &= NEXT_ram_bank1_mask; ! 394: return do_get_mem_long(NEXTRam + addr); ! 395: } ! 396: ! 397: static uae_u32 mem_ram_bank1_wget(uaecptr addr) ! 398: { ! 399: addr &= NEXT_ram_bank1_mask; ! 400: return do_get_mem_word(NEXTRam + addr); ! 401: } ! 402: ! 403: static uae_u32 mem_ram_bank1_bget(uaecptr addr) ! 404: { ! 405: addr &= NEXT_ram_bank1_mask; ! 406: return NEXTRam[addr]; ! 407: } ! 408: ! 409: static void mem_ram_bank1_lput(uaecptr addr, uae_u32 l) ! 410: { ! 411: addr &= NEXT_ram_bank1_mask; ! 412: do_put_mem_long(NEXTRam + addr, l); ! 413: } ! 414: ! 415: static void mem_ram_bank1_wput(uaecptr addr, uae_u32 w) ! 416: { ! 417: addr &= NEXT_ram_bank1_mask; ! 418: do_put_mem_word(NEXTRam + addr, w); ! 419: } ! 420: ! 421: static void mem_ram_bank1_bput(uaecptr addr, uae_u32 b) ! 422: { ! 423: addr &= NEXT_ram_bank1_mask; ! 424: NEXTRam[addr] = b; ! 425: } ! 426: ! 427: ! 428: static uae_u32 mem_ram_bank2_lget(uaecptr addr) ! 429: { ! 430: addr &= NEXT_ram_bank2_mask; ! 431: return do_get_mem_long(NEXTRam + addr); ! 432: } ! 433: ! 434: static uae_u32 mem_ram_bank2_wget(uaecptr addr) ! 435: { ! 436: addr &= NEXT_ram_bank2_mask; ! 437: return do_get_mem_word(NEXTRam + addr); ! 438: } ! 439: ! 440: static uae_u32 mem_ram_bank2_bget(uaecptr addr) ! 441: { ! 442: addr &= NEXT_ram_bank2_mask; ! 443: return NEXTRam[addr]; ! 444: } ! 445: ! 446: static void mem_ram_bank2_lput(uaecptr addr, uae_u32 l) ! 447: { ! 448: addr &= NEXT_ram_bank2_mask; ! 449: do_put_mem_long(NEXTRam + addr, l); ! 450: } ! 451: ! 452: static void mem_ram_bank2_wput(uaecptr addr, uae_u32 w) ! 453: { ! 454: addr &= NEXT_ram_bank2_mask; ! 455: do_put_mem_word(NEXTRam + addr, w); ! 456: } ! 457: ! 458: static void mem_ram_bank2_bput(uaecptr addr, uae_u32 b) ! 459: { ! 460: addr &= NEXT_ram_bank2_mask; ! 461: NEXTRam[addr] = b; ! 462: } ! 463: ! 464: ! 465: static uae_u32 mem_ram_bank3_lget(uaecptr addr) ! 466: { ! 467: addr &= NEXT_ram_bank3_mask; ! 468: return do_get_mem_long(NEXTRam + addr); ! 469: } ! 470: ! 471: static uae_u32 mem_ram_bank3_wget(uaecptr addr) ! 472: { ! 473: addr &= NEXT_ram_bank3_mask; ! 474: return do_get_mem_word(NEXTRam + addr); ! 475: } ! 476: ! 477: static uae_u32 mem_ram_bank3_bget(uaecptr addr) ! 478: { ! 479: addr &= NEXT_ram_bank3_mask; ! 480: return NEXTRam[addr]; ! 481: } ! 482: ! 483: static void mem_ram_bank3_lput(uaecptr addr, uae_u32 l) ! 484: { ! 485: addr &= NEXT_ram_bank3_mask; ! 486: do_put_mem_long(NEXTRam + addr, l); ! 487: } ! 488: ! 489: static void mem_ram_bank3_wput(uaecptr addr, uae_u32 w) ! 490: { ! 491: addr &= NEXT_ram_bank3_mask; ! 492: do_put_mem_word(NEXTRam + addr, w); ! 493: } ! 494: ! 495: static void mem_ram_bank3_bput(uaecptr addr, uae_u32 b) ! 496: { ! 497: addr &= NEXT_ram_bank3_mask; ! 498: NEXTRam[addr] = b; ! 499: } ! 500: ! 501: /* **** NEXT RAM empty areas **** */ ! 502: ! 503: static uae_u32 mem_ram_empty_lget(uaecptr addr) ! 504: { ! 505: if (illegal_mem) ! 506: write_log ("Empty mem area lget at %08lx\n", (long)addr); ! 507: ! 508: return addr; ! 509: } ! 510: ! 511: static uae_u32 mem_ram_empty_wget(uaecptr addr) ! 512: { ! 513: if (illegal_mem) ! 514: write_log ("Empty mem area wget at %08lx\n", (long)addr); ! 515: ! 516: return addr; ! 517: } ! 518: ! 519: static uae_u32 mem_ram_empty_bget(uaecptr addr) ! 520: { ! 521: if (illegal_mem) ! 522: write_log ("Empty mem area bget at %08lx\n", (long)addr); ! 523: ! 524: return addr; ! 525: } ! 526: ! 527: static void mem_ram_empty_lput(uaecptr addr, uae_u32 l) ! 528: { ! 529: if (illegal_mem) ! 530: write_log ("Empty mem area lput at %08lx\n", (long)addr); ! 531: } ! 532: ! 533: static void mem_ram_empty_wput(uaecptr addr, uae_u32 w) ! 534: { ! 535: if (illegal_mem) ! 536: write_log ("Empty mem area wput at %08lx\n", (long)addr); ! 537: } ! 538: ! 539: static void mem_ram_empty_bput(uaecptr addr, uae_u32 b) ! 540: { ! 541: if (illegal_mem) ! 542: write_log ("Empty mem area bput at %08lx\n", (long)addr); ! 543: } ! 544: ! 545: ! 546: /* **** NEXT VRAM memory for monochrome systems **** */ ! 547: ! 548: static uae_u32 mem_video_lget(uaecptr addr) ! 549: { ! 550: addr &= NEXT_VRAM_MASK; ! 551: return do_get_mem_long(NEXTVideo + addr); ! 552: } ! 553: ! 554: static uae_u32 mem_video_wget(uaecptr addr) ! 555: { ! 556: addr &= NEXT_VRAM_MASK; ! 557: return do_get_mem_word(NEXTVideo + addr); ! 558: } ! 559: ! 560: static uae_u32 mem_video_bget(uaecptr addr) ! 561: { ! 562: addr &= NEXT_VRAM_MASK; ! 563: return NEXTVideo[addr]; ! 564: } ! 565: ! 566: static void mem_video_lput(uaecptr addr, uae_u32 l) ! 567: { ! 568: addr &= NEXT_VRAM_MASK; ! 569: do_put_mem_long(NEXTVideo + addr, l); ! 570: } ! 571: ! 572: static void mem_video_wput(uaecptr addr, uae_u32 w) ! 573: { ! 574: addr &= NEXT_VRAM_MASK; ! 575: do_put_mem_word(NEXTVideo + addr, w); ! 576: } ! 577: ! 578: static void mem_video_bput(uaecptr addr, uae_u32 b) ! 579: { ! 580: addr &= NEXT_VRAM_MASK; ! 581: NEXTVideo[addr] = b; ! 582: } ! 583: ! 584: ! 585: /* **** NEXT memory banks with write functions **** */ ! 586: ! 587: static uae_u8 mwf0[4][4] = { /* AB */ ! 588: { 0, 0, 0, 0 }, ! 589: { 0, 0, 1, 1 }, ! 590: { 0, 1, 1, 2 }, ! 591: { 0, 1, 2, 3 } ! 592: }; ! 593: ! 594: static uae_u8 mwf1[4][4] = { /* ceil(A+B) */ ! 595: { 0, 1, 2, 3 }, ! 596: { 1, 2, 3, 3 }, ! 597: { 2, 3, 3, 3 }, ! 598: { 3, 3, 3, 3 } ! 599: }; ! 600: ! 601: static uae_u8 mwf2[4][4] = { /* (1-A)B */ ! 602: { 0, 0, 0, 0 }, ! 603: { 1, 1, 0, 0 }, ! 604: { 2, 1, 1, 0 }, ! 605: { 3, 2, 1, 0 } ! 606: }; ! 607: ! 608: static uae_u8 mwf3[4][4] = { /* A+B-AB */ ! 609: { 0, 1, 2, 3 }, ! 610: { 1, 2, 2, 3 }, ! 611: { 2, 2, 3, 3 }, ! 612: { 3, 3, 3, 3 } ! 613: }; ! 614: ! 615: static uae_u32 memory_write_func(uae_u32 old, uae_u32 new, int function, int size) ! 616: { ! 617: int a,b,i; ! 618: uae_u32 v=0; ! 619: #if 0 ! 620: write_log("[MWF] Function%i: size=%i, old=%08X, new=%08X\n",function,size,old,new); ! 621: #endif ! 622: ! 623: switch (function) { ! 624: case 0: ! 625: for (i=0; i<(size*4); i++) { ! 626: a=old>>(i*2)&3; ! 627: b=new>>(i*2)&3; ! 628: v|=mwf0[a][b]<<(i*2); ! 629: } ! 630: return v; ! 631: case 1: ! 632: for (i=0; i<(size*4); i++) { ! 633: a=old>>(i*2)&3; ! 634: b=new>>(i*2)&3; ! 635: v|=mwf1[a][b]<<(i*2); ! 636: } ! 637: return v; ! 638: case 2: ! 639: for (i=0; i<(size*4); i++) { ! 640: a=old>>(i*2)&3; ! 641: b=new>>(i*2)&3; ! 642: v|=mwf2[a][b]<<(i*2); ! 643: } ! 644: return v; ! 645: case 3: ! 646: for (i=0; i<(size*4); i++) { ! 647: a=old>>(i*2)&3; ! 648: b=new>>(i*2)&3; ! 649: v|=mwf3[a][b]<<(i*2); ! 650: } ! 651: return v; ! 652: ! 653: default: ! 654: write_log("Unknown memory write function!\n"); ! 655: abort(); ! 656: } ! 657: } ! 658: ! 659: static uae_u32 mem_ram_mwf_lget(uaecptr addr) ! 660: { ! 661: int function = (addr>>26)&0x3; ! 662: addr = NEXT_RAM_START|(addr&0x03FFFFFF); ! 663: ! 664: return function==0?0xFFFFFFFF:0; ! 665: } ! 666: ! 667: static uae_u32 mem_ram_mwf_wget(uaecptr addr) ! 668: { ! 669: int function = (addr>>26)&0x3; ! 670: addr = NEXT_RAM_START|(addr&0x03FFFFFF); ! 671: ! 672: return function==0?0xFFFF:0; ! 673: } ! 674: ! 675: static uae_u32 mem_ram_mwf_bget(uaecptr addr) ! 676: { ! 677: int function = (addr>>26)&0x3; ! 678: addr = NEXT_RAM_START|(addr&0x03FFFFFF); ! 679: ! 680: return function==0?0xFF:0; ! 681: } ! 682: ! 683: static void mem_ram_mwf_lput(uaecptr addr, uae_u32 l) ! 684: { ! 685: int function = (addr>>26)&0x3; ! 686: addr = NEXT_RAM_START|(addr&0x03FFFFFF); ! 687: ! 688: uae_u32 old = longget(addr); ! 689: uae_u32 val = memory_write_func(old, l, function, 4); ! 690: ! 691: longput(addr, val); ! 692: } ! 693: ! 694: static void mem_ram_mwf_wput(uaecptr addr, uae_u32 w) ! 695: { ! 696: int function = (addr>>26)&0x3; ! 697: addr = NEXT_RAM_START|(addr&0x03FFFFFF); ! 698: ! 699: uae_u32 old = wordget(addr); ! 700: uae_u32 val = memory_write_func(old, w, function, 2); ! 701: ! 702: wordput(addr, val); ! 703: } ! 704: ! 705: static void mem_ram_mwf_bput(uaecptr addr, uae_u32 b) ! 706: { ! 707: int function = (addr>>26)&0x3; ! 708: addr = NEXT_RAM_START|(addr&0x03FFFFFF); ! 709: ! 710: uae_u32 old = byteget(addr); ! 711: uae_u32 val = memory_write_func(old, b, function, 1); ! 712: ! 713: byteput(addr, val); ! 714: } ! 715: ! 716: ! 717: static uae_u32 mem_video_mwf_lget(uaecptr addr) ! 718: { ! 719: int function = (addr>>24)&0x3; ! 720: addr = NEXT_VRAM_START|(addr&NEXT_VRAM_MASK); ! 721: ! 722: return function==0?0xFFFFFFFF:0; ! 723: } ! 724: ! 725: static uae_u32 mem_video_mwf_wget(uaecptr addr) ! 726: { ! 727: int function = (addr>>24)&0x3; ! 728: addr = NEXT_VRAM_START|(addr&NEXT_VRAM_MASK); ! 729: ! 730: return function==0?0xFFFF:0; ! 731: } ! 732: ! 733: static uae_u32 mem_video_mwf_bget(uaecptr addr) ! 734: { ! 735: int function = (addr>>24)&0x3; ! 736: addr = NEXT_VRAM_START|(addr&NEXT_VRAM_MASK); ! 737: ! 738: return function==0?0xFF:0; ! 739: } ! 740: ! 741: static void mem_video_mwf_lput(uaecptr addr, uae_u32 l) ! 742: { ! 743: int function = (addr>>24)&0x3; ! 744: addr = NEXT_VRAM_START|(addr&NEXT_VRAM_MASK); ! 745: ! 746: uae_u32 old = longget(addr); ! 747: uae_u32 val = memory_write_func(old, l, function, 4); ! 748: ! 749: longput(addr, val); ! 750: } ! 751: ! 752: static void mem_video_mwf_wput(uaecptr addr, uae_u32 w) ! 753: { ! 754: int function = (addr>>24)&0x3; ! 755: addr = NEXT_VRAM_START|(addr&NEXT_VRAM_MASK); ! 756: ! 757: uae_u32 old = wordget(addr); ! 758: uae_u32 val = memory_write_func(old, w, function, 2); ! 759: ! 760: wordput(addr, val); ! 761: } ! 762: ! 763: static void mem_video_mwf_bput(uaecptr addr, uae_u32 b) ! 764: { ! 765: int function = (addr>>24)&0x3; ! 766: addr = NEXT_VRAM_START|(addr&NEXT_VRAM_MASK); ! 767: ! 768: uae_u32 old = byteget(addr); ! 769: uae_u32 val = memory_write_func(old, b, function, 1); ! 770: ! 771: byteput(addr, val); ! 772: } ! 773: ! 774: ! 775: /* **** NEXT VRAM memory for color systems **** */ ! 776: ! 777: static uae_u32 mem_color_video_lget(uaecptr addr) ! 778: { ! 779: addr &= NEXT_VRAM_COLOR_MASK; ! 780: return do_get_mem_long(NEXTColorVideo + addr); ! 781: } ! 782: ! 783: static uae_u32 mem_color_video_wget(uaecptr addr) ! 784: { ! 785: addr &= NEXT_VRAM_COLOR_MASK; ! 786: return do_get_mem_word(NEXTColorVideo + addr); ! 787: } ! 788: ! 789: static uae_u32 mem_color_video_bget(uaecptr addr) ! 790: { ! 791: addr &= NEXT_VRAM_COLOR_MASK; ! 792: return NEXTColorVideo[addr]; ! 793: } ! 794: ! 795: static void mem_color_video_lput(uaecptr addr, uae_u32 l) ! 796: { ! 797: addr &= NEXT_VRAM_COLOR_MASK; ! 798: do_put_mem_long(NEXTColorVideo + addr, l); ! 799: } ! 800: ! 801: static void mem_color_video_wput(uaecptr addr, uae_u32 w) ! 802: { ! 803: addr &= NEXT_VRAM_COLOR_MASK; ! 804: do_put_mem_word(NEXTColorVideo + addr, w); ! 805: } ! 806: ! 807: static void mem_color_video_bput(uaecptr addr, uae_u32 b) ! 808: { ! 809: addr &= NEXT_VRAM_COLOR_MASK; ! 810: NEXTColorVideo[addr] = b; ! 811: } ! 812: ! 813: ! 814: /* Hardware IO memory */ ! 815: /* --> see ioMem.c */ ! 816: uae_u8 *IOmemory; ! 817: ! 818: ! 819: /* **** NEXT BMAP memory **** */ ! 820: ! 821: static uae_u32 mem_bmap_lget(uaecptr addr) ! 822: { ! 823: if ((addr&NEXT_BMAP_MASK)>NEXT_BMAP_SIZE) { ! 824: write_log ("bmap bus error at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 825: M68000_BusError(addr, 0); ! 826: return 0; ! 827: } ! 828: //write_log ("bmap lget at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 829: addr &= NEXT_BMAP_MASK; ! 830: return bmap_lget(addr); ! 831: } ! 832: ! 833: static uae_u32 mem_bmap_wget(uaecptr addr) ! 834: { ! 835: if ((addr&NEXT_BMAP_MASK)>NEXT_BMAP_SIZE) { ! 836: write_log ("bmap bus error at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 837: M68000_BusError(addr, 0); ! 838: return 0; ! 839: } ! 840: //write_log ("bmap wget at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 841: addr &= NEXT_BMAP_MASK; ! 842: return bmap_wget(addr); ! 843: } ! 844: ! 845: static uae_u32 mem_bmap_bget(uaecptr addr) ! 846: { ! 847: if ((addr&NEXT_BMAP_MASK)>NEXT_BMAP_SIZE) { ! 848: write_log ("bmap bus error at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 849: M68000_BusError(addr, 0); ! 850: return 0; ! 851: } ! 852: //write_log ("bmap bget at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 853: addr &= NEXT_BMAP_MASK; ! 854: return bmap_bget(addr); ! 855: } ! 856: ! 857: static void mem_bmap_lput(uaecptr addr, uae_u32 l) ! 858: { ! 859: if ((addr&NEXT_BMAP_MASK)>NEXT_BMAP_SIZE) { ! 860: write_log ("bmap bus error at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 861: M68000_BusError(addr, 0); ! 862: } ! 863: //write_log ("bmap lput at %08lx val=%x PC=%08x\n", (long)addr,l,m68k_getpc()); ! 864: addr &= NEXT_BMAP_MASK; ! 865: bmap_lput(addr, l); ! 866: } ! 867: ! 868: static void mem_bmap_wput(uaecptr addr, uae_u32 w) ! 869: { ! 870: if ((addr&NEXT_BMAP_MASK)>NEXT_BMAP_SIZE) { ! 871: write_log ("bmap bus error at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 872: M68000_BusError(addr, 0); ! 873: } ! 874: //write_log ("bmap wput at %08lx val=%x PC=%08x\n", (long)addr,w,m68k_getpc()); ! 875: addr &= NEXT_BMAP_MASK; ! 876: bmap_wput(addr, w); ! 877: } ! 878: ! 879: static void mem_bmap_bput(uaecptr addr, uae_u32 b) ! 880: { ! 881: if ((addr&NEXT_BMAP_MASK)>NEXT_BMAP_SIZE) { ! 882: write_log ("bmap bus error at %08lx PC=%08x\n", (long)addr,m68k_getpc()); ! 883: M68000_BusError(addr, 0); ! 884: } ! 885: //write_log ("bmap bput at %08lx val=%x PC=%08x\n", (long)addr,b,m68k_getpc()); ! 886: addr &= NEXT_BMAP_MASK; ! 887: bmap_bput(addr, b); ! 888: } ! 889: ! 890: ! 891: ! 892: /* **** Address banks **** */ ! 893: ! 894: static addrbank dummy_bank = ! 895: { ! 896: dummy_lget, dummy_wget, dummy_bget, ! 897: dummy_lput, dummy_wput, dummy_bput, ! 898: dummy_lget, dummy_wget, ABFLAG_NONE ! 899: }; ! 900: ! 901: static addrbank BusErrMem_bank = ! 902: { ! 903: BusErrMem_lget, BusErrMem_wget, BusErrMem_bget, ! 904: BusErrMem_lput, BusErrMem_wput, BusErrMem_bput, ! 905: BusErrMem_lget, BusErrMem_wget, ABFLAG_NONE ! 906: }; ! 907: ! 908: static addrbank ROM_bank = ! 909: { ! 910: mem_rom_lget, mem_rom_wget, mem_rom_bget, ! 911: mem_rom_lput, mem_rom_wput, mem_rom_bput, ! 912: mem_rom_lget, mem_rom_wget, ABFLAG_ROM ! 913: }; ! 914: ! 915: static addrbank RAM_bank0 = ! 916: { ! 917: mem_ram_bank0_lget, mem_ram_bank0_wget, mem_ram_bank0_bget, ! 918: mem_ram_bank0_lput, mem_ram_bank0_wput, mem_ram_bank0_bput, ! 919: mem_ram_bank0_lget, mem_ram_bank0_wget, ABFLAG_RAM ! 920: ! 921: }; ! 922: ! 923: static addrbank RAM_bank1 = ! 924: { ! 925: mem_ram_bank1_lget, mem_ram_bank1_wget, mem_ram_bank1_bget, ! 926: mem_ram_bank1_lput, mem_ram_bank1_wput, mem_ram_bank1_bput, ! 927: mem_ram_bank1_lget, mem_ram_bank1_wget, ABFLAG_RAM ! 928: ! 929: }; ! 930: ! 931: static addrbank RAM_bank2 = ! 932: { ! 933: mem_ram_bank2_lget, mem_ram_bank2_wget, mem_ram_bank2_bget, ! 934: mem_ram_bank2_lput, mem_ram_bank2_wput, mem_ram_bank2_bput, ! 935: mem_ram_bank2_lget, mem_ram_bank2_wget, ABFLAG_RAM ! 936: ! 937: }; ! 938: ! 939: static addrbank RAM_bank3 = ! 940: { ! 941: mem_ram_bank3_lget, mem_ram_bank3_wget, mem_ram_bank3_bget, ! 942: mem_ram_bank3_lput, mem_ram_bank3_wput, mem_ram_bank3_bput, ! 943: mem_ram_bank3_lget, mem_ram_bank3_wget, ABFLAG_RAM ! 944: ! 945: }; ! 946: ! 947: static addrbank RAM_empty_bank = ! 948: { ! 949: mem_ram_empty_lget, mem_ram_empty_wget, mem_ram_empty_bget, ! 950: mem_ram_empty_lput, mem_ram_empty_wput, mem_ram_empty_bput, ! 951: mem_ram_empty_lget, mem_ram_empty_wget, ABFLAG_RAM ! 952: }; ! 953: ! 954: static addrbank RAM_mwf_bank = ! 955: { ! 956: mem_ram_mwf_lget, mem_ram_mwf_wget, mem_ram_mwf_bget, ! 957: mem_ram_mwf_lput, mem_ram_mwf_wput, mem_ram_mwf_bput, ! 958: mem_ram_mwf_lget, mem_ram_mwf_wget, ABFLAG_RAM ! 959: }; ! 960: ! 961: static addrbank VRAM_bank = ! 962: { ! 963: mem_video_lget, mem_video_wget, mem_video_bget, ! 964: mem_video_lput, mem_video_wput, mem_video_bput, ! 965: mem_video_lget, mem_video_wget, ABFLAG_RAM ! 966: }; ! 967: ! 968: static addrbank VRAM_mwf_bank = ! 969: { ! 970: mem_video_mwf_lget, mem_video_mwf_wget, mem_video_mwf_bget, ! 971: mem_video_mwf_lput, mem_video_mwf_wput, mem_video_mwf_bput, ! 972: mem_video_mwf_lget, mem_video_mwf_wget, ABFLAG_RAM ! 973: }; ! 974: ! 975: static addrbank VRAM_color_bank = ! 976: { ! 977: mem_color_video_lget, mem_color_video_wget, mem_color_video_bget, ! 978: mem_color_video_lput, mem_color_video_wput, mem_color_video_bput, ! 979: mem_color_video_lget, mem_color_video_wget, ABFLAG_RAM ! 980: }; ! 981: ! 982: static addrbank IO_bank = ! 983: { ! 984: IoMem_lget, IoMem_wget, IoMem_bget, ! 985: IoMem_lput, IoMem_wput, IoMem_bput, ! 986: IoMem_lget, IoMem_wget, ABFLAG_IO ! 987: }; ! 988: ! 989: static addrbank BMAP_bank = ! 990: { ! 991: mem_bmap_lget, mem_bmap_wget, mem_bmap_bget, ! 992: mem_bmap_lput, mem_bmap_wput, mem_bmap_bput, ! 993: mem_bmap_lget, mem_bmap_wget, ABFLAG_IO ! 994: }; ! 995: ! 996: static addrbank TMC_bank = ! 997: { ! 998: tmc_lget, tmc_wget, tmc_bget, ! 999: tmc_lput, tmc_wput, tmc_bput, ! 1000: tmc_lget, tmc_wget, ABFLAG_IO ! 1001: }; ! 1002: ! 1003: static addrbank NBIC_bank = ! 1004: { ! 1005: nbic_reg_lget, nbic_reg_wget, nbic_reg_bget, ! 1006: nbic_reg_lput, nbic_reg_wput, nbic_reg_bput, ! 1007: nbic_reg_lget, nbic_reg_wget, ABFLAG_IO ! 1008: }; ! 1009: ! 1010: static addrbank NEXTBUS_slot_bank = ! 1011: { ! 1012: nextbus_slot_lget, nextbus_slot_wget, nextbus_slot_bget, ! 1013: nextbus_slot_lput, nextbus_slot_wput, nextbus_slot_bput, ! 1014: nextbus_slot_lget, nextbus_slot_wget, ABFLAG_IO ! 1015: }; ! 1016: ! 1017: static addrbank NEXTBUS_board_bank = ! 1018: { ! 1019: nextbus_board_lget, nextbus_board_wget, nextbus_board_bget, ! 1020: nextbus_board_lput, nextbus_board_wput, nextbus_board_bput, ! 1021: nextbus_board_lget, nextbus_board_wget, ABFLAG_IO ! 1022: }; ! 1023: ! 1024: ! 1025: ! 1026: static void init_mem_banks (void) ! 1027: { ! 1028: int i; ! 1029: for (i = 0; i < 65536; i++) ! 1030: put_mem_bank (i<<16, &BusErrMem_bank); ! 1031: } ! 1032: ! 1033: ! 1034: /* ! 1035: * Initialize the memory banks ! 1036: */ ! 1037: const char* memory_init(int *nNewNEXTMemSize) ! 1038: { ! 1039: int i; ! 1040: uae_u32 bankstart[4]; ! 1041: ! 1042: /* Set machine dependent variables */ ! 1043: if (ConfigureParams.System.bTurbo) { ! 1044: NEXT_ram_bank_size = NEXT_RAM_BANK_MAX_T; ! 1045: NEXT_ram_bank_mask = NEXT_RAM_BANK_SEL_T; ! 1046: } else if (ConfigureParams.System.bColor) { ! 1047: NEXT_ram_bank_size = NEXT_RAM_BANK_MAX_C; ! 1048: NEXT_ram_bank_mask = NEXT_RAM_BANK_SEL_C; ! 1049: } else { ! 1050: NEXT_ram_bank_size = NEXT_RAM_BANK_MAX; ! 1051: NEXT_ram_bank_mask = NEXT_RAM_BANK_SEL; ! 1052: } ! 1053: ! 1054: write_log("Memory init: Memory size: %iMB\n", Configuration_CheckMemory(nNewNEXTMemSize)); ! 1055: ! 1056: /* Convert values from MB to byte */ ! 1057: for (i=0; i<N_BANKS; i++) { ! 1058: bankstart[i] = NEXT_RAM_START + (NEXT_ram_bank_size * i); ! 1059: } ! 1060: ! 1061: /* Fill every 65536 bank with dummy */ ! 1062: init_mem_banks(); ! 1063: ! 1064: /* Map ROM */ ! 1065: map_banks(&ROM_bank, NEXT_EPROM_START >> 16, NEXT_EPROM_SIZE>>16); ! 1066: write_log("Mapping ROM at $%08x: %ikB\n", NEXT_EPROM_START, NEXT_EPROM_SIZE/1024); ! 1067: if (ConfigureParams.System.nMachineType != NEXT_CUBE030) { ! 1068: map_banks(&ROM_bank, NEXT_EPROM_BMAP_START >> 16, NEXT_EPROM_SIZE>>16); ! 1069: write_log("Mapping ROM trough BMAP at $%08x: %ikB\n", NEXT_EPROM_BMAP_START, NEXT_EPROM_SIZE/1024); ! 1070: } ! 1071: ! 1072: /* Map main memory */ ! 1073: if (nNewNEXTMemSize[0]) { ! 1074: NEXT_ram_bank0_mask = NEXT_ram_bank_mask|((nNewNEXTMemSize[0]<<20)-1); ! 1075: map_banks(&RAM_bank0, bankstart[0]>>16, NEXT_ram_bank_size >> 16); ! 1076: write_log("Mapping main memory bank0 at $%08x: %iMB\n", bankstart[0], nNewNEXTMemSize[0]); ! 1077: } else { ! 1078: NEXT_ram_bank0_mask = 0; ! 1079: map_banks(&RAM_empty_bank, bankstart[0]>>16, NEXT_ram_bank_size >> 16); ! 1080: write_log("Mapping main memory bank0 at $%08x: empty\n", bankstart[0]); ! 1081: } ! 1082: ! 1083: if (nNewNEXTMemSize[1]) { ! 1084: NEXT_ram_bank1_mask = NEXT_ram_bank_mask|((nNewNEXTMemSize[1]<<20)-1); ! 1085: map_banks(&RAM_bank1, bankstart[1]>>16, NEXT_ram_bank_size >> 16); ! 1086: write_log("Mapping main memory bank1 at $%08x: %iMB\n", bankstart[1], nNewNEXTMemSize[1]); ! 1087: } else { ! 1088: NEXT_ram_bank1_mask = 0; ! 1089: map_banks(&RAM_empty_bank, bankstart[1]>>16, NEXT_ram_bank_size >> 16); ! 1090: write_log("Mapping main memory bank1 at $%08x: empty\n", bankstart[1]); ! 1091: } ! 1092: ! 1093: if (nNewNEXTMemSize[2]) { ! 1094: NEXT_ram_bank2_mask = NEXT_ram_bank_mask|((nNewNEXTMemSize[2]<<20)-1); ! 1095: map_banks(&RAM_bank2, bankstart[2]>>16, NEXT_ram_bank_size >> 16); ! 1096: write_log("Mapping main memory bank2 at $%08x: %iMB\n", bankstart[2], nNewNEXTMemSize[2]); ! 1097: } else { ! 1098: NEXT_ram_bank2_mask = 0; ! 1099: map_banks(&RAM_empty_bank, bankstart[2]>>16, NEXT_ram_bank_size >> 16); ! 1100: write_log("Mapping main memory bank2 at $%08x: empty\n", bankstart[2]); ! 1101: } ! 1102: ! 1103: if (nNewNEXTMemSize[3]) { ! 1104: NEXT_ram_bank3_mask = NEXT_ram_bank_mask|((nNewNEXTMemSize[3]<<20)-1); ! 1105: map_banks(&RAM_bank3, bankstart[3]>>16, NEXT_ram_bank_size >> 16); ! 1106: write_log("Mapping main memory bank3 at $%08x: %iMB\n", bankstart[3], nNewNEXTMemSize[3]); ! 1107: } else { ! 1108: NEXT_ram_bank3_mask = 0; ! 1109: map_banks(&RAM_empty_bank, bankstart[3]>>16, NEXT_ram_bank_size >> 16); ! 1110: write_log("Mapping main memory bank3 at $%08x: empty\n", bankstart[3]); ! 1111: } ! 1112: ! 1113: /* Map mirrors of main memory for memory write functions */ ! 1114: if (!ConfigureParams.System.bColor && !ConfigureParams.System.bTurbo) { ! 1115: map_banks(&RAM_mwf_bank, NEXT_RAM_MWF0_START>>16, (NEXT_RAM_BANK_MAX*N_BANKS) >> 16); ! 1116: map_banks(&RAM_mwf_bank, NEXT_RAM_MWF1_START>>16, (NEXT_RAM_BANK_MAX*N_BANKS) >> 16); ! 1117: map_banks(&RAM_mwf_bank, NEXT_RAM_MWF2_START>>16, (NEXT_RAM_BANK_MAX*N_BANKS) >> 16); ! 1118: map_banks(&RAM_mwf_bank, NEXT_RAM_MWF3_START>>16, (NEXT_RAM_BANK_MAX*N_BANKS) >> 16); ! 1119: write_log("Mapping mirrors of main memory for memory write functions:\n"); ! 1120: for (i = 0; i<4; i++) ! 1121: write_log("Function%i at $%08X\n",i,0x10000000+0x04000000*i); ! 1122: } ! 1123: ! 1124: /* Map video memory */ ! 1125: if (ConfigureParams.System.bTurbo && ConfigureParams.System.bColor) { ! 1126: map_banks(&VRAM_color_bank, NEXT_VRAM_TURBO_START>>16, NEXT_VRAM_COLOR_SIZE >> 16); ! 1127: write_log("Mapping video memory at $%08x: %ikB\n", NEXT_VRAM_TURBO_START, NEXT_VRAM_COLOR_SIZE/1024); ! 1128: } else if (ConfigureParams.System.bTurbo) { ! 1129: map_banks(&VRAM_bank, NEXT_VRAM_TURBO_START>>16, NEXT_VRAM_SIZE >> 16); ! 1130: write_log("Mapping video memory at $%08x: %ikB\n", NEXT_VRAM_TURBO_START, NEXT_VRAM_SIZE/1024); ! 1131: } else if (ConfigureParams.System.bColor) { ! 1132: map_banks(&VRAM_color_bank, NEXT_VRAM_COLOR_START>>16, NEXT_VRAM_COLOR_SIZE >> 16); ! 1133: write_log("Mapping video memory at $%08x: %ikB\n", NEXT_VRAM_COLOR_START, NEXT_VRAM_COLOR_SIZE/1024); ! 1134: } else { ! 1135: map_banks(&VRAM_bank, NEXT_VRAM_START>>16, NEXT_VRAM_SIZE >> 16); ! 1136: write_log("Mapping video memory at $%08x: %ikB\n", NEXT_VRAM_START, NEXT_VRAM_SIZE/1024); ! 1137: ! 1138: map_banks(&VRAM_mwf_bank, NEXT_VRAM_MWF0_START>>16, NEXT_VRAM_SIZE >> 16); ! 1139: map_banks(&VRAM_mwf_bank, NEXT_VRAM_MWF1_START>>16, NEXT_VRAM_SIZE >> 16); ! 1140: map_banks(&VRAM_mwf_bank, NEXT_VRAM_MWF2_START>>16, NEXT_VRAM_SIZE >> 16); ! 1141: map_banks(&VRAM_mwf_bank, NEXT_VRAM_MWF3_START>>16, NEXT_VRAM_SIZE >> 16); ! 1142: write_log("Mapping mirrors of video memory for memory write functions:\n"); ! 1143: for (i = 0; i<4; i++) ! 1144: write_log("Function%i at $%08X\n",i,0x0C000000+0x01000000*i); ! 1145: } ! 1146: ! 1147: /* Map device space */ ! 1148: map_banks(&IO_bank, NEXT_IO_START >> 16, NEXT_IO_SIZE>>16); ! 1149: write_log("Mapping device space at $%08X\n", NEXT_IO_START); ! 1150: ! 1151: if (ConfigureParams.System.nMachineType != NEXT_CUBE030) { ! 1152: map_banks(&IO_bank, NEXT_IO_BMAP_START >> 16, NEXT_IO_SIZE>>16); ! 1153: if (!ConfigureParams.System.bTurbo) { ! 1154: map_banks(&BMAP_bank, NEXT_BMAP_START >> 16, NEXT_BMAP_MAP_SIZE>>16); ! 1155: map_banks(&BMAP_bank, (0x80000000|NEXT_BMAP_START) >> 16, NEXT_BMAP_MAP_SIZE>>16); ! 1156: write_log("Mapping BMAP device space at $%08X\n", NEXT_IO_BMAP_START); ! 1157: } else { ! 1158: write_log("Mapping device space at $%08X\n", NEXT_IO_BMAP_START); ! 1159: } ! 1160: } ! 1161: bmap_init(); ! 1162: ! 1163: if (ConfigureParams.System.bTurbo) { ! 1164: map_banks(&TMC_bank, NEXT_IO_TMC_START >> 16, NEXT_IO_SIZE>>16); ! 1165: write_log("Mapping TMC device space at $%08X\n", NEXT_IO_TMC_START); ! 1166: ! 1167: if (ConfigureParams.System.nCpuFreq==40) { ! 1168: map_banks(&dummy_bank, NEXT_CACHE_START>>16, NEXT_CACHE_SIZE>>16); ! 1169: write_log("Mapping cache memory at $%08x: %ikB\n", NEXT_CACHE_START, NEXT_CACHE_SIZE/1024); ! 1170: map_banks(&dummy_bank, NEXT_CACHE_TAG_START>>16, NEXT_CACHE_TAG_SIZE>>16); ! 1171: write_log("Mapping cache tag memory at $%08x: %ikB\n", NEXT_CACHE_TAG_START, NEXT_CACHE_TAG_SIZE/1024); ! 1172: } ! 1173: } ! 1174: ! 1175: /* Map NBIC and board spaces via NextBus */ ! 1176: if (ConfigureParams.System.nMachineType!=NEXT_STATION && ConfigureParams.System.bNBIC) { ! 1177: if (!ConfigureParams.System.bTurbo) { ! 1178: map_banks(&NBIC_bank, NEXT_NBIC_START>>16, NEXT_NBIC_MAP_SIZE>>16); ! 1179: write_log("Mapping NextBus interface chip at $%08x\n", NEXT_NBIC_START); ! 1180: } ! 1181: for (i = 2; i < 8; i++) { ! 1182: if (i==8 && ConfigureParams.System.nMachineType!=NEXT_CUBE030 && !ConfigureParams.System.bTurbo) { ! 1183: /* FIXME: conflict with BMAP. Implement: only SCR2 ROM_OVERLAY enables NBIC */ ! 1184: continue; ! 1185: } ! 1186: map_banks(&NEXTBUS_board_bank, NEXTBUS_BOARD_START(i)>>16, NEXTBUS_BOARD_SIZE>>16); ! 1187: write_log("Mapping NextBus board memory for slot %i at $%08x\n", i, NEXTBUS_BOARD_START(i)); ! 1188: } ! 1189: for (i = 0; i < 16; i++) { ! 1190: map_banks(&NEXTBUS_slot_bank, NEXTBUS_SLOT_START(i)>>16, NEXTBUS_SLOT_SIZE>>16); ! 1191: } ! 1192: write_log("Mapping NextBus slot memory at $%08x\n", NEXTBUS_SLOT_START(i)); ! 1193: } ! 1194: nextbus_init(); ! 1195: ! 1196: ROMmemory=NEXTRom; ! 1197: IOmemory=NEXTIo; ! 1198: ! 1199: { ! 1200: FILE* fin; ! 1201: int ret; ! 1202: /* Loading ROM depending on emulated system */ ! 1203: if(ConfigureParams.System.nMachineType == NEXT_CUBE030) ! 1204: fin=fopen(ConfigureParams.Rom.szRom030FileName,"rb"); ! 1205: else if(ConfigureParams.System.bTurbo == true) ! 1206: fin=fopen(ConfigureParams.Rom.szRomTurboFileName,"rb"); ! 1207: else ! 1208: fin=fopen(ConfigureParams.Rom.szRom040FileName, "rb"); ! 1209: ! 1210: if (fin==NULL) { ! 1211: return "Cannot open ROM file"; ! 1212: } ! 1213: ! 1214: ret=fread(ROMmemory,1,0x20000,fin); ! 1215: ! 1216: write_log("Read ROM %d\n",ret); ! 1217: fclose(fin); ! 1218: } ! 1219: ! 1220: { ! 1221: int i; ! 1222: for (i=0;i<sizeof(NEXTVideo);i++) NEXTVideo[i]=0; ! 1223: for (i=0;i<sizeof(NEXTRam);i++) NEXTRam[i]=0; ! 1224: for (i=0;i<sizeof(NEXTIo);i++) NEXTIo[i]=0; ! 1225: } ! 1226: ! 1227: IoMem_Init(); ! 1228: ! 1229: return NULL; ! 1230: } ! 1231: ! 1232: ! 1233: /* ! 1234: * Uninitialize the memory banks. ! 1235: */ ! 1236: void memory_uninit (void) ! 1237: { ! 1238: } ! 1239: ! 1240: ! 1241: void map_banks (addrbank *bank, int start, int size) ! 1242: { ! 1243: int bnr; ! 1244: ! 1245: for (bnr = start; bnr < start + size; bnr++) ! 1246: put_mem_bank (bnr << 16, bank); ! 1247: return; ! 1248: } ! 1249: ! 1250: void memory_hardreset (void) ! 1251: { ! 1252: }
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