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Annotation of previous_trunk/src/dimension/nd_mem.cpp, revision 1.1

1.1     ! root        1: #include "main.h"
        !             2: #include "configuration.h"
        !             3: #include "m68000.h"
        !             4: #include "sysdeps.h"
        !             5: #include "dimension.hpp"
        !             6: #include "nd_mem.hpp"
        !             7: 
        !             8: #define write_log printf
        !             9: 
        !            10: /* --------- NEXTDIMENSION MEMORY ---------- */
        !            11: 
        !            12: /* NeXTdimension board memory */
        !            13: #define ND_RAM_START   0xF8000000
        !            14: #define ND_RAM_SIZE            0x04000000
        !            15: #define ND_RAM_MASK            0x03FFFFFF
        !            16: 
        !            17: #define ND_VRAM_START  0xFE000000
        !            18: #define ND_VRAM_SIZE   0x00400000
        !            19: #define ND_VRAM_MASK   0x003FFFFF
        !            20: 
        !            21: #define ND_EEPROM_START        0xFFF00000
        !            22: #define ND_EEPROM_SIZE 0x00020000
        !            23: #define ND_EEPROM_MASK 0x0001FFFF
        !            24: 
        !            25: /* RAM banks */
        !            26: #define ND_RAM_BANKSIZE 0x01000000
        !            27: #define ND_RAM_BANKMASK 0x03000000
        !            28: 
        !            29: /* NeXTdimension dither memory */
        !            30: #define ND_DMEM_START   0xFF000000
        !            31: #define ND_DMEM_SIZE    0x00000200
        !            32: #define ND_DMEM_MASK    0x000001FF
        !            33: 
        !            34: /* NeXTdimension board devices */
        !            35: #define ND_IO_START            0xFF800000
        !            36: #define ND_IO_SIZE             0x00004000
        !            37: #define ND_IO_MASK             0x00003FFF
        !            38: 
        !            39: /* NeXTdimension board RAMDAC */
        !            40: #define ND_RAMDAC_START        0xFF200000
        !            41: #define ND_RAMDAC_SIZE  0x00001000
        !            42: #define ND_RAMDAC_MASK  0x00000FFF
        !            43: 
        !            44: /* NeXTdimension board data path */
        !            45: #define ND_DP_START    0xF0000000
        !            46: #define ND_DP_SIZE  0x00001000
        !            47: #define ND_DP_MASK  0x00000FFF
        !            48: 
        !            49: /* NeXTdimension unknown registers */
        !            50: #define ND_CSR_START 0xFF400000
        !            51: #define ND_CSR_SIZE  0x00000200
        !            52: #define ND_CSR_MASK  0x000001FF
        !            53: 
        !            54: /* Function to fix address for ROM access */
        !            55: static uaecptr nd_rom_addr_fix(uaecptr addr)
        !            56: {
        !            57: #if ND_STEP
        !            58:     addr >>= 2;
        !            59: #else
        !            60:     addr &= ~3;
        !            61:     addr |= (addr>>17)&3;
        !            62: #endif
        !            63:     addr &= ND_EEPROM_MASK;
        !            64:     return addr;
        !            65: }
        !            66: 
        !            67: /* Memory banks */
        !            68: 
        !            69: /* NeXTdimension RAM */
        !            70: 
        !            71: class ND_RAM : public ND_Addrbank {
        !            72:     int bank;
        !            73: public:
        !            74:     ND_RAM(NextDimension* nd, int bank) : ND_Addrbank(nd), bank(bank) {}
        !            75:     
        !            76:     Uint32 lget(Uint32 addr) {
        !            77:         addr &= nd->bankmask[bank];
        !            78:         return do_get_mem_long(nd->ram + addr);
        !            79:     }
        !            80: 
        !            81:     Uint32 wget(Uint32 addr) {
        !            82:         addr &= nd->bankmask[bank];
        !            83:         return do_get_mem_word(nd->ram + addr);
        !            84:     }
        !            85: 
        !            86:     Uint32 bget(Uint32 addr) {
        !            87:         addr &= nd->bankmask[bank];
        !            88:         return nd->ram[addr];
        !            89:     }
        !            90: 
        !            91:      void lput(Uint32 addr, Uint32 l) {
        !            92:         addr &= nd->bankmask[bank];
        !            93:         do_put_mem_long(nd->ram + addr, l);
        !            94:     }
        !            95: 
        !            96:      void wput(Uint32 addr, Uint32 w) {
        !            97:         addr &= nd->bankmask[bank];
        !            98:         do_put_mem_word(nd->ram + addr, w);
        !            99:     }
        !           100: 
        !           101:      void bput(Uint32 addr, Uint32 b) {
        !           102:         addr &= nd->bankmask[bank];
        !           103:         nd->ram[addr] = b;
        !           104:     }
        !           105: };
        !           106: 
        !           107: class ND_Empty : public ND_Addrbank {
        !           108: public:
        !           109:     ND_Empty(NextDimension* nd) : ND_Addrbank(nd) {}
        !           110:     
        !           111:     Uint32 lget(Uint32 addr) {
        !           112:         write_log("[ND] Slot %i: empty memory bank lget at %08X\n", nd->slot,addr);
        !           113:         return 0;
        !           114:     }
        !           115: 
        !           116:      Uint32 wget(Uint32 addr) {
        !           117:         write_log("[ND] Slot %i: empty memory bank wget at %08X\n", nd->slot,addr);
        !           118:         return 0;
        !           119:     }
        !           120: 
        !           121:      Uint32 bget(Uint32 addr) {
        !           122:         write_log("[ND] Slot %i: empty memory bank bget at %08X\n", nd->slot,addr);
        !           123:         return 0;
        !           124:     }
        !           125: 
        !           126:      void lput(Uint32 addr, Uint32 l) {
        !           127:         write_log("[ND] Slot %i: empty memory bank lput at %08X\n", nd->slot,addr);
        !           128:     }
        !           129: 
        !           130:      void wput(Uint32 addr, Uint32 w) {
        !           131:         write_log("[ND] Slot %i: empty memory bank wput at %08X\n", nd->slot,addr);
        !           132:     }
        !           133: 
        !           134:      void bput(Uint32 addr, Uint32 b) {
        !           135:         write_log("[ND] Slot %i: empty memory bank bput at %08X\n",nd->slot,addr);
        !           136:     }
        !           137: };
        !           138: 
        !           139: /* NeXTdimension VRAM */
        !           140: 
        !           141: class ND_VRAM : public ND_Addrbank {
        !           142: public:
        !           143:     ND_VRAM(NextDimension* nd) : ND_Addrbank(nd) {}
        !           144: 
        !           145:     Uint32 lget(Uint32 addr) {
        !           146:         addr &= ND_VRAM_MASK;
        !           147:         return do_get_mem_long(nd->vram + addr);
        !           148:     }
        !           149: 
        !           150:     Uint32 wget(Uint32 addr) {
        !           151:         addr &= ND_VRAM_MASK;
        !           152:         return do_get_mem_word(nd->vram + addr);
        !           153:     }
        !           154: 
        !           155:     Uint32 bget(Uint32 addr) {
        !           156:         addr &= ND_VRAM_MASK;
        !           157:         return nd->vram[addr];
        !           158:     }
        !           159: 
        !           160:     void lput(Uint32 addr, Uint32 l) {
        !           161:         addr &= ND_VRAM_MASK;
        !           162:         do_put_mem_long(nd->vram + addr, l);
        !           163:     }
        !           164: 
        !           165:     void wput(Uint32 addr, Uint32 w) {
        !           166:         addr &= ND_VRAM_MASK;
        !           167:         do_put_mem_word(nd->vram + addr, w);
        !           168:     }
        !           169: 
        !           170:     void bput(Uint32 addr, Uint32 b) {
        !           171:         addr &= ND_VRAM_MASK;
        !           172:         nd->vram[addr] = b;
        !           173:     }
        !           174: };
        !           175: 
        !           176: /* NeXTdimension ROM */
        !           177: 
        !           178: class ND_ROM : public ND_Addrbank {
        !           179: public:
        !           180:     ND_ROM(NextDimension* nd) : ND_Addrbank(nd) {}
        !           181: 
        !           182:     Uint32 lget(Uint32 addr) {
        !           183:         addr = nd_rom_addr_fix(addr);
        !           184:         return (nd->rom_read(addr) << 24); /* byte lane at msb */
        !           185:     }
        !           186: 
        !           187:     Uint32 wget(Uint32 addr) {
        !           188:         addr = nd_rom_addr_fix(addr);
        !           189:         return (nd->rom_read(addr) << 8); /* byte lane at msb */
        !           190:     }
        !           191: 
        !           192:     Uint32 bget(Uint32 addr) {
        !           193:         addr = nd_rom_addr_fix(addr);
        !           194:         return nd->rom_read(addr);
        !           195:     }
        !           196: 
        !           197:     Uint32 cs8get(Uint32 addr) {
        !           198:         addr &= ND_EEPROM_MASK;
        !           199:         return nd->rom[addr];
        !           200:     }
        !           201: 
        !           202:     void lput(Uint32 addr, Uint32 l) {
        !           203:         addr = nd_rom_addr_fix(addr);
        !           204:         nd->rom_write(addr, l >> 24);
        !           205:     }
        !           206: 
        !           207:     void wput(Uint32 addr, Uint32 w) {
        !           208:         addr = nd_rom_addr_fix(addr);
        !           209:         nd->rom_write(addr, w >> 8);
        !           210:     }
        !           211: 
        !           212:     void bput(Uint32 addr, Uint32 b) {
        !           213:         addr = nd_rom_addr_fix(addr);
        !           214:         nd->rom_write(addr, b);
        !           215:     }
        !           216: };
        !           217: 
        !           218: /* Unknown register access functions (memory controller step 1) */
        !           219: #if ND_STEP
        !           220: 
        !           221: class ND_CSR : public ND_Addrbank {
        !           222: public:
        !           223:     ND_CSR(NextDimension* nd) : ND_Addrbank(nd) {}
        !           224: 
        !           225:      Uint32 lget(Uint32 addr) {
        !           226:         write_log("[ND] Slot %i: Board CSR lget at %08X\n", nd->slot,addr);
        !           227:         return 0;
        !           228:     }
        !           229: 
        !           230:      Uint32 wget(Uint32 addr) {
        !           231:         write_log("[ND] Slot %i: Board CSR wget at %08X\n",nd->slot,addr);
        !           232:         return 0;
        !           233:     }
        !           234: 
        !           235:      Uint32 bget(Uint32 addr) {
        !           236:         write_log("[ND] Slot %i: Board CSR bget at %08X\n",nd->slot,addr);
        !           237:         return 0;
        !           238:     }
        !           239: 
        !           240:      void lput(Uint32 addr, Uint32 l) {
        !           241:         write_log("[ND] Slot %i: Board CSR lput at %08X: %08X\n",nd->slot,addr,l);
        !           242:     }
        !           243: 
        !           244:      void wput(Uint32 addr, Uint32 w) {
        !           245:         write_log("[ND] Slot %i: Board CSR wput at %08X: %04X\n",nd->slot,addr,w);
        !           246:     }
        !           247: 
        !           248:      void bput(Uint32 addr, Uint32 b) {
        !           249:         write_log("[ND] Slot %i: Board CSR bput at %08X: %02X\n",nd->slot,addr,b);
        !           250:     }
        !           251: };
        !           252: #endif
        !           253: 
        !           254: /* NeXTdimension dither memory & datapath */
        !           255: 
        !           256: class ND_DMEM : public ND_Addrbank {
        !           257: public:
        !           258:     ND_DMEM(NextDimension* nd) : ND_Addrbank(nd) {}
        !           259: 
        !           260:      Uint32 lget(Uint32 addr) {
        !           261:         addr &= ND_DP_MASK;
        !           262:         return addr < ND_DMEM_SIZE ? do_get_mem_long(nd->dmem + addr) : nd->dp.lget(addr);
        !           263:     }
        !           264: 
        !           265:      Uint32 wget(Uint32 addr) {
        !           266:         addr &= ND_DP_MASK;
        !           267:         return addr < ND_DMEM_SIZE ? do_get_mem_word(nd->dmem + addr) : nd->dp.lget(addr);
        !           268:     }
        !           269: 
        !           270:      Uint32 bget(Uint32 addr) {
        !           271:         addr &= ND_DP_MASK;
        !           272:         return addr < ND_DMEM_SIZE ? do_get_mem_byte(nd->dmem + addr) : nd->dp.lget(addr);
        !           273:     }
        !           274: 
        !           275:      void lput(Uint32 addr, Uint32 l) {
        !           276:         addr &= ND_DP_MASK;
        !           277:         if(addr < ND_DMEM_SIZE)
        !           278:             do_put_mem_long(nd->dmem + addr, l);
        !           279:         else
        !           280:             nd->dp.lput(addr, l);
        !           281:     }
        !           282: 
        !           283:      void wput(Uint32 addr, Uint32 w) {
        !           284:         addr &= ND_DP_MASK;
        !           285:         if(addr < ND_DMEM_SIZE)
        !           286:             do_put_mem_word(nd->dmem + addr, w);
        !           287:         else
        !           288:             nd->dp.lput(addr, w);
        !           289:     }
        !           290: 
        !           291:      void bput(Uint32 addr, Uint32 b) {
        !           292:         addr &= ND_DP_MASK;
        !           293:         if(addr < ND_DMEM_SIZE)
        !           294:             do_put_mem_byte(nd->dmem + addr, b);
        !           295:         else
        !           296:             nd->dp.lput(addr, b);
        !           297:     }
        !           298: };
        !           299: 
        !           300: /* Illegal access functions */
        !           301: 
        !           302: ND_Addrbank::ND_Addrbank(NextDimension* nd) : nd(nd) {}
        !           303: 
        !           304: Uint32 ND_Addrbank::lget(Uint32 addr) {
        !           305:     write_log("[ND] Slot %i: Illegal lget at %08X\n",nd->slot,addr);
        !           306:     return 0;
        !           307: }
        !           308: 
        !           309: Uint32 ND_Addrbank::wget(Uint32 addr) {
        !           310:     write_log("[ND] Slot %i: Illegal wget at %08X\n",nd->slot,addr);
        !           311:     return 0;
        !           312: }
        !           313: 
        !           314: Uint32 ND_Addrbank::bget(Uint32 addr) {
        !           315:     write_log("[ND] Slot %i: Illegal bget at %08X\n",nd->slot,addr);
        !           316:     return 0;
        !           317: }
        !           318: 
        !           319: Uint32 ND_Addrbank::cs8get(Uint32 addr) {
        !           320:     write_log("[ND] Slot %i: Illegal cs8get at %08X\n",nd->slot,addr);
        !           321:     return 0;
        !           322: }
        !           323: 
        !           324: void ND_Addrbank::lput(Uint32 addr, Uint32 l) {
        !           325:     write_log("[ND] Slot %i: Illegal lput at %08X\n",nd->slot,addr);
        !           326: }
        !           327: 
        !           328: void ND_Addrbank::wput(Uint32 addr, Uint32 w) {
        !           329:     write_log("[ND] Slot %i: Illegal wput at %08X\n",nd->slot,addr);
        !           330: }
        !           331: 
        !           332: void ND_Addrbank::bput(Uint32 addr, Uint32 b) {
        !           333:     write_log("[ND] Slot %i: Illegal bput at %08X\n",nd->slot,addr);
        !           334: }
        !           335: 
        !           336: /* NeXTdimension device space */
        !           337: 
        !           338: class ND_IO : public ND_Addrbank {
        !           339: public:
        !           340:     ND_IO(NextDimension* nd) : ND_Addrbank(nd) {}
        !           341:     
        !           342:     Uint32 lget(Uint32 addr) {
        !           343:         return nd->mc.read(addr);
        !           344:     }
        !           345:     
        !           346:     Uint32 wget(Uint32 addr) {return 0;}
        !           347:     
        !           348:     Uint32 bget(Uint32 addr) {return 0;}
        !           349:     
        !           350:     void lput(Uint32 addr, Uint32 l) {
        !           351:         nd->mc.write(addr, l);
        !           352:     }
        !           353:     
        !           354:     void wput(Uint32 addr, Uint32 w) {}
        !           355:     void bput(Uint32 addr, Uint32 b) {}
        !           356: };
        !           357: 
        !           358: /* NeXTdimension RAMDAC */
        !           359: 
        !           360: class ND_RAMDAC : public ND_Addrbank {
        !           361: public:
        !           362:     ND_RAMDAC(NextDimension* nd) : ND_Addrbank(nd) {}
        !           363:     
        !           364:     Uint32 lget(Uint32 addr) {
        !           365:         return bt463_bget(&nd->ramdac, addr) << 24;
        !           366:     }
        !           367:     
        !           368:     Uint32 wget(Uint32 addr) {
        !           369:         return bt463_bget(&nd->ramdac, addr) << 8;
        !           370:     }
        !           371:     
        !           372:     Uint32 bget(Uint32 addr) {
        !           373:         return bt463_bget(&nd->ramdac, addr);
        !           374:     }
        !           375:     
        !           376:     void lput(Uint32 addr, Uint32 l) {
        !           377:         bt463_bput(&nd->ramdac, addr, l >> 24);
        !           378:     }
        !           379:     
        !           380:     void wput(Uint32 addr, Uint32 w) {
        !           381:         bt463_bput(&nd->ramdac, addr, w >> 8);
        !           382:     }
        !           383:     
        !           384:     void bput(Uint32 addr, Uint32 b) {
        !           385:         bt463_bput(&nd->ramdac, addr, b);
        !           386:     }
        !           387: };
        !           388: 
        !           389: void NextDimension::map_banks (ND_Addrbank *bank, int start, int size) {
        !           390:     for (int bnr = start; bnr < start + size; bnr++)
        !           391:         nd_put_mem_bank (bnr << 16, bank);
        !           392:     return;
        !           393: }
        !           394: 
        !           395: void NextDimension::init_mem_banks(void) {
        !           396:     ND_Addrbank* nd_illegal_bank = new ND_Addrbank(this);
        !           397:     for (int i = 0; i < 65536; i++)
        !           398:         nd_put_mem_bank(i<<16, nd_illegal_bank);
        !           399: }
        !           400: 
        !           401: void NextDimension::mem_init(void) {
        !           402:     write_log("[ND] Slot %i: Memory init: Memory size: %iMB\n", slot,
        !           403:               Configuration_CheckDimensionMemory(ConfigureParams.Dimension.board[ND_NUM(slot)].nMemoryBankSize));
        !           404: 
        !           405:     /* Initialize banks with error memory */
        !           406:     init_mem_banks();
        !           407:     
        !           408:     /* Clear first 4k of memory for m68k ROM polling code */
        !           409:     memset(ram, 0, 4096 * sizeof(Uint8));
        !           410:     
        !           411:     /* Map main memory */
        !           412:     
        !           413:     for(int bank = 0; bank < 4; bank++) {
        !           414:         if (ConfigureParams.Dimension.board[ND_NUM(slot)].nMemoryBankSize[bank]) {
        !           415:             bankmask[bank] = ND_RAM_BANKMASK|((ConfigureParams.Dimension.board[ND_NUM(slot)].nMemoryBankSize[bank]<<20)-1);
        !           416:             map_banks(new ND_RAM(this, bank), (ND_RAM_START+(bank*ND_RAM_BANKSIZE))>>16, ND_RAM_BANKSIZE >> 16);
        !           417:             write_log("[ND] Slot %i: Mapping main memory bank%d at $%08x: %iMB\n", slot, bank,
        !           418:                       (ND_RAM_START+(bank*ND_RAM_BANKSIZE)), ConfigureParams.Dimension.board[ND_NUM(slot)].nMemoryBankSize[0]);
        !           419:         } else {
        !           420:             bankmask[bank] = 0;
        !           421:             map_banks(new ND_Empty(this), (ND_RAM_START+(bank*ND_RAM_BANKSIZE))>>16, ND_RAM_BANKSIZE >> 16);
        !           422:             write_log("[ND] Slot %i: Mapping main memory bank%d at $%08x: empty\n", slot, bank,
        !           423:                       (ND_RAM_START+(bank*ND_RAM_BANKSIZE)));
        !           424:         }
        !           425:     }
        !           426:     
        !           427:     write_log("[ND] Slot %i: Mapping video memory at $%08x: %iMB\n", slot,
        !           428:               ND_VRAM_START, ND_VRAM_SIZE/(1024*1024));
        !           429:     map_banks(new ND_VRAM(this), ND_VRAM_START>>16, (4*ND_VRAM_SIZE)>>16);
        !           430:     
        !           431:        write_log("[ND] Slot %i: Mapping ROM at $%08x: %ikB\n", slot,
        !           432:               ND_EEPROM_START, ND_EEPROM_SIZE/1024);
        !           433:        map_banks(new ND_ROM(this), ND_EEPROM_START>>16, (ND_EEPROM_SIZE*8)>>16);
        !           434:     rom_load();
        !           435:        
        !           436:     write_log("[ND] Slot %i: Mapping dither memory and data path at $%08x: %ibyte\n", slot,
        !           437:               ND_DMEM_START, ND_DMEM_SIZE);
        !           438:     map_banks(new ND_DMEM(this), ND_DMEM_START>>16, 1);
        !           439: 
        !           440:        write_log("[ND] Slot %i: Mapping IO memory at $%08x\n", slot, ND_IO_START);
        !           441:        map_banks(new ND_IO(this), ND_IO_START>>16, 1);
        !           442:     
        !           443:     write_log("[ND] Slot %i: Mapping RAMDAC registers at $%08x\n", slot, ND_RAMDAC_START);
        !           444:     map_banks(new ND_RAMDAC(this), ND_RAMDAC_START>>16, 1);
        !           445: #if ND_STEP
        !           446:     write_log("[ND] Slot %i: Mapping board CSR at $%08x\n", slot, ND_CSR_START);
        !           447:     map_banks(new ND_CSR(this), ND_CSR_START>>16, 1);
        !           448: #endif
        !           449: }

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