Diff for /qemu/cpu-common.h between versions and

version, 2018/04/24 17:35:07 version, 2018/04/24 18:24:47
Line 3 Line 3
 /* CPU interfaces that are target indpendent.  */  /* CPU interfaces that are target indpendent.  */
 #if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__)  #if defined(__arm__) || defined(__sparc__) || defined(__mips__) || defined(__hppa__) || defined(__ia64__)
 #endif  #endif
   #include "targphys.h"
   #ifndef NEED_CPU_H
   #include "poison.h"
 #include "bswap.h"  #include "bswap.h"
   #include "qemu-queue.h"
   #if !defined(CONFIG_USER_ONLY)
 /* address in the RAM (different from a physical address) */  /* address in the RAM (different from a physical address) */
 typedef unsigned long ram_addr_t;  typedef unsigned long ram_addr_t;
Line 29  static inline void cpu_register_physical Line 40  static inline void cpu_register_physical
 }  }
 ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);  ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr);
 ram_addr_t qemu_ram_alloc(ram_addr_t);  ram_addr_t qemu_ram_alloc_from_ptr(DeviceState *dev, const char *name,
                           ram_addr_t size, void *host);
   ram_addr_t qemu_ram_alloc(DeviceState *dev, const char *name, ram_addr_t size);
 void qemu_ram_free(ram_addr_t addr);  void qemu_ram_free(ram_addr_t addr);
 /* This should only be used for ram local to a device.  */  /* This should only be used for ram local to a device.  */
 void *qemu_get_ram_ptr(ram_addr_t addr);  void *qemu_get_ram_ptr(ram_addr_t addr);
Line 61  void cpu_physical_memory_unmap(void *buf Line 74  void cpu_physical_memory_unmap(void *buf
 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));  void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
 void cpu_unregister_map_client(void *cookie);  void cpu_unregister_map_client(void *cookie);
   struct CPUPhysMemoryClient;
   typedef struct CPUPhysMemoryClient CPUPhysMemoryClient;
   struct CPUPhysMemoryClient {
       void (*set_memory)(struct CPUPhysMemoryClient *client,
                          target_phys_addr_t start_addr,
                          ram_addr_t size,
                          ram_addr_t phys_offset);
       int (*sync_dirty_bitmap)(struct CPUPhysMemoryClient *client,
                                target_phys_addr_t start_addr,
                                target_phys_addr_t end_addr);
       int (*migration_log)(struct CPUPhysMemoryClient *client,
                            int enable);
       QLIST_ENTRY(CPUPhysMemoryClient) list;
   void cpu_register_phys_memory_client(CPUPhysMemoryClient *);
   void cpu_unregister_phys_memory_client(CPUPhysMemoryClient *);
   /* Coalesced MMIO regions are areas where write operations can be reordered.
    * This usually implies that write operations are side-effect free.  This allows
    * batching which can make a major impact on performance when using
    * virtualization.
   void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
   void qemu_unregister_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size);
   void qemu_flush_coalesced_mmio_buffer(void);
 uint32_t ldub_phys(target_phys_addr_t addr);  uint32_t ldub_phys(target_phys_addr_t addr);
 uint32_t lduw_phys(target_phys_addr_t addr);  uint32_t lduw_phys(target_phys_addr_t addr);
 uint32_t ldl_phys(target_phys_addr_t addr);  uint32_t ldl_phys(target_phys_addr_t addr);
Line 85  void cpu_physical_memory_write_rom(targe Line 127  void cpu_physical_memory_write_rom(targe
 /* Acts like a ROM when read and like a device when written.  */  /* Acts like a ROM when read and like a device when written.  */
 #define IO_MEM_ROMD        (1)  #define IO_MEM_ROMD        (1)
 #define IO_MEM_SUBPAGE     (2)  #define IO_MEM_SUBPAGE     (2)
 #define IO_MEM_SUBWIDTH    (4)  
 #endif /* !CPU_COMMON_H */  #endif /* !CPU_COMMON_H */

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