Annotation of qemu/cpu-defs.h, revision 1.1.1.11

1.1       root        1: /*
                      2:  * common defines for all CPUs
1.1.1.5   root        3:  *
1.1       root        4:  * Copyright (c) 2003 Fabrice Bellard
                      5:  *
                      6:  * This library is free software; you can redistribute it and/or
                      7:  * modify it under the terms of the GNU Lesser General Public
                      8:  * License as published by the Free Software Foundation; either
                      9:  * version 2 of the License, or (at your option) any later version.
                     10:  *
                     11:  * This library is distributed in the hope that it will be useful,
                     12:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
                     13:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
                     14:  * Lesser General Public License for more details.
                     15:  *
                     16:  * You should have received a copy of the GNU Lesser General Public
1.1.1.8   root       17:  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1.1       root       18:  */
                     19: #ifndef CPU_DEFS_H
                     20: #define CPU_DEFS_H
                     21: 
1.1.1.5   root       22: #ifndef NEED_CPU_H
                     23: #error cpu.h included from common code
                     24: #endif
                     25: 
1.1       root       26: #include "config.h"
                     27: #include <setjmp.h>
                     28: #include <inttypes.h>
1.1.1.7   root       29: #include <signal.h>
1.1       root       30: #include "osdep.h"
1.1.1.9   root       31: #include "qemu-queue.h"
1.1.1.8   root       32: #include "targphys.h"
1.1       root       33: 
                     34: #ifndef TARGET_LONG_BITS
                     35: #error TARGET_LONG_BITS must be defined before including this header
                     36: #endif
                     37: 
                     38: #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8)
                     39: 
1.1.1.11! root       40: typedef int16_t target_short __attribute__ ((aligned(TARGET_SHORT_ALIGNMENT)));
        !            41: typedef uint16_t target_ushort __attribute__((aligned(TARGET_SHORT_ALIGNMENT)));
        !            42: typedef int32_t target_int __attribute__((aligned(TARGET_INT_ALIGNMENT)));
        !            43: typedef uint32_t target_uint __attribute__((aligned(TARGET_INT_ALIGNMENT)));
        !            44: typedef int64_t target_llong __attribute__((aligned(TARGET_LLONG_ALIGNMENT)));
        !            45: typedef uint64_t target_ullong __attribute__((aligned(TARGET_LLONG_ALIGNMENT)));
1.1       root       46: /* target_ulong is the type of a virtual address */
                     47: #if TARGET_LONG_SIZE == 4
1.1.1.11! root       48: typedef int32_t target_long __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
        !            49: typedef uint32_t target_ulong __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
1.1       root       50: #define TARGET_FMT_lx "%08x"
1.1.1.5   root       51: #define TARGET_FMT_ld "%d"
                     52: #define TARGET_FMT_lu "%u"
1.1       root       53: #elif TARGET_LONG_SIZE == 8
1.1.1.11! root       54: typedef int64_t target_long __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
        !            55: typedef uint64_t target_ulong __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
1.1.1.3   root       56: #define TARGET_FMT_lx "%016" PRIx64
1.1.1.5   root       57: #define TARGET_FMT_ld "%" PRId64
                     58: #define TARGET_FMT_lu "%" PRIu64
1.1       root       59: #else
                     60: #error TARGET_LONG_SIZE undefined
                     61: #endif
                     62: 
                     63: #define HOST_LONG_SIZE (HOST_LONG_BITS / 8)
                     64: 
                     65: #define EXCP_INTERRUPT         0x10000 /* async interruption */
                     66: #define EXCP_HLT        0x10001 /* hlt instruction reached */
                     67: #define EXCP_DEBUG      0x10002 /* cpu stopped after a breakpoint or singlestep */
1.1.1.2   root       68: #define EXCP_HALTED     0x10003 /* cpu is halted (waiting for external event) */
1.1       root       69: 
1.1.1.2   root       70: #define TB_JMP_CACHE_BITS 12
                     71: #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
                     72: 
1.1.1.4   root       73: /* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for
                     74:    addresses on the same page.  The top bits are the same.  This allows
                     75:    TLB invalidation to quickly clear a subset of the hash table.  */
                     76: #define TB_JMP_PAGE_BITS (TB_JMP_CACHE_BITS / 2)
                     77: #define TB_JMP_PAGE_SIZE (1 << TB_JMP_PAGE_BITS)
                     78: #define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1)
                     79: #define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE)
                     80: 
1.1.1.10  root       81: #if !defined(CONFIG_USER_ONLY)
1.1.1.2   root       82: #define CPU_TLB_BITS 8
                     83: #define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
1.1       root       84: 
1.1.1.10  root       85: #if HOST_LONG_BITS == 32 && TARGET_LONG_BITS == 32
1.1.1.6   root       86: #define CPU_TLB_ENTRY_BITS 4
                     87: #else
                     88: #define CPU_TLB_ENTRY_BITS 5
                     89: #endif
                     90: 
1.1       root       91: typedef struct CPUTLBEntry {
1.1.1.6   root       92:     /* bit TARGET_LONG_BITS to TARGET_PAGE_BITS : virtual address
                     93:        bit TARGET_PAGE_BITS-1..4  : Nonzero for accesses that should not
                     94:                                     go directly to ram.
1.1       root       95:        bit 3                      : indicates that the entry is invalid
                     96:        bit 2..0                   : zero
                     97:     */
1.1.1.5   root       98:     target_ulong addr_read;
                     99:     target_ulong addr_write;
                    100:     target_ulong addr_code;
1.1.1.10  root      101:     /* Addend to virtual address to get host address.  IO accesses
1.1.1.6   root      102:        use the corresponding iotlb value.  */
1.1.1.10  root      103:     unsigned long addend;
1.1.1.6   root      104:     /* padding to get a power of two size */
                    105:     uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) - 
                    106:                   (sizeof(target_ulong) * 3 + 
1.1.1.10  root      107:                    ((-sizeof(target_ulong) * 3) & (sizeof(unsigned long) - 1)) + 
                    108:                    sizeof(unsigned long))];
1.1       root      109: } CPUTLBEntry;
                    110: 
1.1.1.10  root      111: extern int CPUTLBEntry_wrong_size[sizeof(CPUTLBEntry) == (1 << CPU_TLB_ENTRY_BITS) ? 1 : -1];
                    112: 
                    113: #define CPU_COMMON_TLB \
                    114:     /* The meaning of the MMU modes is defined in the target code. */   \
                    115:     CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE];                  \
                    116:     target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE];               \
                    117:     target_ulong tlb_flush_addr;                                        \
                    118:     target_ulong tlb_flush_mask;
                    119: 
                    120: #else
                    121: 
                    122: #define CPU_COMMON_TLB
                    123: 
                    124: #endif
                    125: 
                    126: 
1.1.1.9   root      127: #ifdef HOST_WORDS_BIGENDIAN
1.1.1.6   root      128: typedef struct icount_decr_u16 {
                    129:     uint16_t high;
                    130:     uint16_t low;
                    131: } icount_decr_u16;
                    132: #else
                    133: typedef struct icount_decr_u16 {
                    134:     uint16_t low;
                    135:     uint16_t high;
                    136: } icount_decr_u16;
                    137: #endif
                    138: 
                    139: struct kvm_run;
                    140: struct KVMState;
1.1.1.10  root      141: struct qemu_work_item;
1.1.1.6   root      142: 
                    143: typedef struct CPUBreakpoint {
                    144:     target_ulong pc;
                    145:     int flags; /* BP_* */
1.1.1.9   root      146:     QTAILQ_ENTRY(CPUBreakpoint) entry;
1.1.1.6   root      147: } CPUBreakpoint;
                    148: 
                    149: typedef struct CPUWatchpoint {
                    150:     target_ulong vaddr;
                    151:     target_ulong len_mask;
                    152:     int flags; /* BP_* */
1.1.1.9   root      153:     QTAILQ_ENTRY(CPUWatchpoint) entry;
1.1.1.6   root      154: } CPUWatchpoint;
                    155: 
                    156: #define CPU_TEMP_BUF_NLONGS 128
1.1.1.2   root      157: #define CPU_COMMON                                                      \
                    158:     struct TranslationBlock *current_tb; /* currently executing TB  */  \
                    159:     /* soft mmu support */                                              \
1.1.1.6   root      160:     /* in order to avoid passing too many arguments to the MMIO         \
                    161:        helpers, we store some rarely used information in the CPU        \
1.1.1.2   root      162:        context) */                                                      \
1.1.1.6   root      163:     unsigned long mem_io_pc; /* host pc at which the memory was         \
                    164:                                 accessed */                             \
                    165:     target_ulong mem_io_vaddr; /* target virtual addr at which the      \
                    166:                                      memory was accessed */             \
                    167:     uint32_t halted; /* Nonzero if the CPU is in suspend state */       \
                    168:     uint32_t interrupt_request;                                         \
1.1.1.7   root      169:     volatile sig_atomic_t exit_request;                                 \
1.1.1.10  root      170:     CPU_COMMON_TLB                                                      \
1.1.1.2   root      171:     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];           \
1.1.1.6   root      172:     /* buffer for temporaries in the code generator */                  \
                    173:     long temp_buf[CPU_TEMP_BUF_NLONGS];                                 \
                    174:                                                                         \
                    175:     int64_t icount_extra; /* Instructions until next timer event.  */   \
                    176:     /* Number of cycles left, with interrupt flag in high bit.          \
                    177:        This allows a single read-compare-cbranch-write sequence to test \
                    178:        for both decrementer underflow and exceptions.  */               \
                    179:     union {                                                             \
                    180:         uint32_t u32;                                                   \
                    181:         icount_decr_u16 u16;                                            \
                    182:     } icount_decr;                                                      \
                    183:     uint32_t can_do_io; /* nonzero if memory mapped IO is safe.  */     \
1.1.1.2   root      184:                                                                         \
                    185:     /* from this point: preserved by CPU reset */                       \
                    186:     /* ice debug support */                                             \
1.1.1.9   root      187:     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;            \
1.1.1.2   root      188:     int singlestep_enabled;                                             \
                    189:                                                                         \
1.1.1.9   root      190:     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;            \
1.1.1.6   root      191:     CPUWatchpoint *watchpoint_hit;                                      \
                    192:                                                                         \
                    193:     struct GDBRegisterState *gdb_regs;                                  \
                    194:                                                                         \
                    195:     /* Core interrupt code */                                           \
                    196:     jmp_buf jmp_env;                                                    \
                    197:     int exception_index;                                                \
1.1.1.5   root      198:                                                                         \
1.1.1.8   root      199:     CPUState *next_cpu; /* next CPU sharing TB cache */                 \
1.1.1.2   root      200:     int cpu_index; /* CPU index (informative) */                        \
1.1.1.8   root      201:     uint32_t host_tid; /* host thread ID */                             \
                    202:     int numa_node; /* NUMA node this cpu is belonging to  */            \
1.1.1.9   root      203:     int nr_cores;  /* number of cores within this CPU package */        \
                    204:     int nr_threads;/* number of threads within this CPU */              \
1.1.1.6   root      205:     int running; /* Nonzero if cpu is currently running(usermode).  */  \
1.1.1.11! root      206:     int thread_id;                                                      \
1.1.1.2   root      207:     /* user data */                                                     \
1.1.1.5   root      208:     void *opaque;                                                       \
                    209:                                                                         \
1.1.1.8   root      210:     uint32_t created;                                                   \
1.1.1.10  root      211:     uint32_t stop;   /* Stop request */                                 \
                    212:     uint32_t stopped; /* Artificially stopped */                        \
1.1.1.8   root      213:     struct QemuThread *thread;                                          \
                    214:     struct QemuCond *halt_cond;                                         \
1.1.1.11! root      215:     int thread_kicked;                                                  \
1.1.1.10  root      216:     struct qemu_work_item *queued_work_first, *queued_work_last;        \
1.1.1.6   root      217:     const char *cpu_model_str;                                          \
                    218:     struct KVMState *kvm_state;                                         \
                    219:     struct kvm_run *kvm_run;                                            \
1.1.1.10  root      220:     int kvm_fd;                                                         \
                    221:     int kvm_vcpu_dirty;
1.1.1.2   root      222: 
1.1       root      223: #endif

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