Annotation of qemu/cpu-defs.h, revision 1.1.1.12

1.1       root        1: /*
                      2:  * common defines for all CPUs
1.1.1.5   root        3:  *
1.1       root        4:  * Copyright (c) 2003 Fabrice Bellard
                      5:  *
                      6:  * This library is free software; you can redistribute it and/or
                      7:  * modify it under the terms of the GNU Lesser General Public
                      8:  * License as published by the Free Software Foundation; either
                      9:  * version 2 of the License, or (at your option) any later version.
                     10:  *
                     11:  * This library is distributed in the hope that it will be useful,
                     12:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
                     13:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
                     14:  * Lesser General Public License for more details.
                     15:  *
                     16:  * You should have received a copy of the GNU Lesser General Public
1.1.1.8   root       17:  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
1.1       root       18:  */
                     19: #ifndef CPU_DEFS_H
                     20: #define CPU_DEFS_H
                     21: 
1.1.1.5   root       22: #ifndef NEED_CPU_H
                     23: #error cpu.h included from common code
                     24: #endif
                     25: 
1.1       root       26: #include "config.h"
                     27: #include <setjmp.h>
                     28: #include <inttypes.h>
1.1.1.7   root       29: #include <signal.h>
1.1       root       30: #include "osdep.h"
1.1.1.9   root       31: #include "qemu-queue.h"
1.1.1.8   root       32: #include "targphys.h"
1.1       root       33: 
                     34: #ifndef TARGET_LONG_BITS
                     35: #error TARGET_LONG_BITS must be defined before including this header
                     36: #endif
                     37: 
                     38: #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8)
                     39: 
1.1.1.11  root       40: typedef int16_t target_short __attribute__ ((aligned(TARGET_SHORT_ALIGNMENT)));
                     41: typedef uint16_t target_ushort __attribute__((aligned(TARGET_SHORT_ALIGNMENT)));
                     42: typedef int32_t target_int __attribute__((aligned(TARGET_INT_ALIGNMENT)));
                     43: typedef uint32_t target_uint __attribute__((aligned(TARGET_INT_ALIGNMENT)));
                     44: typedef int64_t target_llong __attribute__((aligned(TARGET_LLONG_ALIGNMENT)));
                     45: typedef uint64_t target_ullong __attribute__((aligned(TARGET_LLONG_ALIGNMENT)));
1.1       root       46: /* target_ulong is the type of a virtual address */
                     47: #if TARGET_LONG_SIZE == 4
1.1.1.11  root       48: typedef int32_t target_long __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
                     49: typedef uint32_t target_ulong __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
1.1       root       50: #define TARGET_FMT_lx "%08x"
1.1.1.5   root       51: #define TARGET_FMT_ld "%d"
                     52: #define TARGET_FMT_lu "%u"
1.1       root       53: #elif TARGET_LONG_SIZE == 8
1.1.1.11  root       54: typedef int64_t target_long __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
                     55: typedef uint64_t target_ulong __attribute__((aligned(TARGET_LONG_ALIGNMENT)));
1.1.1.3   root       56: #define TARGET_FMT_lx "%016" PRIx64
1.1.1.5   root       57: #define TARGET_FMT_ld "%" PRId64
                     58: #define TARGET_FMT_lu "%" PRIu64
1.1       root       59: #else
                     60: #error TARGET_LONG_SIZE undefined
                     61: #endif
                     62: 
                     63: #define EXCP_INTERRUPT         0x10000 /* async interruption */
                     64: #define EXCP_HLT        0x10001 /* hlt instruction reached */
                     65: #define EXCP_DEBUG      0x10002 /* cpu stopped after a breakpoint or singlestep */
1.1.1.2   root       66: #define EXCP_HALTED     0x10003 /* cpu is halted (waiting for external event) */
1.1       root       67: 
1.1.1.2   root       68: #define TB_JMP_CACHE_BITS 12
                     69: #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS)
                     70: 
1.1.1.4   root       71: /* Only the bottom TB_JMP_PAGE_BITS of the jump cache hash bits vary for
                     72:    addresses on the same page.  The top bits are the same.  This allows
                     73:    TLB invalidation to quickly clear a subset of the hash table.  */
                     74: #define TB_JMP_PAGE_BITS (TB_JMP_CACHE_BITS / 2)
                     75: #define TB_JMP_PAGE_SIZE (1 << TB_JMP_PAGE_BITS)
                     76: #define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1)
                     77: #define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE)
                     78: 
1.1.1.10  root       79: #if !defined(CONFIG_USER_ONLY)
1.1.1.2   root       80: #define CPU_TLB_BITS 8
                     81: #define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
1.1       root       82: 
1.1.1.10  root       83: #if HOST_LONG_BITS == 32 && TARGET_LONG_BITS == 32
1.1.1.6   root       84: #define CPU_TLB_ENTRY_BITS 4
                     85: #else
                     86: #define CPU_TLB_ENTRY_BITS 5
                     87: #endif
                     88: 
1.1       root       89: typedef struct CPUTLBEntry {
1.1.1.6   root       90:     /* bit TARGET_LONG_BITS to TARGET_PAGE_BITS : virtual address
                     91:        bit TARGET_PAGE_BITS-1..4  : Nonzero for accesses that should not
                     92:                                     go directly to ram.
1.1       root       93:        bit 3                      : indicates that the entry is invalid
                     94:        bit 2..0                   : zero
                     95:     */
1.1.1.5   root       96:     target_ulong addr_read;
                     97:     target_ulong addr_write;
                     98:     target_ulong addr_code;
1.1.1.10  root       99:     /* Addend to virtual address to get host address.  IO accesses
1.1.1.6   root      100:        use the corresponding iotlb value.  */
1.1.1.12! root      101:     uintptr_t addend;
1.1.1.6   root      102:     /* padding to get a power of two size */
1.1.1.12! root      103:     uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
        !           104:                   (sizeof(target_ulong) * 3 +
        !           105:                    ((-sizeof(target_ulong) * 3) & (sizeof(uintptr_t) - 1)) +
        !           106:                    sizeof(uintptr_t))];
1.1       root      107: } CPUTLBEntry;
                    108: 
1.1.1.10  root      109: extern int CPUTLBEntry_wrong_size[sizeof(CPUTLBEntry) == (1 << CPU_TLB_ENTRY_BITS) ? 1 : -1];
                    110: 
                    111: #define CPU_COMMON_TLB \
                    112:     /* The meaning of the MMU modes is defined in the target code. */   \
                    113:     CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE];                  \
                    114:     target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE];               \
                    115:     target_ulong tlb_flush_addr;                                        \
                    116:     target_ulong tlb_flush_mask;
                    117: 
                    118: #else
                    119: 
                    120: #define CPU_COMMON_TLB
                    121: 
                    122: #endif
                    123: 
                    124: 
1.1.1.9   root      125: #ifdef HOST_WORDS_BIGENDIAN
1.1.1.6   root      126: typedef struct icount_decr_u16 {
                    127:     uint16_t high;
                    128:     uint16_t low;
                    129: } icount_decr_u16;
                    130: #else
                    131: typedef struct icount_decr_u16 {
                    132:     uint16_t low;
                    133:     uint16_t high;
                    134: } icount_decr_u16;
                    135: #endif
                    136: 
                    137: struct kvm_run;
                    138: struct KVMState;
1.1.1.10  root      139: struct qemu_work_item;
1.1.1.6   root      140: 
                    141: typedef struct CPUBreakpoint {
                    142:     target_ulong pc;
                    143:     int flags; /* BP_* */
1.1.1.9   root      144:     QTAILQ_ENTRY(CPUBreakpoint) entry;
1.1.1.6   root      145: } CPUBreakpoint;
                    146: 
                    147: typedef struct CPUWatchpoint {
                    148:     target_ulong vaddr;
                    149:     target_ulong len_mask;
                    150:     int flags; /* BP_* */
1.1.1.9   root      151:     QTAILQ_ENTRY(CPUWatchpoint) entry;
1.1.1.6   root      152: } CPUWatchpoint;
                    153: 
1.1.1.12! root      154: #ifdef _WIN32
        !           155: #define CPU_COMMON_THREAD \
        !           156:     void *hThread;
        !           157: 
        !           158: #else
        !           159: #define CPU_COMMON_THREAD
        !           160: #endif
        !           161: 
1.1.1.6   root      162: #define CPU_TEMP_BUF_NLONGS 128
1.1.1.2   root      163: #define CPU_COMMON                                                      \
                    164:     struct TranslationBlock *current_tb; /* currently executing TB  */  \
                    165:     /* soft mmu support */                                              \
1.1.1.6   root      166:     /* in order to avoid passing too many arguments to the MMIO         \
                    167:        helpers, we store some rarely used information in the CPU        \
1.1.1.2   root      168:        context) */                                                      \
1.1.1.12! root      169:     uintptr_t mem_io_pc; /* host pc at which the memory was             \
        !           170:                             accessed */                                 \
1.1.1.6   root      171:     target_ulong mem_io_vaddr; /* target virtual addr at which the      \
                    172:                                      memory was accessed */             \
                    173:     uint32_t halted; /* Nonzero if the CPU is in suspend state */       \
                    174:     uint32_t interrupt_request;                                         \
1.1.1.7   root      175:     volatile sig_atomic_t exit_request;                                 \
1.1.1.10  root      176:     CPU_COMMON_TLB                                                      \
1.1.1.2   root      177:     struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE];           \
1.1.1.6   root      178:     /* buffer for temporaries in the code generator */                  \
                    179:     long temp_buf[CPU_TEMP_BUF_NLONGS];                                 \
                    180:                                                                         \
                    181:     int64_t icount_extra; /* Instructions until next timer event.  */   \
                    182:     /* Number of cycles left, with interrupt flag in high bit.          \
                    183:        This allows a single read-compare-cbranch-write sequence to test \
                    184:        for both decrementer underflow and exceptions.  */               \
                    185:     union {                                                             \
                    186:         uint32_t u32;                                                   \
                    187:         icount_decr_u16 u16;                                            \
                    188:     } icount_decr;                                                      \
                    189:     uint32_t can_do_io; /* nonzero if memory mapped IO is safe.  */     \
1.1.1.2   root      190:                                                                         \
                    191:     /* from this point: preserved by CPU reset */                       \
                    192:     /* ice debug support */                                             \
1.1.1.9   root      193:     QTAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints;            \
1.1.1.2   root      194:     int singlestep_enabled;                                             \
                    195:                                                                         \
1.1.1.9   root      196:     QTAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints;            \
1.1.1.6   root      197:     CPUWatchpoint *watchpoint_hit;                                      \
                    198:                                                                         \
                    199:     struct GDBRegisterState *gdb_regs;                                  \
                    200:                                                                         \
                    201:     /* Core interrupt code */                                           \
                    202:     jmp_buf jmp_env;                                                    \
                    203:     int exception_index;                                                \
1.1.1.5   root      204:                                                                         \
1.1.1.12! root      205:     CPUArchState *next_cpu; /* next CPU sharing TB cache */                 \
1.1.1.2   root      206:     int cpu_index; /* CPU index (informative) */                        \
1.1.1.8   root      207:     uint32_t host_tid; /* host thread ID */                             \
                    208:     int numa_node; /* NUMA node this cpu is belonging to  */            \
1.1.1.9   root      209:     int nr_cores;  /* number of cores within this CPU package */        \
                    210:     int nr_threads;/* number of threads within this CPU */              \
1.1.1.6   root      211:     int running; /* Nonzero if cpu is currently running(usermode).  */  \
1.1.1.11  root      212:     int thread_id;                                                      \
1.1.1.2   root      213:     /* user data */                                                     \
1.1.1.5   root      214:     void *opaque;                                                       \
                    215:                                                                         \
1.1.1.8   root      216:     uint32_t created;                                                   \
1.1.1.10  root      217:     uint32_t stop;   /* Stop request */                                 \
                    218:     uint32_t stopped; /* Artificially stopped */                        \
1.1.1.8   root      219:     struct QemuThread *thread;                                          \
1.1.1.12! root      220:     CPU_COMMON_THREAD                                                   \
1.1.1.8   root      221:     struct QemuCond *halt_cond;                                         \
1.1.1.11  root      222:     int thread_kicked;                                                  \
1.1.1.10  root      223:     struct qemu_work_item *queued_work_first, *queued_work_last;        \
1.1.1.6   root      224:     const char *cpu_model_str;                                          \
                    225:     struct KVMState *kvm_state;                                         \
                    226:     struct kvm_run *kvm_run;                                            \
1.1.1.10  root      227:     int kvm_fd;                                                         \
                    228:     int kvm_vcpu_dirty;
1.1.1.2   root      229: 
1.1       root      230: #endif

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