Diff for /qemu/exec-all.h between versions 1.1.1.10 and 1.1.1.11

version 1.1.1.10, 2018/04/24 17:33:45 version 1.1.1.11, 2018/04/24 18:23:09
Line 25 Line 25
 /* allow to see translation results - the slowdown should be negligible, so we leave it */  /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS  #define DEBUG_DISAS
   
   /* Page tracking code uses ram addresses in system mode, and virtual
      addresses in userspace mode.  Define tb_page_addr_t to be an appropriate
      type.  */
   #if defined(CONFIG_USER_ONLY)
   typedef abi_ulong tb_page_addr_t;
   #else
   typedef ram_addr_t tb_page_addr_t;
   #endif
   
 /* is_jmp field values */  /* is_jmp field values */
 #define DISAS_NEXT    0 /* next instruction can be analyzed */  #define DISAS_NEXT    0 /* next instruction can be analyzed */
 #define DISAS_JUMP    1 /* only pc was modified dynamically */  #define DISAS_JUMP    1 /* only pc was modified dynamically */
Line 35  typedef struct TranslationBlock Translat Line 44  typedef struct TranslationBlock Translat
   
 /* XXX: make safe guess about sizes */  /* XXX: make safe guess about sizes */
 #define MAX_OP_PER_INSTR 96  #define MAX_OP_PER_INSTR 96
 /* A Call op needs up to 6 + 2N parameters (N = number of arguments).  */  
 #define MAX_OPC_PARAM 10  #if HOST_LONG_BITS == 32
   #define MAX_OPC_PARAM_PER_ARG 2
   #else
   #define MAX_OPC_PARAM_PER_ARG 1
   #endif
   #define MAX_OPC_PARAM_IARGS 4
   #define MAX_OPC_PARAM_OARGS 1
   #define MAX_OPC_PARAM_ARGS (MAX_OPC_PARAM_IARGS + MAX_OPC_PARAM_OARGS)
   
   /* A Call op needs up to 4 + 2N parameters on 32-bit archs,
    * and up to 4 + N parameters on 64-bit archs
    * (N = number of input arguments + output arguments).  */
   #define MAX_OPC_PARAM (4 + (MAX_OPC_PARAM_PER_ARG * MAX_OPC_PARAM_ARGS))
 #define OPC_BUF_SIZE 640  #define OPC_BUF_SIZE 640
 #define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)  #define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR)
   
Line 49  typedef struct TranslationBlock Translat Line 70  typedef struct TranslationBlock Translat
 #define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM)  #define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM)
   
 extern target_ulong gen_opc_pc[OPC_BUF_SIZE];  extern target_ulong gen_opc_pc[OPC_BUF_SIZE];
 extern target_ulong gen_opc_npc[OPC_BUF_SIZE];  
 extern uint8_t gen_opc_cc_op[OPC_BUF_SIZE];  
 extern uint8_t gen_opc_instr_start[OPC_BUF_SIZE];  extern uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 extern uint16_t gen_opc_icount[OPC_BUF_SIZE];  extern uint16_t gen_opc_icount[OPC_BUF_SIZE];
 extern target_ulong gen_opc_jump_pc[2];  
 extern uint32_t gen_opc_hflags[OPC_BUF_SIZE];  
   
 #include "qemu-log.h"  #include "qemu-log.h"
   
Line 63  void gen_intermediate_code_pc(CPUState * Line 80  void gen_intermediate_code_pc(CPUState *
 void gen_pc_load(CPUState *env, struct TranslationBlock *tb,  void gen_pc_load(CPUState *env, struct TranslationBlock *tb,
                  unsigned long searched_pc, int pc_pos, void *puc);                   unsigned long searched_pc, int pc_pos, void *puc);
   
 unsigned long code_gen_max_block_size(void);  
 void cpu_gen_init(void);  void cpu_gen_init(void);
 int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,  int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,
                  int *gen_code_size_ptr);                   int *gen_code_size_ptr);
 int cpu_restore_state(struct TranslationBlock *tb,  int cpu_restore_state(struct TranslationBlock *tb,
                       CPUState *env, unsigned long searched_pc,                        CPUState *env, unsigned long searched_pc,
                       void *puc);                        void *puc);
 int cpu_restore_state_copy(struct TranslationBlock *tb,  
                            CPUState *env, unsigned long searched_pc,  
                            void *puc);  
 void cpu_resume_from_signal(CPUState *env1, void *puc);  void cpu_resume_from_signal(CPUState *env1, void *puc);
 void cpu_io_recompile(CPUState *env, void *retaddr);  void cpu_io_recompile(CPUState *env, void *retaddr);
 TranslationBlock *tb_gen_code(CPUState *env,   TranslationBlock *tb_gen_code(CPUState *env, 
Line 81  TranslationBlock *tb_gen_code(CPUState * Line 94  TranslationBlock *tb_gen_code(CPUState *
 void cpu_exec_init(CPUState *env);  void cpu_exec_init(CPUState *env);
 void QEMU_NORETURN cpu_loop_exit(void);  void QEMU_NORETURN cpu_loop_exit(void);
 int page_unprotect(target_ulong address, unsigned long pc, void *puc);  int page_unprotect(target_ulong address, unsigned long pc, void *puc);
 void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end,  void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
                                    int is_cpu_write_access);                                     int is_cpu_write_access);
 void tb_invalidate_page_range(target_ulong start, target_ulong end);  void tb_invalidate_page_range(target_ulong start, target_ulong end);
 void tlb_flush_page(CPUState *env, target_ulong addr);  void tlb_flush_page(CPUState *env, target_ulong addr);
 void tlb_flush(CPUState *env, int flush_global);  void tlb_flush(CPUState *env, int flush_global);
 int tlb_set_page_exec(CPUState *env, target_ulong vaddr,  #if !defined(CONFIG_USER_ONLY)
                       target_phys_addr_t paddr, int prot,  void tlb_set_page(CPUState *env, target_ulong vaddr,
                       int mmu_idx, int is_softmmu);                    target_phys_addr_t paddr, int prot,
 static inline int tlb_set_page(CPUState *env1, target_ulong vaddr,                    int mmu_idx, target_ulong size);
                                target_phys_addr_t paddr, int prot,  #endif
                                int mmu_idx, int is_softmmu)  
 {  
     if (prot & PAGE_READ)  
         prot |= PAGE_EXEC;  
     return tlb_set_page_exec(env1, vaddr, paddr, prot, mmu_idx, is_softmmu);  
 }  
   
 #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */  #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */
   
Line 134  struct TranslationBlock { Line 141  struct TranslationBlock {
     /* first and second physical page containing code. The lower bit      /* first and second physical page containing code. The lower bit
        of the pointer tells the index in page_next[] */         of the pointer tells the index in page_next[] */
     struct TranslationBlock *page_next[2];      struct TranslationBlock *page_next[2];
     target_ulong page_addr[2];      tb_page_addr_t page_addr[2];
   
     /* the following data are used to directly call another TB from      /* the following data are used to directly call another TB from
        the code of this one. */         the code of this one. */
     uint16_t tb_next_offset[2]; /* offset of original jump target */      uint16_t tb_next_offset[2]; /* offset of original jump target */
 #ifdef USE_DIRECT_JUMP  #ifdef USE_DIRECT_JUMP
     uint16_t tb_jmp_offset[4]; /* offset of jump instruction */      uint16_t tb_jmp_offset[2]; /* offset of jump instruction */
 #else  #else
     unsigned long tb_next[2]; /* address of jump generated code */      unsigned long tb_next[2]; /* address of jump generated code */
 #endif  #endif
Line 168  static inline unsigned int tb_jmp_cache_ Line 175  static inline unsigned int tb_jmp_cache_
             | (tmp & TB_JMP_ADDR_MASK));              | (tmp & TB_JMP_ADDR_MASK));
 }  }
   
 static inline unsigned int tb_phys_hash_func(unsigned long pc)  static inline unsigned int tb_phys_hash_func(tb_page_addr_t pc)
 {  {
     return pc & (CODE_GEN_PHYS_HASH_SIZE - 1);      return pc & (CODE_GEN_PHYS_HASH_SIZE - 1);
 }  }
Line 176  static inline unsigned int tb_phys_hash_ Line 183  static inline unsigned int tb_phys_hash_
 TranslationBlock *tb_alloc(target_ulong pc);  TranslationBlock *tb_alloc(target_ulong pc);
 void tb_free(TranslationBlock *tb);  void tb_free(TranslationBlock *tb);
 void tb_flush(CPUState *env);  void tb_flush(CPUState *env);
 void tb_link_phys(TranslationBlock *tb,  void tb_link_page(TranslationBlock *tb,
                   target_ulong phys_pc, target_ulong phys_page2);                    tb_page_addr_t phys_pc, tb_page_addr_t phys_page2);
 void tb_phys_invalidate(TranslationBlock *tb, target_ulong page_addr);  void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr);
   
 extern TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];  extern TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
 extern uint8_t *code_gen_ptr;  
 extern int code_gen_max_blocks;  
   
 #if defined(USE_DIRECT_JUMP)  #if defined(USE_DIRECT_JUMP)
   
Line 231  static inline void tb_set_jmp_target(Tra Line 236  static inline void tb_set_jmp_target(Tra
   
     offset = tb->tb_jmp_offset[n];      offset = tb->tb_jmp_offset[n];
     tb_set_jmp_target1((unsigned long)(tb->tc_ptr + offset), addr);      tb_set_jmp_target1((unsigned long)(tb->tc_ptr + offset), addr);
     offset = tb->tb_jmp_offset[n + 2];  
     if (offset != 0xffff)  
         tb_set_jmp_target1((unsigned long)(tb->tc_ptr + offset), addr);  
 }  }
   
 #else  #else
Line 263  static inline void tb_add_jump(Translati Line 265  static inline void tb_add_jump(Translati
   
 TranslationBlock *tb_find_pc(unsigned long pc_ptr);  TranslationBlock *tb_find_pc(unsigned long pc_ptr);
   
 extern CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];  
 extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];  
 extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];  
   
 #include "qemu-lock.h"  #include "qemu-lock.h"
   
 extern spinlock_t tb_lock;  extern spinlock_t tb_lock;
Line 275  extern int tb_invalidated_flag; Line 273  extern int tb_invalidated_flag;
   
 #if !defined(CONFIG_USER_ONLY)  #if !defined(CONFIG_USER_ONLY)
   
   extern CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];
   extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
   extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];
   
 void tlb_fill(target_ulong addr, int is_write, int mmu_idx,  void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
               void *retaddr);                void *retaddr);
   
Line 303  void tlb_fill(target_ulong addr, int is_ Line 305  void tlb_fill(target_ulong addr, int is_
 #endif  #endif
   
 #if defined(CONFIG_USER_ONLY)  #if defined(CONFIG_USER_ONLY)
 static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)  static inline tb_page_addr_t get_page_addr_code(CPUState *env1, target_ulong addr)
 {  {
     return addr;      return addr;
 }  }
Line 311  static inline target_ulong get_phys_addr Line 313  static inline target_ulong get_phys_addr
 /* NOTE: this function can trigger an exception */  /* NOTE: this function can trigger an exception */
 /* NOTE2: the returned address is not exactly the physical address: it  /* NOTE2: the returned address is not exactly the physical address: it
    is the offset relative to phys_ram_base */     is the offset relative to phys_ram_base */
 static inline target_ulong get_phys_addr_code(CPUState *env1, target_ulong addr)  static inline tb_page_addr_t get_page_addr_code(CPUState *env1, target_ulong addr)
 {  {
     int mmu_idx, page_index, pd;      int mmu_idx, page_index, pd;
     void *p;      void *p;
Line 334  static inline target_ulong get_phys_addr Line 336  static inline target_ulong get_phys_addr
         + env1->tlb_table[mmu_idx][page_index].addend;          + env1->tlb_table[mmu_idx][page_index].addend;
     return qemu_ram_addr_from_host(p);      return qemu_ram_addr_from_host(p);
 }  }
   
 /* Deterministic execution requires that IO only be performed on the last  
    instruction of a TB so that interrupts take effect immediately.  */  
 static inline int can_do_io(CPUState *env)  
 {  
     if (!use_icount)  
         return 1;  
   
     /* If not executing code then assume we are ok.  */  
     if (!env->current_tb)  
         return 1;  
   
     return env->can_do_io != 0;  
 }  
 #endif  #endif
   
 typedef void (CPUDebugExcpHandler)(CPUState *env);  typedef void (CPUDebugExcpHandler)(CPUState *env);
Line 357  CPUDebugExcpHandler *cpu_set_debug_excp_ Line 345  CPUDebugExcpHandler *cpu_set_debug_excp_
 /* vl.c */  /* vl.c */
 extern int singlestep;  extern int singlestep;
   
   /* cpu-exec.c */
   extern volatile sig_atomic_t exit_request;
   
 #endif  #endif

Removed from v.1.1.1.10  
changed lines
  Added in v.1.1.1.11


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