Diff for /qemu/exec-all.h between versions 1.1.1.3 and 1.1.1.6

version 1.1.1.3, 2018/04/24 16:40:28 version 1.1.1.6, 2018/04/24 16:47:04
Line 1 Line 1
 /*  /*
  * internal execution defines for qemu   * internal execution defines for qemu
  *    *
  *  Copyright (c) 2003 Fabrice Bellard   *  Copyright (c) 2003 Fabrice Bellard
  *   *
  * This library is free software; you can redistribute it and/or   * This library is free software; you can redistribute it and/or
Line 21 Line 21
 /* allow to see translation results - the slowdown should be negligible, so we leave it */  /* allow to see translation results - the slowdown should be negligible, so we leave it */
 #define DEBUG_DISAS  #define DEBUG_DISAS
   
 #ifndef glue  
 #define xglue(x, y) x ## y  
 #define glue(x, y) xglue(x, y)  
 #define stringify(s)    tostring(s)  
 #define tostring(s)     #s  
 #endif  
   
 #if __GNUC__ < 3  
 #define __builtin_expect(x, n) (x)  
 #endif  
   
 #ifdef __i386__  
 #define REGPARM(n) __attribute((regparm(n)))  
 #else  
 #define REGPARM(n)  
 #endif  
   
 /* is_jmp field values */  /* is_jmp field values */
 #define DISAS_NEXT    0 /* next instruction can be analyzed */  #define DISAS_NEXT    0 /* next instruction can be analyzed */
 #define DISAS_JUMP    1 /* only pc was modified dynamically */  #define DISAS_JUMP    1 /* only pc was modified dynamically */
Line 68  typedef void (GenOpFunc)(void); Line 51  typedef void (GenOpFunc)(void);
 typedef void (GenOpFunc1)(long);  typedef void (GenOpFunc1)(long);
 typedef void (GenOpFunc2)(long, long);  typedef void (GenOpFunc2)(long, long);
 typedef void (GenOpFunc3)(long, long, long);  typedef void (GenOpFunc3)(long, long, long);
                       
 #if defined(TARGET_I386)  #if defined(TARGET_I386)
   
 void optimize_flags_init(void);  void optimize_flags_init(void);
Line 81  extern int loglevel; Line 64  extern int loglevel;
 int gen_intermediate_code(CPUState *env, struct TranslationBlock *tb);  int gen_intermediate_code(CPUState *env, struct TranslationBlock *tb);
 int gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);  int gen_intermediate_code_pc(CPUState *env, struct TranslationBlock *tb);
 void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf);  void dump_ops(const uint16_t *opc_buf, const uint32_t *opparam_buf);
   unsigned long code_gen_max_block_size(void);
 int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,  int cpu_gen_code(CPUState *env, struct TranslationBlock *tb,
                  int max_code_size, int *gen_code_size_ptr);                   int *gen_code_size_ptr);
 int cpu_restore_state(struct TranslationBlock *tb,   int cpu_restore_state(struct TranslationBlock *tb,
                       CPUState *env, unsigned long searched_pc,                        CPUState *env, unsigned long searched_pc,
                       void *puc);                        void *puc);
 int cpu_gen_code_copy(CPUState *env, struct TranslationBlock *tb,  int cpu_gen_code_copy(CPUState *env, struct TranslationBlock *tb,
                       int max_code_size, int *gen_code_size_ptr);                        int max_code_size, int *gen_code_size_ptr);
 int cpu_restore_state_copy(struct TranslationBlock *tb,   int cpu_restore_state_copy(struct TranslationBlock *tb,
                            CPUState *env, unsigned long searched_pc,                             CPUState *env, unsigned long searched_pc,
                            void *puc);                             void *puc);
 void cpu_resume_from_signal(CPUState *env1, void *puc);  void cpu_resume_from_signal(CPUState *env1, void *puc);
 void cpu_exec_init(CPUState *env);  void cpu_exec_init(CPUState *env);
 int page_unprotect(target_ulong address, unsigned long pc, void *puc);  int page_unprotect(target_ulong address, unsigned long pc, void *puc);
 void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,   void tb_invalidate_phys_page_range(target_ulong start, target_ulong end,
                                    int is_cpu_write_access);                                     int is_cpu_write_access);
 void tb_invalidate_page_range(target_ulong start, target_ulong end);  void tb_invalidate_page_range(target_ulong start, target_ulong end);
 void tlb_flush_page(CPUState *env, target_ulong addr);  void tlb_flush_page(CPUState *env, target_ulong addr);
 void tlb_flush(CPUState *env, int flush_global);  void tlb_flush(CPUState *env, int flush_global);
 int tlb_set_page_exec(CPUState *env, target_ulong vaddr,   int tlb_set_page_exec(CPUState *env, target_ulong vaddr,
                       target_phys_addr_t paddr, int prot,                         target_phys_addr_t paddr, int prot,
                       int is_user, int is_softmmu);                        int mmu_idx, int is_softmmu);
 static inline int tlb_set_page(CPUState *env, target_ulong vaddr,   static inline int tlb_set_page(CPUState *env, target_ulong vaddr,
                                target_phys_addr_t paddr, int prot,                                  target_phys_addr_t paddr, int prot,
                                int is_user, int is_softmmu)                                 int mmu_idx, int is_softmmu)
 {  {
     if (prot & PAGE_READ)      if (prot & PAGE_READ)
         prot |= PAGE_EXEC;          prot |= PAGE_EXEC;
     return tlb_set_page_exec(env, vaddr, paddr, prot, is_user, is_softmmu);      return tlb_set_page_exec(env, vaddr, paddr, prot, mmu_idx, is_softmmu);
 }  }
   
 #define CODE_GEN_MAX_SIZE        65536  
 #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */  #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */
   
 #define CODE_GEN_PHYS_HASH_BITS     15  #define CODE_GEN_PHYS_HASH_BITS     15
Line 153  static inline int tlb_set_page(CPUState  Line 136  static inline int tlb_set_page(CPUState 
   
 #define CODE_GEN_MAX_BLOCKS    (CODE_GEN_BUFFER_SIZE / CODE_GEN_AVG_BLOCK_SIZE)  #define CODE_GEN_MAX_BLOCKS    (CODE_GEN_BUFFER_SIZE / CODE_GEN_AVG_BLOCK_SIZE)
   
 #if defined(__powerpc__)   #if defined(__powerpc__)
 #define USE_DIRECT_JUMP  #define USE_DIRECT_JUMP
 #endif  #endif
 #if defined(__i386__) && !defined(_WIN32)  #if defined(__i386__) && !defined(_WIN32)
Line 163  static inline int tlb_set_page(CPUState  Line 146  static inline int tlb_set_page(CPUState 
 typedef struct TranslationBlock {  typedef struct TranslationBlock {
     target_ulong pc;   /* simulated PC corresponding to this block (EIP + CS base) */      target_ulong pc;   /* simulated PC corresponding to this block (EIP + CS base) */
     target_ulong cs_base; /* CS base for this block */      target_ulong cs_base; /* CS base for this block */
     unsigned int flags; /* flags defining in which context the code was generated */      uint64_t flags; /* flags defining in which context the code was generated */
     uint16_t size;      /* size of target code for this block (1 <=      uint16_t size;      /* size of target code for this block (1 <=
                            size <= TARGET_PAGE_SIZE) */                             size <= TARGET_PAGE_SIZE) */
     uint16_t cflags;    /* compile flags */      uint16_t cflags;    /* compile flags */
Line 174  typedef struct TranslationBlock { Line 157  typedef struct TranslationBlock {
   
     uint8_t *tc_ptr;    /* pointer to the translated code */      uint8_t *tc_ptr;    /* pointer to the translated code */
     /* next matching tb for physical address. */      /* next matching tb for physical address. */
     struct TranslationBlock *phys_hash_next;       struct TranslationBlock *phys_hash_next;
     /* first and second physical page containing code. The lower bit      /* first and second physical page containing code. The lower bit
        of the pointer tells the index in page_next[] */         of the pointer tells the index in page_next[] */
     struct TranslationBlock *page_next[2];       struct TranslationBlock *page_next[2];
     target_ulong page_addr[2];       target_ulong page_addr[2];
   
     /* the following data are used to directly call another TB from      /* the following data are used to directly call another TB from
        the code of this one. */         the code of this one. */
Line 192  typedef struct TranslationBlock { Line 175  typedef struct TranslationBlock {
        the two least significant bits of the pointers to tell what is         the two least significant bits of the pointers to tell what is
        the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =         the next pointer: 0 = jmp_next[0], 1 = jmp_next[1], 2 =
        jmp_first */         jmp_first */
     struct TranslationBlock *jmp_next[2];       struct TranslationBlock *jmp_next[2];
     struct TranslationBlock *jmp_first;      struct TranslationBlock *jmp_first;
 } TranslationBlock;  } TranslationBlock;
   
   static inline unsigned int tb_jmp_cache_hash_page(target_ulong pc)
   {
       target_ulong tmp;
       tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS));
       return (tmp >> TB_JMP_PAGE_BITS) & TB_JMP_PAGE_MASK;
   }
   
 static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc)  static inline unsigned int tb_jmp_cache_hash_func(target_ulong pc)
 {  {
     return (pc ^ (pc >> TB_JMP_CACHE_BITS)) & (TB_JMP_CACHE_SIZE - 1);      target_ulong tmp;
       tmp = pc ^ (pc >> (TARGET_PAGE_BITS - TB_JMP_PAGE_BITS));
       return (((tmp >> TB_JMP_PAGE_BITS) & TB_JMP_PAGE_MASK) |
               (tmp & TB_JMP_ADDR_MASK));
 }  }
   
 static inline unsigned int tb_phys_hash_func(unsigned long pc)  static inline unsigned int tb_phys_hash_func(unsigned long pc)
Line 208  static inline unsigned int tb_phys_hash_ Line 201  static inline unsigned int tb_phys_hash_
   
 TranslationBlock *tb_alloc(target_ulong pc);  TranslationBlock *tb_alloc(target_ulong pc);
 void tb_flush(CPUState *env);  void tb_flush(CPUState *env);
 void tb_link_phys(TranslationBlock *tb,   void tb_link_phys(TranslationBlock *tb,
                   target_ulong phys_pc, target_ulong phys_page2);                    target_ulong phys_pc, target_ulong phys_page2);
   
 extern TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];  extern TranslationBlock *tb_phys_hash[CODE_GEN_PHYS_HASH_SIZE];
Line 244  static inline void tb_set_jmp_target1(un Line 237  static inline void tb_set_jmp_target1(un
 }  }
 #endif  #endif
   
 static inline void tb_set_jmp_target(TranslationBlock *tb,   static inline void tb_set_jmp_target(TranslationBlock *tb,
                                      int n, unsigned long addr)                                       int n, unsigned long addr)
 {  {
     unsigned long offset;      unsigned long offset;
Line 259  static inline void tb_set_jmp_target(Tra Line 252  static inline void tb_set_jmp_target(Tra
 #else  #else
   
 /* set the jump target */  /* set the jump target */
 static inline void tb_set_jmp_target(TranslationBlock *tb,   static inline void tb_set_jmp_target(TranslationBlock *tb,
                                      int n, unsigned long addr)                                       int n, unsigned long addr)
 {  {
     tb->tb_next[n] = addr;      tb->tb_next[n] = addr;
Line 267  static inline void tb_set_jmp_target(Tra Line 260  static inline void tb_set_jmp_target(Tra
   
 #endif  #endif
   
 static inline void tb_add_jump(TranslationBlock *tb, int n,   static inline void tb_add_jump(TranslationBlock *tb, int n,
                                TranslationBlock *tb_next)                                 TranslationBlock *tb_next)
 {  {
     /* NOTE: this test is only needed for thread safety */      /* NOTE: this test is only needed for thread safety */
     if (!tb->jmp_next[n]) {      if (!tb->jmp_next[n]) {
         /* patch the native jump address */          /* patch the native jump address */
         tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);          tb_set_jmp_target(tb, n, (unsigned long)tb_next->tc_ptr);
           
         /* add in TB jmp circular list */          /* add in TB jmp circular list */
         tb->jmp_next[n] = tb_next->jmp_first;          tb->jmp_next[n] = tb_next->jmp_first;
         tb_next->jmp_first = (TranslationBlock *)((long)(tb) | (n));          tb_next->jmp_first = (TranslationBlock *)((long)(tb) | (n));
Line 333  do {\ Line 326  do {\
    cache flushing, but slower because of indirect jump) */     cache flushing, but slower because of indirect jump) */
 #define GOTO_TB(opname, tbparam, n)\  #define GOTO_TB(opname, tbparam, n)\
 do {\  do {\
     static void __attribute__((unused)) *dummy ## n = &&dummy_label ## n;\      static void __attribute__((used)) *dummy ## n = &&dummy_label ## n;\
     static void __attribute__((unused)) *__op_label ## n \      static void __attribute__((used)) *__op_label ## n \
         __asm__(ASM_OP_LABEL_NAME(n, opname)) = &&label ## n;\          __asm__(ASM_OP_LABEL_NAME(n, opname)) = &&label ## n;\
     goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n]);\      goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n]);\
 label ## n: ;\  label ## n: ;\
Line 347  extern CPUWriteMemoryFunc *io_mem_write[ Line 340  extern CPUWriteMemoryFunc *io_mem_write[
 extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];  extern CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
 extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];  extern void *io_mem_opaque[IO_MEM_NB_ENTRIES];
   
 #ifdef __powerpc__  #if defined(__powerpc__)
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     int ret;      int ret;
Line 363  static inline int testandset (int *p) Line 356  static inline int testandset (int *p)
                           : "cr0", "memory");                            : "cr0", "memory");
     return ret;      return ret;
 }  }
 #endif  #elif defined(__i386__)
   
 #ifdef __i386__  
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     long int readval = 0;      long int readval = 0;
       
     __asm__ __volatile__ ("lock; cmpxchgl %2, %0"      __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
                           : "+m" (*p), "+a" (readval)                            : "+m" (*p), "+a" (readval)
                           : "r" (1)                            : "r" (1)
                           : "cc");                            : "cc");
     return readval;      return readval;
 }  }
 #endif  #elif defined(__x86_64__)
   
 #ifdef __x86_64__  
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     long int readval = 0;      long int readval = 0;
       
     __asm__ __volatile__ ("lock; cmpxchgl %2, %0"      __asm__ __volatile__ ("lock; cmpxchgl %2, %0"
                           : "+m" (*p), "+a" (readval)                            : "+m" (*p), "+a" (readval)
                           : "r" (1)                            : "r" (1)
                           : "cc");                            : "cc");
     return readval;      return readval;
 }  }
 #endif  #elif defined(__s390__)
   
 #ifdef __s390__  
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     int ret;      int ret;
Line 399  static inline int testandset (int *p) Line 386  static inline int testandset (int *p)
     __asm__ __volatile__ ("0: cs    %0,%1,0(%2)\n"      __asm__ __volatile__ ("0: cs    %0,%1,0(%2)\n"
                           "   jl    0b"                            "   jl    0b"
                           : "=&d" (ret)                            : "=&d" (ret)
                           : "r" (1), "a" (p), "0" (*p)                             : "r" (1), "a" (p), "0" (*p)
                           : "cc", "memory" );                            : "cc", "memory" );
     return ret;      return ret;
 }  }
 #endif  #elif defined(__alpha__)
   
 #ifdef __alpha__  
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     int ret;      int ret;
Line 422  static inline int testandset (int *p) Line 407  static inline int testandset (int *p)
                           : "m" (*p));                            : "m" (*p));
     return ret;      return ret;
 }  }
 #endif  #elif defined(__sparc__)
   
 #ifdef __sparc__  
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
         int ret;          int ret;
Line 436  static inline int testandset (int *p) Line 419  static inline int testandset (int *p)
   
         return (ret ? 1 : 0);          return (ret ? 1 : 0);
 }  }
 #endif  #elif defined(__arm__)
   
 #ifdef __arm__  
 static inline int testandset (int *spinlock)  static inline int testandset (int *spinlock)
 {  {
     register unsigned int ret;      register unsigned int ret;
     __asm__ __volatile__("swp %0, %1, [%2]"      __asm__ __volatile__("swp %0, %1, [%2]"
                          : "=r"(ret)                           : "=r"(ret)
                          : "0"(1), "r"(spinlock));                           : "0"(1), "r"(spinlock));
       
     return ret;      return ret;
 }  }
 #endif  #elif defined(__mc68000)
   
 #ifdef __mc68000  
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     char ret;      char ret;
Line 460  static inline int testandset (int *p) Line 439  static inline int testandset (int *p)
                          : "cc","memory");                           : "cc","memory");
     return ret;      return ret;
 }  }
 #endif  #elif defined(__ia64)
   
 #ifdef __ia64  
 #include <ia64intrin.h>  #include <ia64intrin.h>
   
 static inline int testandset (int *p)  static inline int testandset (int *p)
 {  {
     return __sync_lock_test_and_set (p, 1);      return __sync_lock_test_and_set (p, 1);
 }  }
   #elif defined(__mips__)
   static inline int testandset (int *p)
   {
       int ret;
   
       __asm__ __volatile__ (
           "       .set push               \n"
           "       .set noat               \n"
           "       .set mips2              \n"
           "1:     li      $1, 1           \n"
           "       ll      %0, %1          \n"
           "       sc      $1, %1          \n"
           "       beqz    $1, 1b          \n"
           "       .set pop                "
           : "=r" (ret), "+R" (*p)
           :
           : "memory");
   
       return ret;
   }
   #else
   #error unimplemented CPU support
 #endif  #endif
   
 typedef int spinlock_t;  typedef int spinlock_t;
Line 511  extern int tb_invalidated_flag; Line 511  extern int tb_invalidated_flag;
   
 #if !defined(CONFIG_USER_ONLY)  #if !defined(CONFIG_USER_ONLY)
   
 void tlb_fill(target_ulong addr, int is_write, int is_user,   void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
               void *retaddr);                void *retaddr);
   
 #define ACCESS_TYPE 3  #define ACCESS_TYPE (NB_MMU_MODES + 1)
 #define MEMSUFFIX _code  #define MEMSUFFIX _code
 #define env cpu_single_env  #define env cpu_single_env
   
Line 547  static inline target_ulong get_phys_addr Line 547  static inline target_ulong get_phys_addr
    is the offset relative to phys_ram_base */     is the offset relative to phys_ram_base */
 static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)  static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
 {  {
     int is_user, index, pd;      int mmu_idx, index, pd;
   
     index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);      index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
 #if defined(TARGET_I386)      mmu_idx = cpu_mmu_index(env);
     is_user = ((env->hflags & HF_CPL_MASK) == 3);      if (__builtin_expect(env->tlb_table[mmu_idx][index].addr_code !=
 #elif defined (TARGET_PPC)  
     is_user = msr_pr;  
 #elif defined (TARGET_MIPS)  
     is_user = ((env->hflags & MIPS_HFLAG_MODE) == MIPS_HFLAG_UM);  
 #elif defined (TARGET_SPARC)  
     is_user = (env->psrs == 0);  
 #elif defined (TARGET_ARM)  
     is_user = ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_USR);  
 #elif defined (TARGET_SH4)  
     is_user = ((env->sr & SR_MD) == 0);  
 #else  
 #error unimplemented CPU  
 #endif  
     if (__builtin_expect(env->tlb_table[is_user][index].addr_code !=   
                          (addr & TARGET_PAGE_MASK), 0)) {                           (addr & TARGET_PAGE_MASK), 0)) {
         ldub_code(addr);          ldub_code(addr);
     }      }
     pd = env->tlb_table[is_user][index].addr_code & ~TARGET_PAGE_MASK;      pd = env->tlb_table[mmu_idx][index].addr_code & ~TARGET_PAGE_MASK;
     if (pd > IO_MEM_ROM) {      if (pd > IO_MEM_ROM && !(pd & IO_MEM_ROMD)) {
         cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);  #if defined(TARGET_SPARC) || defined(TARGET_MIPS)
           do_unassigned_access(addr, 0, 1, 0);
   #else
           cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x" TARGET_FMT_lx "\n", addr);
   #endif
     }      }
     return addr + env->tlb_table[is_user][index].addend - (unsigned long)phys_ram_base;      return addr + env->tlb_table[mmu_idx][index].addend - (unsigned long)phys_ram_base;
 }  }
 #endif  #endif
   
   
 #ifdef USE_KQEMU  #ifdef USE_KQEMU
 #define KQEMU_MODIFY_PAGE_MASK (0xff & ~(VGA_DIRTY_FLAG | CODE_DIRTY_FLAG))  #define KQEMU_MODIFY_PAGE_MASK (0xff & ~(VGA_DIRTY_FLAG | CODE_DIRTY_FLAG))
   
Line 593  void kqemu_record_dump(void); Line 582  void kqemu_record_dump(void);
 static inline int kqemu_is_ok(CPUState *env)  static inline int kqemu_is_ok(CPUState *env)
 {  {
     return(env->kqemu_enabled &&      return(env->kqemu_enabled &&
            (env->cr[0] & CR0_PE_MASK) &&              (env->cr[0] & CR0_PE_MASK) &&
            !(env->hflags & HF_INHIBIT_IRQ_MASK) &&             !(env->hflags & HF_INHIBIT_IRQ_MASK) &&
            (env->eflags & IF_MASK) &&             (env->eflags & IF_MASK) &&
            !(env->eflags & VM_MASK) &&             !(env->eflags & VM_MASK) &&
            (env->kqemu_enabled == 2 ||              (env->kqemu_enabled == 2 ||
             ((env->hflags & HF_CPL_MASK) == 3 &&              ((env->hflags & HF_CPL_MASK) == 3 &&
              (env->eflags & IOPL_MASK) != IOPL_MASK)));               (env->eflags & IOPL_MASK) != IOPL_MASK)));
 }  }

Removed from v.1.1.1.3  
changed lines
  Added in v.1.1.1.6


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