Diff for /qemu/exec.c between versions 1.1.1.8 and 1.1.1.12

version 1.1.1.8, 2018/04/24 16:56:43 version 1.1.1.12, 2018/04/24 17:57:49
Line 14 Line 14
  * Lesser General Public License for more details.   * Lesser General Public License for more details.
  *   *
  * You should have received a copy of the GNU Lesser General Public   * You should have received a copy of the GNU Lesser General Public
  * License along with this library; if not, write to the Free Software   * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA  02110-1301 USA  
  */   */
 #include "config.h"  #include "config.h"
 #ifdef _WIN32  #ifdef _WIN32
 #define WIN32_LEAN_AND_MEAN  
 #include <windows.h>  #include <windows.h>
 #else  #else
 #include <sys/types.h>  #include <sys/types.h>
Line 63 Line 61
   
 #define SMC_BITMAP_USE_THRESHOLD 10  #define SMC_BITMAP_USE_THRESHOLD 10
   
 #define MMAP_AREA_START        0x00000000  
 #define MMAP_AREA_END          0xa8000000  
   
 #if defined(TARGET_SPARC64)  #if defined(TARGET_SPARC64)
 #define TARGET_PHYS_ADDR_SPACE_BITS 41  #define TARGET_PHYS_ADDR_SPACE_BITS 41
 #elif defined(TARGET_SPARC)  #elif defined(TARGET_SPARC)
Line 75 Line 70
 #define TARGET_VIRT_ADDR_SPACE_BITS 42  #define TARGET_VIRT_ADDR_SPACE_BITS 42
 #elif defined(TARGET_PPC64)  #elif defined(TARGET_PPC64)
 #define TARGET_PHYS_ADDR_SPACE_BITS 42  #define TARGET_PHYS_ADDR_SPACE_BITS 42
 #elif defined(TARGET_X86_64) && !defined(USE_KQEMU)  #elif defined(TARGET_X86_64)
 #define TARGET_PHYS_ADDR_SPACE_BITS 42  #define TARGET_PHYS_ADDR_SPACE_BITS 42
 #elif defined(TARGET_I386) && !defined(USE_KQEMU)  #elif defined(TARGET_I386)
 #define TARGET_PHYS_ADDR_SPACE_BITS 36  #define TARGET_PHYS_ADDR_SPACE_BITS 36
 #else  #else
 /* Note: for compatibility with kqemu, we use 32 bits for x86_64 */  
 #define TARGET_PHYS_ADDR_SPACE_BITS 32  #define TARGET_PHYS_ADDR_SPACE_BITS 32
 #endif  #endif
   
Line 98  spinlock_t tb_lock = SPIN_LOCK_UNLOCKED; Line 92  spinlock_t tb_lock = SPIN_LOCK_UNLOCKED;
 #define code_gen_section                                \  #define code_gen_section                                \
     __attribute__((__section__(".gen_code")))           \      __attribute__((__section__(".gen_code")))           \
     __attribute__((aligned (32)))      __attribute__((aligned (32)))
   #elif defined(_WIN32)
   /* Maximum alignment for Win32 is 16. */
   #define code_gen_section                                \
       __attribute__((aligned (16)))
 #else  #else
 #define code_gen_section                                \  #define code_gen_section                                \
     __attribute__((aligned (32)))      __attribute__((aligned (32)))
Line 111  static unsigned long code_gen_buffer_max Line 109  static unsigned long code_gen_buffer_max
 uint8_t *code_gen_ptr;  uint8_t *code_gen_ptr;
   
 #if !defined(CONFIG_USER_ONLY)  #if !defined(CONFIG_USER_ONLY)
 ram_addr_t phys_ram_size;  
 int phys_ram_fd;  int phys_ram_fd;
 uint8_t *phys_ram_base;  
 uint8_t *phys_ram_dirty;  uint8_t *phys_ram_dirty;
 static int in_migration;  static int in_migration;
 static ram_addr_t phys_ram_alloc_offset = 0;  
   typedef struct RAMBlock {
       uint8_t *host;
       ram_addr_t offset;
       ram_addr_t length;
       struct RAMBlock *next;
   } RAMBlock;
   
   static RAMBlock *ram_blocks;
   /* TODO: When we implement (and use) ram deallocation (e.g. for hotplug)
      then we can no longer assume contiguous ram offsets, and external uses
      of this variable will break.  */
   ram_addr_t last_ram_offset;
 #endif  #endif
   
 CPUState *first_cpu;  CPUState *first_cpu;
Line 179  static void io_mem_init(void); Line 187  static void io_mem_init(void);
 CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];  CPUWriteMemoryFunc *io_mem_write[IO_MEM_NB_ENTRIES][4];
 CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];  CPUReadMemoryFunc *io_mem_read[IO_MEM_NB_ENTRIES][4];
 void *io_mem_opaque[IO_MEM_NB_ENTRIES];  void *io_mem_opaque[IO_MEM_NB_ENTRIES];
 char io_mem_used[IO_MEM_NB_ENTRIES];  static char io_mem_used[IO_MEM_NB_ENTRIES];
 static int io_mem_watch;  static int io_mem_watch;
 #endif  #endif
   
Line 197  static int tb_phys_invalidate_count; Line 205  static int tb_phys_invalidate_count;
 #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)  #define SUBPAGE_IDX(addr) ((addr) & ~TARGET_PAGE_MASK)
 typedef struct subpage_t {  typedef struct subpage_t {
     target_phys_addr_t base;      target_phys_addr_t base;
     CPUReadMemoryFunc **mem_read[TARGET_PAGE_SIZE][4];      CPUReadMemoryFunc * const *mem_read[TARGET_PAGE_SIZE][4];
     CPUWriteMemoryFunc **mem_write[TARGET_PAGE_SIZE][4];      CPUWriteMemoryFunc * const *mem_write[TARGET_PAGE_SIZE][4];
     void *opaque[TARGET_PAGE_SIZE][2][4];      void *opaque[TARGET_PAGE_SIZE][2][4];
     ram_addr_t region_offset[TARGET_PAGE_SIZE][2][4];      ram_addr_t region_offset[TARGET_PAGE_SIZE][2][4];
 } subpage_t;  } subpage_t;
Line 307  static inline PageDesc *page_find_alloc( Line 315  static inline PageDesc *page_find_alloc(
 #if defined(CONFIG_USER_ONLY)  #if defined(CONFIG_USER_ONLY)
         size_t len = sizeof(PageDesc) * L2_SIZE;          size_t len = sizeof(PageDesc) * L2_SIZE;
         /* Don't use qemu_malloc because it may recurse.  */          /* Don't use qemu_malloc because it may recurse.  */
         p = mmap(0, len, PROT_READ | PROT_WRITE,          p = mmap(NULL, len, PROT_READ | PROT_WRITE,
                  MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);                   MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
         *lp = p;          *lp = p;
         if (h2g_valid(p)) {          if (h2g_valid(p)) {
Line 332  static inline PageDesc *page_find(target Line 340  static inline PageDesc *page_find(target
         return NULL;          return NULL;
   
     p = *lp;      p = *lp;
     if (!p)      if (!p) {
         return 0;          return NULL;
       }
     return p + (index & (L2_SIZE - 1));      return p + (index & (L2_SIZE - 1));
 }  }
   
Line 392  static void tlb_unprotect_code_phys(CPUS Line 401  static void tlb_unprotect_code_phys(CPUS
 #define DEFAULT_CODE_GEN_BUFFER_SIZE (32 * 1024 * 1024)  #define DEFAULT_CODE_GEN_BUFFER_SIZE (32 * 1024 * 1024)
   
 #if defined(CONFIG_USER_ONLY)  #if defined(CONFIG_USER_ONLY)
 /* Currently it is not recommanded to allocate big chunks of data in  /* Currently it is not recommended to allocate big chunks of data in
    user mode. It will change when a dedicated libc will be used */     user mode. It will change when a dedicated libc will be used */
 #define USE_STATIC_CODE_GEN_BUFFER  #define USE_STATIC_CODE_GEN_BUFFER
 #endif  #endif
Line 414  static void code_gen_alloc(unsigned long Line 423  static void code_gen_alloc(unsigned long
         /* in user mode, phys_ram_size is not meaningful */          /* in user mode, phys_ram_size is not meaningful */
         code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE;          code_gen_buffer_size = DEFAULT_CODE_GEN_BUFFER_SIZE;
 #else  #else
         /* XXX: needs ajustments */          /* XXX: needs adjustments */
         code_gen_buffer_size = (unsigned long)(phys_ram_size / 4);          code_gen_buffer_size = (unsigned long)(ram_size / 4);
 #endif  #endif
     }      }
     if (code_gen_buffer_size < MIN_CODE_GEN_BUFFER_SIZE)      if (code_gen_buffer_size < MIN_CODE_GEN_BUFFER_SIZE)
Line 454  static void code_gen_alloc(unsigned long Line 463  static void code_gen_alloc(unsigned long
             exit(1);              exit(1);
         }          }
     }      }
 #elif defined(__FreeBSD__)  #elif defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__DragonFly__)
     {      {
         int flags;          int flags;
         void *addr = NULL;          void *addr = NULL;
Line 504  void cpu_exec_init_all(unsigned long tb_ Line 513  void cpu_exec_init_all(unsigned long tb_
   
 #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)  #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
   
 #define CPU_COMMON_SAVE_VERSION 1  static void cpu_common_pre_save(void *opaque)
   
 static void cpu_common_save(QEMUFile *f, void *opaque)  
 {  {
     CPUState *env = opaque;      CPUState *env = opaque;
   
     qemu_put_be32s(f, &env->halted);      cpu_synchronize_state(env);
     qemu_put_be32s(f, &env->interrupt_request);  
 }  }
   
 static int cpu_common_load(QEMUFile *f, void *opaque, int version_id)  static int cpu_common_pre_load(void *opaque)
 {  {
     CPUState *env = opaque;      CPUState *env = opaque;
   
     if (version_id != CPU_COMMON_SAVE_VERSION)      cpu_synchronize_state(env);
         return -EINVAL;      return 0;
   }
   
     qemu_get_be32s(f, &env->halted);  static int cpu_common_post_load(void *opaque, int version_id)
     qemu_get_be32s(f, &env->interrupt_request);  {
     env->interrupt_request &= ~CPU_INTERRUPT_EXIT;      CPUState *env = opaque;
   
       /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
          version_id is increased. */
       env->interrupt_request &= ~0x01;
     tlb_flush(env, 1);      tlb_flush(env, 1);
   
     return 0;      return 0;
 }  }
   
   static const VMStateDescription vmstate_cpu_common = {
       .name = "cpu_common",
       .version_id = 1,
       .minimum_version_id = 1,
       .minimum_version_id_old = 1,
       .pre_save = cpu_common_pre_save,
       .pre_load = cpu_common_pre_load,
       .post_load = cpu_common_post_load,
       .fields      = (VMStateField []) {
           VMSTATE_UINT32(halted, CPUState),
           VMSTATE_UINT32(interrupt_request, CPUState),
           VMSTATE_END_OF_LIST()
       }
   };
 #endif  #endif
   
   CPUState *qemu_get_cpu(int cpu)
   {
       CPUState *env = first_cpu;
   
       while (env) {
           if (env->cpu_index == cpu)
               break;
           env = env->next_cpu;
       }
   
       return env;
   }
   
 void cpu_exec_init(CPUState *env)  void cpu_exec_init(CPUState *env)
 {  {
     CPUState **penv;      CPUState **penv;
     int cpu_index;      int cpu_index;
   
   #if defined(CONFIG_USER_ONLY)
       cpu_list_lock();
   #endif
     env->next_cpu = NULL;      env->next_cpu = NULL;
     penv = &first_cpu;      penv = &first_cpu;
     cpu_index = 0;      cpu_index = 0;
     while (*penv != NULL) {      while (*penv != NULL) {
         penv = (CPUState **)&(*penv)->next_cpu;          penv = &(*penv)->next_cpu;
         cpu_index++;          cpu_index++;
     }      }
     env->cpu_index = cpu_index;      env->cpu_index = cpu_index;
     TAILQ_INIT(&env->breakpoints);      env->numa_node = 0;
     TAILQ_INIT(&env->watchpoints);      QTAILQ_INIT(&env->breakpoints);
       QTAILQ_INIT(&env->watchpoints);
     *penv = env;      *penv = env;
   #if defined(CONFIG_USER_ONLY)
       cpu_list_unlock();
   #endif
 #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)  #if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)
     register_savevm("cpu_common", cpu_index, CPU_COMMON_SAVE_VERSION,      vmstate_register(cpu_index, &vmstate_cpu_common, env);
                     cpu_common_save, cpu_common_load, env);  
     register_savevm("cpu", cpu_index, CPU_SAVE_VERSION,      register_savevm("cpu", cpu_index, CPU_SAVE_VERSION,
                     cpu_save, cpu_load, env);                      cpu_save, cpu_load, env);
 #endif  #endif
Line 621  static void tb_invalidate_check(target_u Line 666  static void tb_invalidate_check(target_u
         for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {          for(tb = tb_phys_hash[i]; tb != NULL; tb = tb->phys_hash_next) {
             if (!(address + TARGET_PAGE_SIZE <= tb->pc ||              if (!(address + TARGET_PAGE_SIZE <= tb->pc ||
                   address >= tb->pc + tb->size)) {                    address >= tb->pc + tb->size)) {
                 printf("ERROR invalidate: address=%08lx PC=%08lx size=%04x\n",                  printf("ERROR invalidate: address=" TARGET_FMT_lx
                          " PC=%08lx size=%04x\n",
                        address, (long)tb->pc, tb->size);                         address, (long)tb->pc, tb->size);
             }              }
         }          }
Line 646  static void tb_page_check(void) Line 692  static void tb_page_check(void)
     }      }
 }  }
   
 static void tb_jmp_check(TranslationBlock *tb)  
 {  
     TranslationBlock *tb1;  
     unsigned int n1;  
   
     /* suppress any remaining jumps to this TB */  
     tb1 = tb->jmp_first;  
     for(;;) {  
         n1 = (long)tb1 & 3;  
         tb1 = (TranslationBlock *)((long)tb1 & ~3);  
         if (n1 == 2)  
             break;  
         tb1 = tb1->jmp_next[n1];  
     }  
     /* check end of list */  
     if (tb1 != tb) {  
         printf("ERROR: jmp_list from 0x%08lx\n", (long)tb);  
     }  
 }  
   
 #endif  #endif
   
 /* invalidate one TB */  /* invalidate one TB */
Line 1322  int cpu_watchpoint_insert(CPUState *env, Line 1348  int cpu_watchpoint_insert(CPUState *env,
   
     /* keep all GDB-injected watchpoints in front */      /* keep all GDB-injected watchpoints in front */
     if (flags & BP_GDB)      if (flags & BP_GDB)
         TAILQ_INSERT_HEAD(&env->watchpoints, wp, entry);          QTAILQ_INSERT_HEAD(&env->watchpoints, wp, entry);
     else      else
         TAILQ_INSERT_TAIL(&env->watchpoints, wp, entry);          QTAILQ_INSERT_TAIL(&env->watchpoints, wp, entry);
   
     tlb_flush_page(env, addr);      tlb_flush_page(env, addr);
   
Line 1340  int cpu_watchpoint_remove(CPUState *env, Line 1366  int cpu_watchpoint_remove(CPUState *env,
     target_ulong len_mask = ~(len - 1);      target_ulong len_mask = ~(len - 1);
     CPUWatchpoint *wp;      CPUWatchpoint *wp;
   
     TAILQ_FOREACH(wp, &env->watchpoints, entry) {      QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
         if (addr == wp->vaddr && len_mask == wp->len_mask          if (addr == wp->vaddr && len_mask == wp->len_mask
                 && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {                  && flags == (wp->flags & ~BP_WATCHPOINT_HIT)) {
             cpu_watchpoint_remove_by_ref(env, wp);              cpu_watchpoint_remove_by_ref(env, wp);
Line 1353  int cpu_watchpoint_remove(CPUState *env, Line 1379  int cpu_watchpoint_remove(CPUState *env,
 /* Remove a specific watchpoint by reference.  */  /* Remove a specific watchpoint by reference.  */
 void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint)  void cpu_watchpoint_remove_by_ref(CPUState *env, CPUWatchpoint *watchpoint)
 {  {
     TAILQ_REMOVE(&env->watchpoints, watchpoint, entry);      QTAILQ_REMOVE(&env->watchpoints, watchpoint, entry);
   
     tlb_flush_page(env, watchpoint->vaddr);      tlb_flush_page(env, watchpoint->vaddr);
   
Line 1365  void cpu_watchpoint_remove_all(CPUState  Line 1391  void cpu_watchpoint_remove_all(CPUState 
 {  {
     CPUWatchpoint *wp, *next;      CPUWatchpoint *wp, *next;
   
     TAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) {      QTAILQ_FOREACH_SAFE(wp, &env->watchpoints, entry, next) {
         if (wp->flags & mask)          if (wp->flags & mask)
             cpu_watchpoint_remove_by_ref(env, wp);              cpu_watchpoint_remove_by_ref(env, wp);
     }      }
Line 1385  int cpu_breakpoint_insert(CPUState *env, Line 1411  int cpu_breakpoint_insert(CPUState *env,
   
     /* keep all GDB-injected breakpoints in front */      /* keep all GDB-injected breakpoints in front */
     if (flags & BP_GDB)      if (flags & BP_GDB)
         TAILQ_INSERT_HEAD(&env->breakpoints, bp, entry);          QTAILQ_INSERT_HEAD(&env->breakpoints, bp, entry);
     else      else
         TAILQ_INSERT_TAIL(&env->breakpoints, bp, entry);          QTAILQ_INSERT_TAIL(&env->breakpoints, bp, entry);
   
     breakpoint_invalidate(env, pc);      breakpoint_invalidate(env, pc);
   
Line 1405  int cpu_breakpoint_remove(CPUState *env, Line 1431  int cpu_breakpoint_remove(CPUState *env,
 #if defined(TARGET_HAS_ICE)  #if defined(TARGET_HAS_ICE)
     CPUBreakpoint *bp;      CPUBreakpoint *bp;
   
     TAILQ_FOREACH(bp, &env->breakpoints, entry) {      QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
         if (bp->pc == pc && bp->flags == flags) {          if (bp->pc == pc && bp->flags == flags) {
             cpu_breakpoint_remove_by_ref(env, bp);              cpu_breakpoint_remove_by_ref(env, bp);
             return 0;              return 0;
Line 1421  int cpu_breakpoint_remove(CPUState *env, Line 1447  int cpu_breakpoint_remove(CPUState *env,
 void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint)  void cpu_breakpoint_remove_by_ref(CPUState *env, CPUBreakpoint *breakpoint)
 {  {
 #if defined(TARGET_HAS_ICE)  #if defined(TARGET_HAS_ICE)
     TAILQ_REMOVE(&env->breakpoints, breakpoint, entry);      QTAILQ_REMOVE(&env->breakpoints, breakpoint, entry);
   
     breakpoint_invalidate(env, breakpoint->pc);      breakpoint_invalidate(env, breakpoint->pc);
   
Line 1435  void cpu_breakpoint_remove_all(CPUState  Line 1461  void cpu_breakpoint_remove_all(CPUState 
 #if defined(TARGET_HAS_ICE)  #if defined(TARGET_HAS_ICE)
     CPUBreakpoint *bp, *next;      CPUBreakpoint *bp, *next;
   
     TAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) {      QTAILQ_FOREACH_SAFE(bp, &env->breakpoints, entry, next) {
         if (bp->flags & mask)          if (bp->flags & mask)
             cpu_breakpoint_remove_by_ref(env, bp);              cpu_breakpoint_remove_by_ref(env, bp);
     }      }
Line 1449  void cpu_single_step(CPUState *env, int  Line 1475  void cpu_single_step(CPUState *env, int 
 #if defined(TARGET_HAS_ICE)  #if defined(TARGET_HAS_ICE)
     if (env->singlestep_enabled != enabled) {      if (env->singlestep_enabled != enabled) {
         env->singlestep_enabled = enabled;          env->singlestep_enabled = enabled;
         /* must flush all the translated code to avoid inconsistancies */          if (kvm_enabled())
         /* XXX: only flush what is necessary */              kvm_update_guest_debug(env, 0);
         tb_flush(env);          else {
               /* must flush all the translated code to avoid inconsistencies */
               /* XXX: only flush what is necessary */
               tb_flush(env);
           }
     }      }
 #endif  #endif
 }  }
Line 1472  void cpu_set_log(int log_flags) Line 1502  void cpu_set_log(int log_flags)
             static char logfile_buf[4096];              static char logfile_buf[4096];
             setvbuf(logfile, logfile_buf, _IOLBF, sizeof(logfile_buf));              setvbuf(logfile, logfile_buf, _IOLBF, sizeof(logfile_buf));
         }          }
 #else  #elif !defined(_WIN32)
           /* Win32 doesn't support line-buffering and requires size >= 2 */
         setvbuf(logfile, NULL, _IOLBF, 0);          setvbuf(logfile, NULL, _IOLBF, 0);
 #endif  #endif
         log_append = 1;          log_append = 1;
Line 1493  void cpu_set_log_filename(const char *fi Line 1524  void cpu_set_log_filename(const char *fi
     cpu_set_log(loglevel);      cpu_set_log(loglevel);
 }  }
   
 /* mask must never be zero, except for A20 change call */  static void cpu_unlink_tb(CPUState *env)
 void cpu_interrupt(CPUState *env, int mask)  
 {  {
 #if !defined(USE_NPTL)  #if defined(CONFIG_USE_NPTL)
       /* FIXME: TB unchaining isn't SMP safe.  For now just ignore the
          problem and hope the cpu will stop of its own accord.  For userspace
          emulation this often isn't actually as bad as it sounds.  Often
          signals are used primarily to interrupt blocking syscalls.  */
   #else
     TranslationBlock *tb;      TranslationBlock *tb;
     static spinlock_t interrupt_lock = SPIN_LOCK_UNLOCKED;      static spinlock_t interrupt_lock = SPIN_LOCK_UNLOCKED;
 #endif  
     int old_mask;  
   
     if (mask & CPU_INTERRUPT_EXIT) {      tb = env->current_tb;
         env->exit_request = 1;      /* if the cpu is currently executing code, we must unlink it and
         mask &= ~CPU_INTERRUPT_EXIT;         all the potentially executing TB */
       if (tb && !testandset(&interrupt_lock)) {
           env->current_tb = NULL;
           tb_reset_jump_recursive(tb);
           resetlock(&interrupt_lock);
     }      }
   #endif
   }
   
   /* mask must never be zero, except for A20 change call */
   void cpu_interrupt(CPUState *env, int mask)
   {
       int old_mask;
   
     old_mask = env->interrupt_request;      old_mask = env->interrupt_request;
     env->interrupt_request |= mask;      env->interrupt_request |= mask;
 #if defined(USE_NPTL)  
     /* FIXME: TB unchaining isn't SMP safe.  For now just ignore the  #ifndef CONFIG_USER_ONLY
        problem and hope the cpu will stop of its own accord.  For userspace      /*
        emulation this often isn't actually as bad as it sounds.  Often       * If called from iothread context, wake the target cpu in
        signals are used primarily to interrupt blocking syscalls.  */       * case its halted.
 #else       */
       if (!qemu_cpu_self(env)) {
           qemu_cpu_kick(env);
           return;
       }
   #endif
   
     if (use_icount) {      if (use_icount) {
         env->icount_decr.u16.high = 0xffff;          env->icount_decr.u16.high = 0xffff;
 #ifndef CONFIG_USER_ONLY  #ifndef CONFIG_USER_ONLY
Line 1524  void cpu_interrupt(CPUState *env, int ma Line 1574  void cpu_interrupt(CPUState *env, int ma
         }          }
 #endif  #endif
     } else {      } else {
         tb = env->current_tb;          cpu_unlink_tb(env);
         /* if the cpu is currently executing code, we must unlink it and  
            all the potentially executing TB */  
         if (tb && !testandset(&interrupt_lock)) {  
             env->current_tb = NULL;  
             tb_reset_jump_recursive(tb);  
             resetlock(&interrupt_lock);  
         }  
     }      }
 #endif  
 }  }
   
 void cpu_reset_interrupt(CPUState *env, int mask)  void cpu_reset_interrupt(CPUState *env, int mask)
Line 1541  void cpu_reset_interrupt(CPUState *env,  Line 1583  void cpu_reset_interrupt(CPUState *env, 
     env->interrupt_request &= ~mask;      env->interrupt_request &= ~mask;
 }  }
   
   void cpu_exit(CPUState *env)
   {
       env->exit_request = 1;
       cpu_unlink_tb(env);
   }
   
 const CPULogItem cpu_log_items[] = {  const CPULogItem cpu_log_items[] = {
     { CPU_LOG_TB_OUT_ASM, "out_asm",      { CPU_LOG_TB_OUT_ASM, "out_asm",
       "show generated host assembly code for each compiled TB" },        "show generated host assembly code for each compiled TB" },
Line 1664  CPUState *cpu_copy(CPUState *env) Line 1712  CPUState *cpu_copy(CPUState *env)
     /* Clone all break/watchpoints.      /* Clone all break/watchpoints.
        Note: Once we support ptrace with hw-debug register access, make sure         Note: Once we support ptrace with hw-debug register access, make sure
        BP_CPU break/watchpoints are handled correctly on clone. */         BP_CPU break/watchpoints are handled correctly on clone. */
     TAILQ_INIT(&env->breakpoints);      QTAILQ_INIT(&env->breakpoints);
     TAILQ_INIT(&env->watchpoints);      QTAILQ_INIT(&env->watchpoints);
 #if defined(TARGET_HAS_ICE)  #if defined(TARGET_HAS_ICE)
     TAILQ_FOREACH(bp, &env->breakpoints, entry) {      QTAILQ_FOREACH(bp, &env->breakpoints, entry) {
         cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL);          cpu_breakpoint_insert(new_env, bp->pc, bp->flags, NULL);
     }      }
     TAILQ_FOREACH(wp, &env->watchpoints, entry) {      QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
         cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1,          cpu_watchpoint_insert(new_env, wp->vaddr, (~wp->len_mask) + 1,
                               wp->flags, NULL);                                wp->flags, NULL);
     }      }
Line 1696  static inline void tlb_flush_jmp_cache(C Line 1744  static inline void tlb_flush_jmp_cache(C
             TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));              TB_JMP_PAGE_SIZE * sizeof(TranslationBlock *));
 }  }
   
   static CPUTLBEntry s_cputlb_empty_entry = {
       .addr_read  = -1,
       .addr_write = -1,
       .addr_code  = -1,
       .addend     = -1,
   };
   
 /* NOTE: if flush_global is true, also flush global entries (not  /* NOTE: if flush_global is true, also flush global entries (not
    implemented yet) */     implemented yet) */
 void tlb_flush(CPUState *env, int flush_global)  void tlb_flush(CPUState *env, int flush_global)
Line 1710  void tlb_flush(CPUState *env, int flush_ Line 1765  void tlb_flush(CPUState *env, int flush_
     env->current_tb = NULL;      env->current_tb = NULL;
   
     for(i = 0; i < CPU_TLB_SIZE; i++) {      for(i = 0; i < CPU_TLB_SIZE; i++) {
         env->tlb_table[0][i].addr_read = -1;          int mmu_idx;
         env->tlb_table[0][i].addr_write = -1;          for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
         env->tlb_table[0][i].addr_code = -1;              env->tlb_table[mmu_idx][i] = s_cputlb_empty_entry;
         env->tlb_table[1][i].addr_read = -1;          }
         env->tlb_table[1][i].addr_write = -1;  
         env->tlb_table[1][i].addr_code = -1;  
 #if (NB_MMU_MODES >= 3)  
         env->tlb_table[2][i].addr_read = -1;  
         env->tlb_table[2][i].addr_write = -1;  
         env->tlb_table[2][i].addr_code = -1;  
 #if (NB_MMU_MODES == 4)  
         env->tlb_table[3][i].addr_read = -1;  
         env->tlb_table[3][i].addr_write = -1;  
         env->tlb_table[3][i].addr_code = -1;  
 #endif  
 #endif  
     }      }
   
     memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));      memset (env->tb_jmp_cache, 0, TB_JMP_CACHE_SIZE * sizeof (void *));
   
 #ifdef USE_KQEMU  
     if (env->kqemu_enabled) {  
         kqemu_flush(env, flush_global);  
     }  
 #endif  
     tlb_flush_count++;      tlb_flush_count++;
 }  }
   
Line 1746  static inline void tlb_flush_entry(CPUTL Line 1784  static inline void tlb_flush_entry(CPUTL
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||                   (TARGET_PAGE_MASK | TLB_INVALID_MASK)) ||
         addr == (tlb_entry->addr_code &          addr == (tlb_entry->addr_code &
                  (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {                   (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
         tlb_entry->addr_read = -1;          *tlb_entry = s_cputlb_empty_entry;
         tlb_entry->addr_write = -1;  
         tlb_entry->addr_code = -1;  
     }      }
 }  }
   
 void tlb_flush_page(CPUState *env, target_ulong addr)  void tlb_flush_page(CPUState *env, target_ulong addr)
 {  {
     int i;      int i;
       int mmu_idx;
   
 #if defined(DEBUG_TLB)  #if defined(DEBUG_TLB)
     printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr);      printf("tlb_flush_page: " TARGET_FMT_lx "\n", addr);
Line 1765  void tlb_flush_page(CPUState *env, targe Line 1802  void tlb_flush_page(CPUState *env, targe
   
     addr &= TARGET_PAGE_MASK;      addr &= TARGET_PAGE_MASK;
     i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);      i = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
     tlb_flush_entry(&env->tlb_table[0][i], addr);      for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++)
     tlb_flush_entry(&env->tlb_table[1][i], addr);          tlb_flush_entry(&env->tlb_table[mmu_idx][i], addr);
 #if (NB_MMU_MODES >= 3)  
     tlb_flush_entry(&env->tlb_table[2][i], addr);  
 #if (NB_MMU_MODES == 4)  
     tlb_flush_entry(&env->tlb_table[3][i], addr);  
 #endif  
 #endif  
   
     tlb_flush_jmp_cache(env, addr);      tlb_flush_jmp_cache(env, addr);
   
 #ifdef USE_KQEMU  
     if (env->kqemu_enabled) {  
         kqemu_flush_page(env, addr);  
     }  
 #endif  
 }  }
   
 /* update the TLBs so that writes to code in the virtual page 'addr'  /* update the TLBs so that writes to code in the virtual page 'addr'
Line 1812  static inline void tlb_reset_dirty_range Line 1837  static inline void tlb_reset_dirty_range
     }      }
 }  }
   
   /* Note: start and end must be within the same ram block.  */
 void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,  void cpu_physical_memory_reset_dirty(ram_addr_t start, ram_addr_t end,
                                      int dirty_flags)                                       int dirty_flags)
 {  {
Line 1827  void cpu_physical_memory_reset_dirty(ram Line 1853  void cpu_physical_memory_reset_dirty(ram
     if (length == 0)      if (length == 0)
         return;          return;
     len = length >> TARGET_PAGE_BITS;      len = length >> TARGET_PAGE_BITS;
 #ifdef USE_KQEMU  
     /* XXX: should not depend on cpu context */  
     env = first_cpu;  
     if (env->kqemu_enabled) {  
         ram_addr_t addr;  
         addr = start;  
         for(i = 0; i < len; i++) {  
             kqemu_set_notdirty(env, addr);  
             addr += TARGET_PAGE_SIZE;  
         }  
     }  
 #endif  
     mask = ~dirty_flags;      mask = ~dirty_flags;
     p = phys_ram_dirty + (start >> TARGET_PAGE_BITS);      p = phys_ram_dirty + (start >> TARGET_PAGE_BITS);
     for(i = 0; i < len; i++)      for(i = 0; i < len; i++)
Line 1846  void cpu_physical_memory_reset_dirty(ram Line 1860  void cpu_physical_memory_reset_dirty(ram
   
     /* we modify the TLB cache so that the dirty bit will be set again      /* we modify the TLB cache so that the dirty bit will be set again
        when accessing the range */         when accessing the range */
     start1 = start + (unsigned long)phys_ram_base;      start1 = (unsigned long)qemu_get_ram_ptr(start);
       /* Chek that we don't span multiple blocks - this breaks the
          address comparisons below.  */
       if ((unsigned long)qemu_get_ram_ptr(end - 1) - start1
               != (end - 1) - start) {
           abort();
       }
   
     for(env = first_cpu; env != NULL; env = env->next_cpu) {      for(env = first_cpu; env != NULL; env = env->next_cpu) {
         for(i = 0; i < CPU_TLB_SIZE; i++)          int mmu_idx;
             tlb_reset_dirty_range(&env->tlb_table[0][i], start1, length);          for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
         for(i = 0; i < CPU_TLB_SIZE; i++)              for(i = 0; i < CPU_TLB_SIZE; i++)
             tlb_reset_dirty_range(&env->tlb_table[1][i], start1, length);                  tlb_reset_dirty_range(&env->tlb_table[mmu_idx][i],
 #if (NB_MMU_MODES >= 3)                                        start1, length);
         for(i = 0; i < CPU_TLB_SIZE; i++)          }
             tlb_reset_dirty_range(&env->tlb_table[2][i], start1, length);  
 #if (NB_MMU_MODES == 4)  
         for(i = 0; i < CPU_TLB_SIZE; i++)  
             tlb_reset_dirty_range(&env->tlb_table[3][i], start1, length);  
 #endif  
 #endif  
     }      }
 }  }
   
 int cpu_physical_memory_set_dirty_tracking(int enable)  int cpu_physical_memory_set_dirty_tracking(int enable)
 {  {
     in_migration = enable;      in_migration = enable;
       if (kvm_enabled()) {
           return kvm_set_migration_log(enable);
       }
     return 0;      return 0;
 }  }
   
Line 1874  int cpu_physical_memory_get_dirty_tracki Line 1892  int cpu_physical_memory_get_dirty_tracki
     return in_migration;      return in_migration;
 }  }
   
 void cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr, target_phys_addr_t end_addr)  int cpu_physical_sync_dirty_bitmap(target_phys_addr_t start_addr,
                                      target_phys_addr_t end_addr)
 {  {
       int ret = 0;
   
     if (kvm_enabled())      if (kvm_enabled())
         kvm_physical_sync_dirty_bitmap(start_addr, end_addr);          ret = kvm_physical_sync_dirty_bitmap(start_addr, end_addr);
       return ret;
 }  }
   
 static inline void tlb_update_dirty(CPUTLBEntry *tlb_entry)  static inline void tlb_update_dirty(CPUTLBEntry *tlb_entry)
 {  {
     ram_addr_t ram_addr;      ram_addr_t ram_addr;
       void *p;
   
     if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {      if ((tlb_entry->addr_write & ~TARGET_PAGE_MASK) == IO_MEM_RAM) {
         ram_addr = (tlb_entry->addr_write & TARGET_PAGE_MASK) +          p = (void *)(unsigned long)((tlb_entry->addr_write & TARGET_PAGE_MASK)
             tlb_entry->addend - (unsigned long)phys_ram_base;              + tlb_entry->addend);
           ram_addr = qemu_ram_addr_from_host(p);
         if (!cpu_physical_memory_is_dirty(ram_addr)) {          if (!cpu_physical_memory_is_dirty(ram_addr)) {
             tlb_entry->addr_write |= TLB_NOTDIRTY;              tlb_entry->addr_write |= TLB_NOTDIRTY;
         }          }
Line 1897  static inline void tlb_update_dirty(CPUT Line 1921  static inline void tlb_update_dirty(CPUT
 void cpu_tlb_update_dirty(CPUState *env)  void cpu_tlb_update_dirty(CPUState *env)
 {  {
     int i;      int i;
     for(i = 0; i < CPU_TLB_SIZE; i++)      int mmu_idx;
         tlb_update_dirty(&env->tlb_table[0][i]);      for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++) {
     for(i = 0; i < CPU_TLB_SIZE; i++)          for(i = 0; i < CPU_TLB_SIZE; i++)
         tlb_update_dirty(&env->tlb_table[1][i]);              tlb_update_dirty(&env->tlb_table[mmu_idx][i]);
 #if (NB_MMU_MODES >= 3)      }
     for(i = 0; i < CPU_TLB_SIZE; i++)  
         tlb_update_dirty(&env->tlb_table[2][i]);  
 #if (NB_MMU_MODES == 4)  
     for(i = 0; i < CPU_TLB_SIZE; i++)  
         tlb_update_dirty(&env->tlb_table[3][i]);  
 #endif  
 #endif  
 }  }
   
 static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)  static inline void tlb_set_dirty1(CPUTLBEntry *tlb_entry, target_ulong vaddr)
Line 1922  static inline void tlb_set_dirty1(CPUTLB Line 1939  static inline void tlb_set_dirty1(CPUTLB
 static inline void tlb_set_dirty(CPUState *env, target_ulong vaddr)  static inline void tlb_set_dirty(CPUState *env, target_ulong vaddr)
 {  {
     int i;      int i;
       int mmu_idx;
   
     vaddr &= TARGET_PAGE_MASK;      vaddr &= TARGET_PAGE_MASK;
     i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);      i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
     tlb_set_dirty1(&env->tlb_table[0][i], vaddr);      for (mmu_idx = 0; mmu_idx < NB_MMU_MODES; mmu_idx++)
     tlb_set_dirty1(&env->tlb_table[1][i], vaddr);          tlb_set_dirty1(&env->tlb_table[mmu_idx][i], vaddr);
 #if (NB_MMU_MODES >= 3)  
     tlb_set_dirty1(&env->tlb_table[2][i], vaddr);  
 #if (NB_MMU_MODES == 4)  
     tlb_set_dirty1(&env->tlb_table[3][i], vaddr);  
 #endif  
 #endif  
 }  }
   
 /* add a new TLB entry. At most one entry for a given virtual address  /* add a new TLB entry. At most one entry for a given virtual address
Line 1971  int tlb_set_page_exec(CPUState *env, tar Line 1983  int tlb_set_page_exec(CPUState *env, tar
         /* IO memory case (romd handled later) */          /* IO memory case (romd handled later) */
         address |= TLB_MMIO;          address |= TLB_MMIO;
     }      }
     addend = (unsigned long)phys_ram_base + (pd & TARGET_PAGE_MASK);      addend = (unsigned long)qemu_get_ram_ptr(pd & TARGET_PAGE_MASK);
     if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {      if ((pd & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
         /* Normal RAM.  */          /* Normal RAM.  */
         iotlb = pd & TARGET_PAGE_MASK;          iotlb = pd & TARGET_PAGE_MASK;
Line 1980  int tlb_set_page_exec(CPUState *env, tar Line 1992  int tlb_set_page_exec(CPUState *env, tar
         else          else
             iotlb |= IO_MEM_ROM;              iotlb |= IO_MEM_ROM;
     } else {      } else {
         /* IO handlers are currently passed a phsical address.          /* IO handlers are currently passed a physical address.
            It would be nice to pass an offset from the base address             It would be nice to pass an offset from the base address
            of that region.  This would avoid having to special case RAM,             of that region.  This would avoid having to special case RAM,
            and avoid full address decoding in every device.             and avoid full address decoding in every device.
Line 1997  int tlb_set_page_exec(CPUState *env, tar Line 2009  int tlb_set_page_exec(CPUState *env, tar
     code_address = address;      code_address = address;
     /* Make accesses to pages with watchpoints go via the      /* Make accesses to pages with watchpoints go via the
        watchpoint trap routines.  */         watchpoint trap routines.  */
     TAILQ_FOREACH(wp, &env->watchpoints, entry) {      QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
         if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {          if (vaddr == (wp->vaddr & TARGET_PAGE_MASK)) {
             iotlb = io_mem_watch + paddr;              iotlb = io_mem_watch + paddr;
             /* TODO: The memory case can be optimized by not trapping              /* TODO: The memory case can be optimized by not trapping
Line 2055  int tlb_set_page_exec(CPUState *env, tar Line 2067  int tlb_set_page_exec(CPUState *env, tar
     return 0;      return 0;
 }  }
   
 /* dump memory mappings */  /*
 void page_dump(FILE *f)   * Walks guest process memory "regions" one by one
    * and calls callback function 'fn' for each region.
    */
   int walk_memory_regions(void *priv,
       int (*fn)(void *, unsigned long, unsigned long, unsigned long))
 {  {
     unsigned long start, end;      unsigned long start, end;
       PageDesc *p = NULL;
     int i, j, prot, prot1;      int i, j, prot, prot1;
     PageDesc *p;      int rc = 0;
   
     fprintf(f, "%-8s %-8s %-8s %s\n",      start = end = -1;
             "start", "end", "size", "prot");  
     start = -1;  
     end = -1;  
     prot = 0;      prot = 0;
     for(i = 0; i <= L1_SIZE; i++) {  
         if (i < L1_SIZE)      for (i = 0; i <= L1_SIZE; i++) {
             p = l1_map[i];          p = (i < L1_SIZE) ? l1_map[i] : NULL;
         else          for (j = 0; j < L2_SIZE; j++) {
             p = NULL;              prot1 = (p == NULL) ? 0 : p[j].flags;
         for(j = 0;j < L2_SIZE; j++) {              /*
             if (!p)               * "region" is one continuous chunk of memory
                 prot1 = 0;               * that has same protection flags set.
             else               */
                 prot1 = p[j].flags;  
             if (prot1 != prot) {              if (prot1 != prot) {
                 end = (i << (32 - L1_BITS)) | (j << TARGET_PAGE_BITS);                  end = (i << (32 - L1_BITS)) | (j << TARGET_PAGE_BITS);
                 if (start != -1) {                  if (start != -1) {
                     fprintf(f, "%08lx-%08lx %08lx %c%c%c\n",                      rc = (*fn)(priv, start, end, prot);
                             start, end, end - start,                      /* callback can stop iteration by returning != 0 */
                             prot & PAGE_READ ? 'r' : '-',                      if (rc != 0)
                             prot & PAGE_WRITE ? 'w' : '-',                          return (rc);
                             prot & PAGE_EXEC ? 'x' : '-');  
                 }                  }
                 if (prot1 != 0)                  if (prot1 != 0)
                     start = end;                      start = end;
Line 2092  void page_dump(FILE *f) Line 2104  void page_dump(FILE *f)
                     start = -1;                      start = -1;
                 prot = prot1;                  prot = prot1;
             }              }
             if (!p)              if (p == NULL)
                 break;                  break;
         }          }
     }      }
       return (rc);
   }
   
   static int dump_region(void *priv, unsigned long start,
       unsigned long end, unsigned long prot)
   {
       FILE *f = (FILE *)priv;
   
       (void) fprintf(f, "%08lx-%08lx %08lx %c%c%c\n",
           start, end, end - start,
           ((prot & PAGE_READ) ? 'r' : '-'),
           ((prot & PAGE_WRITE) ? 'w' : '-'),
           ((prot & PAGE_EXEC) ? 'x' : '-'));
   
       return (0);
   }
   
   /* dump memory mappings */
   void page_dump(FILE *f)
   {
       (void) fprintf(f, "%-8s %-8s %-8s %s\n",
               "start", "end", "size", "prot");
       walk_memory_regions(f, dump_region);
 }  }
   
 int page_get_flags(target_ulong address)  int page_get_flags(target_ulong address)
Line 2109  int page_get_flags(target_ulong address) Line 2144  int page_get_flags(target_ulong address)
 }  }
   
 /* modify the flags of a page and invalidate the code if  /* modify the flags of a page and invalidate the code if
    necessary. The flag PAGE_WRITE_ORG is positionned automatically     necessary. The flag PAGE_WRITE_ORG is positioned automatically
    depending on PAGE_WRITE */     depending on PAGE_WRITE */
 void page_set_flags(target_ulong start, target_ulong end, int flags)  void page_set_flags(target_ulong start, target_ulong end, int flags)
 {  {
Line 2176  int page_check_range(target_ulong start, Line 2211  int page_check_range(target_ulong start,
 }  }
   
 /* called from signal handler: invalidate the code and unprotect the  /* called from signal handler: invalidate the code and unprotect the
    page. Return TRUE if the fault was succesfully handled. */     page. Return TRUE if the fault was successfully handled. */
 int page_unprotect(target_ulong address, unsigned long pc, void *puc)  int page_unprotect(target_ulong address, unsigned long pc, void *puc)
 {  {
     unsigned int page_index, prot, pindex;      unsigned int page_index, prot, pindex;
Line 2256  static void *subpage_init (target_phys_a Line 2291  static void *subpage_init (target_phys_a
         }                                                               \          }                                                               \
     } while (0)      } while (0)
   
 /* register physical memory. 'size' must be a multiple of the target  /* register physical memory.
    page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an     For RAM, 'size' must be a multiple of the target page size.
      If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an
    io memory page.  The address used when calling the IO function is     io memory page.  The address used when calling the IO function is
    the offset from the start of the region, plus region_offset.  Both     the offset from the start of the region, plus region_offset.  Both
    start_region and regon_offset are rounded down to a page boundary     start_addr and region_offset are rounded down to a page boundary
    before calculating this offset.  This should not be a problem unless     before calculating this offset.  This should not be a problem unless
    the low bits of start_addr and region_offset differ.  */     the low bits of start_addr and region_offset differ.  */
 void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,  void cpu_register_physical_memory_offset(target_phys_addr_t start_addr,
Line 2274  void cpu_register_physical_memory_offset Line 2310  void cpu_register_physical_memory_offset
     ram_addr_t orig_size = size;      ram_addr_t orig_size = size;
     void *subpage;      void *subpage;
   
 #ifdef USE_KQEMU  
     /* XXX: should not depend on cpu context */  
     env = first_cpu;  
     if (env->kqemu_enabled) {  
         kqemu_set_phys_mem(start_addr, size, phys_offset);  
     }  
 #endif  
     if (kvm_enabled())      if (kvm_enabled())
         kvm_set_phys_mem(start_addr, size, phys_offset);          kvm_set_phys_mem(start_addr, size, phys_offset);
   
Line 2375  void qemu_unregister_coalesced_mmio(targ Line 2404  void qemu_unregister_coalesced_mmio(targ
         kvm_uncoalesce_mmio_region(addr, size);          kvm_uncoalesce_mmio_region(addr, size);
 }  }
   
 /* XXX: better than nothing */  
 ram_addr_t qemu_ram_alloc(ram_addr_t size)  ram_addr_t qemu_ram_alloc(ram_addr_t size)
 {  {
     ram_addr_t addr;      RAMBlock *new_block;
     if ((phys_ram_alloc_offset + size) > phys_ram_size) {  
         fprintf(stderr, "Not enough memory (requested_size = %" PRIu64 ", max memory = %" PRIu64 ")\n",      size = TARGET_PAGE_ALIGN(size);
                 (uint64_t)size, (uint64_t)phys_ram_size);      new_block = qemu_malloc(sizeof(*new_block));
         abort();  
     }  #if defined(TARGET_S390X) && defined(CONFIG_KVM)
     addr = phys_ram_alloc_offset;      /* XXX S390 KVM requires the topmost vma of the RAM to be < 256GB */
     phys_ram_alloc_offset = TARGET_PAGE_ALIGN(phys_ram_alloc_offset + size);      new_block->host = mmap((void*)0x1000000, size, PROT_EXEC|PROT_READ|PROT_WRITE,
     return addr;                             MAP_SHARED | MAP_ANONYMOUS, -1, 0);
   #else
       new_block->host = qemu_vmalloc(size);
   #endif
   #ifdef MADV_MERGEABLE
       madvise(new_block->host, size, MADV_MERGEABLE);
   #endif
       new_block->offset = last_ram_offset;
       new_block->length = size;
   
       new_block->next = ram_blocks;
       ram_blocks = new_block;
   
       phys_ram_dirty = qemu_realloc(phys_ram_dirty,
           (last_ram_offset + size) >> TARGET_PAGE_BITS);
       memset(phys_ram_dirty + (last_ram_offset >> TARGET_PAGE_BITS),
              0xff, size >> TARGET_PAGE_BITS);
   
       last_ram_offset += size;
   
       if (kvm_enabled())
           kvm_setup_guest_memory(new_block->host, size);
   
       return new_block->offset;
 }  }
   
 void qemu_ram_free(ram_addr_t addr)  void qemu_ram_free(ram_addr_t addr)
 {  {
       /* TODO: implement this.  */
   }
   
   /* Return a host pointer to ram allocated with qemu_ram_alloc.
      With the exception of the softmmu code in this file, this should
      only be used for local memory (e.g. video ram) that the device owns,
      and knows it isn't going to access beyond the end of the block.
   
      It should not be used for general purpose DMA.
      Use cpu_physical_memory_map/cpu_physical_memory_rw instead.
    */
   void *qemu_get_ram_ptr(ram_addr_t addr)
   {
       RAMBlock *prev;
       RAMBlock **prevp;
       RAMBlock *block;
   
       prev = NULL;
       prevp = &ram_blocks;
       block = ram_blocks;
       while (block && (block->offset > addr
                        || block->offset + block->length <= addr)) {
           if (prev)
             prevp = &prev->next;
           prev = block;
           block = block->next;
       }
       if (!block) {
           fprintf(stderr, "Bad ram offset %" PRIx64 "\n", (uint64_t)addr);
           abort();
       }
       /* Move this entry to to start of the list.  */
       if (prev) {
           prev->next = block->next;
           block->next = *prevp;
           *prevp = block;
       }
       return block->host + (addr - block->offset);
   }
   
   /* Some of the softmmu routines need to translate from a host pointer
      (typically a TLB entry) back to a ram offset.  */
   ram_addr_t qemu_ram_addr_from_host(void *ptr)
   {
       RAMBlock *prev;
       RAMBlock **prevp;
       RAMBlock *block;
       uint8_t *host = ptr;
   
       prev = NULL;
       prevp = &ram_blocks;
       block = ram_blocks;
       while (block && (block->host > host
                        || block->host + block->length <= host)) {
           if (prev)
             prevp = &prev->next;
           prev = block;
           block = block->next;
       }
       if (!block) {
           fprintf(stderr, "Bad ram pointer %p\n", ptr);
           abort();
       }
       return block->offset + (host - block->host);
 }  }
   
 static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr)  static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr)
Line 2398  static uint32_t unassigned_mem_readb(voi Line 2513  static uint32_t unassigned_mem_readb(voi
 #ifdef DEBUG_UNASSIGNED  #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);      printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
 #endif  #endif
 #if defined(TARGET_SPARC)  #if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
     do_unassigned_access(addr, 0, 0, 0, 1);      do_unassigned_access(addr, 0, 0, 0, 1);
 #endif  #endif
     return 0;      return 0;
Line 2409  static uint32_t unassigned_mem_readw(voi Line 2524  static uint32_t unassigned_mem_readw(voi
 #ifdef DEBUG_UNASSIGNED  #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);      printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
 #endif  #endif
 #if defined(TARGET_SPARC)  #if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
     do_unassigned_access(addr, 0, 0, 0, 2);      do_unassigned_access(addr, 0, 0, 0, 2);
 #endif  #endif
     return 0;      return 0;
Line 2420  static uint32_t unassigned_mem_readl(voi Line 2535  static uint32_t unassigned_mem_readl(voi
 #ifdef DEBUG_UNASSIGNED  #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);      printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
 #endif  #endif
 #if defined(TARGET_SPARC)  #if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
     do_unassigned_access(addr, 0, 0, 0, 4);      do_unassigned_access(addr, 0, 0, 0, 4);
 #endif  #endif
     return 0;      return 0;
Line 2431  static void unassigned_mem_writeb(void * Line 2546  static void unassigned_mem_writeb(void *
 #ifdef DEBUG_UNASSIGNED  #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);      printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
 #endif  #endif
 #if defined(TARGET_SPARC)  #if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
     do_unassigned_access(addr, 1, 0, 0, 1);      do_unassigned_access(addr, 1, 0, 0, 1);
 #endif  #endif
 }  }
Line 2441  static void unassigned_mem_writew(void * Line 2556  static void unassigned_mem_writew(void *
 #ifdef DEBUG_UNASSIGNED  #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);      printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
 #endif  #endif
 #if defined(TARGET_SPARC)  #if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
     do_unassigned_access(addr, 1, 0, 0, 2);      do_unassigned_access(addr, 1, 0, 0, 2);
 #endif  #endif
 }  }
Line 2451  static void unassigned_mem_writel(void * Line 2566  static void unassigned_mem_writel(void *
 #ifdef DEBUG_UNASSIGNED  #ifdef DEBUG_UNASSIGNED
     printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);      printf("Unassigned mem write " TARGET_FMT_plx " = 0x%x\n", addr, val);
 #endif  #endif
 #if defined(TARGET_SPARC)  #if defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
     do_unassigned_access(addr, 1, 0, 0, 4);      do_unassigned_access(addr, 1, 0, 0, 4);
 #endif  #endif
 }  }
   
 static CPUReadMemoryFunc *unassigned_mem_read[3] = {  static CPUReadMemoryFunc * const unassigned_mem_read[3] = {
     unassigned_mem_readb,      unassigned_mem_readb,
     unassigned_mem_readw,      unassigned_mem_readw,
     unassigned_mem_readl,      unassigned_mem_readl,
 };  };
   
 static CPUWriteMemoryFunc *unassigned_mem_write[3] = {  static CPUWriteMemoryFunc * const unassigned_mem_write[3] = {
     unassigned_mem_writeb,      unassigned_mem_writeb,
     unassigned_mem_writew,      unassigned_mem_writew,
     unassigned_mem_writel,      unassigned_mem_writel,
Line 2479  static void notdirty_mem_writeb(void *op Line 2594  static void notdirty_mem_writeb(void *op
         dirty_flags = phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS];          dirty_flags = phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS];
 #endif  #endif
     }      }
     stb_p(phys_ram_base + ram_addr, val);      stb_p(qemu_get_ram_ptr(ram_addr), val);
 #ifdef USE_KQEMU  
     if (cpu_single_env->kqemu_enabled &&  
         (dirty_flags & KQEMU_MODIFY_PAGE_MASK) != KQEMU_MODIFY_PAGE_MASK)  
         kqemu_modify_page(cpu_single_env, ram_addr);  
 #endif  
     dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);      dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);
     phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] = dirty_flags;      phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] = dirty_flags;
     /* we remove the notdirty callback only if the code has been      /* we remove the notdirty callback only if the code has been
Line 2504  static void notdirty_mem_writew(void *op Line 2614  static void notdirty_mem_writew(void *op
         dirty_flags = phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS];          dirty_flags = phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS];
 #endif  #endif
     }      }
     stw_p(phys_ram_base + ram_addr, val);      stw_p(qemu_get_ram_ptr(ram_addr), val);
 #ifdef USE_KQEMU  
     if (cpu_single_env->kqemu_enabled &&  
         (dirty_flags & KQEMU_MODIFY_PAGE_MASK) != KQEMU_MODIFY_PAGE_MASK)  
         kqemu_modify_page(cpu_single_env, ram_addr);  
 #endif  
     dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);      dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);
     phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] = dirty_flags;      phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] = dirty_flags;
     /* we remove the notdirty callback only if the code has been      /* we remove the notdirty callback only if the code has been
Line 2529  static void notdirty_mem_writel(void *op Line 2634  static void notdirty_mem_writel(void *op
         dirty_flags = phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS];          dirty_flags = phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS];
 #endif  #endif
     }      }
     stl_p(phys_ram_base + ram_addr, val);      stl_p(qemu_get_ram_ptr(ram_addr), val);
 #ifdef USE_KQEMU  
     if (cpu_single_env->kqemu_enabled &&  
         (dirty_flags & KQEMU_MODIFY_PAGE_MASK) != KQEMU_MODIFY_PAGE_MASK)  
         kqemu_modify_page(cpu_single_env, ram_addr);  
 #endif  
     dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);      dirty_flags |= (0xff & ~CODE_DIRTY_FLAG);
     phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] = dirty_flags;      phys_ram_dirty[ram_addr >> TARGET_PAGE_BITS] = dirty_flags;
     /* we remove the notdirty callback only if the code has been      /* we remove the notdirty callback only if the code has been
Line 2543  static void notdirty_mem_writel(void *op Line 2643  static void notdirty_mem_writel(void *op
         tlb_set_dirty(cpu_single_env, cpu_single_env->mem_io_vaddr);          tlb_set_dirty(cpu_single_env, cpu_single_env->mem_io_vaddr);
 }  }
   
 static CPUReadMemoryFunc *error_mem_read[3] = {  static CPUReadMemoryFunc * const error_mem_read[3] = {
     NULL, /* never used */      NULL, /* never used */
     NULL, /* never used */      NULL, /* never used */
     NULL, /* never used */      NULL, /* never used */
 };  };
   
 static CPUWriteMemoryFunc *notdirty_mem_write[3] = {  static CPUWriteMemoryFunc * const notdirty_mem_write[3] = {
     notdirty_mem_writeb,      notdirty_mem_writeb,
     notdirty_mem_writew,      notdirty_mem_writew,
     notdirty_mem_writel,      notdirty_mem_writel,
Line 2573  static void check_watchpoint(int offset, Line 2673  static void check_watchpoint(int offset,
         return;          return;
     }      }
     vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset;      vaddr = (env->mem_io_vaddr & TARGET_PAGE_MASK) + offset;
     TAILQ_FOREACH(wp, &env->watchpoints, entry) {      QTAILQ_FOREACH(wp, &env->watchpoints, entry) {
         if ((vaddr == (wp->vaddr & len_mask) ||          if ((vaddr == (wp->vaddr & len_mask) ||
              (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) {               (vaddr & wp->len_mask) == wp->vaddr) && (wp->flags & flags)) {
             wp->flags |= BP_WATCHPOINT_HIT;              wp->flags |= BP_WATCHPOINT_HIT;
Line 2642  static void watch_mem_writel(void *opaqu Line 2742  static void watch_mem_writel(void *opaqu
     stl_phys(addr, val);      stl_phys(addr, val);
 }  }
   
 static CPUReadMemoryFunc *watch_mem_read[3] = {  static CPUReadMemoryFunc * const watch_mem_read[3] = {
     watch_mem_readb,      watch_mem_readb,
     watch_mem_readw,      watch_mem_readw,
     watch_mem_readl,      watch_mem_readl,
 };  };
   
 static CPUWriteMemoryFunc *watch_mem_write[3] = {  static CPUWriteMemoryFunc * const watch_mem_write[3] = {
     watch_mem_writeb,      watch_mem_writeb,
     watch_mem_writew,      watch_mem_writew,
     watch_mem_writel,      watch_mem_writel,
Line 2740  static void subpage_writel (void *opaque Line 2840  static void subpage_writel (void *opaque
     subpage_writelen(opaque, addr, value, 2);      subpage_writelen(opaque, addr, value, 2);
 }  }
   
 static CPUReadMemoryFunc *subpage_read[] = {  static CPUReadMemoryFunc * const subpage_read[] = {
     &subpage_readb,      &subpage_readb,
     &subpage_readw,      &subpage_readw,
     &subpage_readl,      &subpage_readl,
 };  };
   
 static CPUWriteMemoryFunc *subpage_write[] = {  static CPUWriteMemoryFunc * const subpage_write[] = {
     &subpage_writeb,      &subpage_writeb,
     &subpage_writew,      &subpage_writew,
     &subpage_writel,      &subpage_writel,
Line 2763  static int subpage_register (subpage_t * Line 2863  static int subpage_register (subpage_t *
     idx = SUBPAGE_IDX(start);      idx = SUBPAGE_IDX(start);
     eidx = SUBPAGE_IDX(end);      eidx = SUBPAGE_IDX(end);
 #if defined(DEBUG_SUBPAGE)  #if defined(DEBUG_SUBPAGE)
     printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %d\n", __func__,      printf("%s: %p start %08x end %08x idx %08x eidx %08x mem %ld\n", __func__,
            mmio, start, end, idx, eidx, memory);             mmio, start, end, idx, eidx, memory);
 #endif  #endif
     memory >>= IO_MEM_SHIFT;      memory >>= IO_MEM_SHIFT;
Line 2794  static void *subpage_init (target_phys_a Line 2894  static void *subpage_init (target_phys_a
     mmio = qemu_mallocz(sizeof(subpage_t));      mmio = qemu_mallocz(sizeof(subpage_t));
   
     mmio->base = base;      mmio->base = base;
     subpage_memory = cpu_register_io_memory(0, subpage_read, subpage_write, mmio);      subpage_memory = cpu_register_io_memory(subpage_read, subpage_write, mmio);
 #if defined(DEBUG_SUBPAGE)  #if defined(DEBUG_SUBPAGE)
     printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__,      printf("%s: %p base " TARGET_FMT_plx " len %08x %d\n", __func__,
            mmio, base, TARGET_PAGE_SIZE, subpage_memory);             mmio, base, TARGET_PAGE_SIZE, subpage_memory);
Line 2819  static int get_free_io_mem_idx(void) Line 2919  static int get_free_io_mem_idx(void)
     return -1;      return -1;
 }  }
   
 static void io_mem_init(void)  
 {  
     int i;  
   
     cpu_register_io_memory(IO_MEM_ROM >> IO_MEM_SHIFT, error_mem_read, unassigned_mem_write, NULL);  
     cpu_register_io_memory(IO_MEM_UNASSIGNED >> IO_MEM_SHIFT, unassigned_mem_read, unassigned_mem_write, NULL);  
     cpu_register_io_memory(IO_MEM_NOTDIRTY >> IO_MEM_SHIFT, error_mem_read, notdirty_mem_write, NULL);  
     for (i=0; i<5; i++)  
         io_mem_used[i] = 1;  
   
     io_mem_watch = cpu_register_io_memory(0, watch_mem_read,  
                                           watch_mem_write, NULL);  
     /* alloc dirty bits array */  
     phys_ram_dirty = qemu_vmalloc(phys_ram_size >> TARGET_PAGE_BITS);  
     memset(phys_ram_dirty, 0xff, phys_ram_size >> TARGET_PAGE_BITS);  
 }  
   
 /* mem_read and mem_write are arrays of functions containing the  /* mem_read and mem_write are arrays of functions containing the
    function to access byte (index 0), word (index 1) and dword (index     function to access byte (index 0), word (index 1) and dword (index
    2). Functions can be omitted with a NULL function pointer. The     2). Functions can be omitted with a NULL function pointer.
    registered functions may be modified dynamically later.  
    If io_index is non zero, the corresponding io zone is     If io_index is non zero, the corresponding io zone is
    modified. If it is zero, a new io zone is allocated. The return     modified. If it is zero, a new io zone is allocated. The return
    value can be used with cpu_register_physical_memory(). (-1) is     value can be used with cpu_register_physical_memory(). (-1) is
    returned if error. */     returned if error. */
 int cpu_register_io_memory(int io_index,  static int cpu_register_io_memory_fixed(int io_index,
                            CPUReadMemoryFunc **mem_read,                                          CPUReadMemoryFunc * const *mem_read,
                            CPUWriteMemoryFunc **mem_write,                                          CPUWriteMemoryFunc * const *mem_write,
                            void *opaque)                                          void *opaque)
 {  {
     int i, subwidth = 0;      int i, subwidth = 0;
   
Line 2856  int cpu_register_io_memory(int io_index, Line 2938  int cpu_register_io_memory(int io_index,
         if (io_index == -1)          if (io_index == -1)
             return io_index;              return io_index;
     } else {      } else {
           io_index >>= IO_MEM_SHIFT;
         if (io_index >= IO_MEM_NB_ENTRIES)          if (io_index >= IO_MEM_NB_ENTRIES)
             return -1;              return -1;
     }      }
Line 2870  int cpu_register_io_memory(int io_index, Line 2953  int cpu_register_io_memory(int io_index,
     return (io_index << IO_MEM_SHIFT) | subwidth;      return (io_index << IO_MEM_SHIFT) | subwidth;
 }  }
   
   int cpu_register_io_memory(CPUReadMemoryFunc * const *mem_read,
                              CPUWriteMemoryFunc * const *mem_write,
                              void *opaque)
   {
       return cpu_register_io_memory_fixed(0, mem_read, mem_write, opaque);
   }
   
 void cpu_unregister_io_memory(int io_table_address)  void cpu_unregister_io_memory(int io_table_address)
 {  {
     int i;      int i;
Line 2883  void cpu_unregister_io_memory(int io_tab Line 2973  void cpu_unregister_io_memory(int io_tab
     io_mem_used[io_index] = 0;      io_mem_used[io_index] = 0;
 }  }
   
 CPUWriteMemoryFunc **cpu_get_io_memory_write(int io_index)  static void io_mem_init(void)
 {  {
     return io_mem_write[io_index >> IO_MEM_SHIFT];      int i;
 }  
   
 CPUReadMemoryFunc **cpu_get_io_memory_read(int io_index)      cpu_register_io_memory_fixed(IO_MEM_ROM, error_mem_read, unassigned_mem_write, NULL);
 {      cpu_register_io_memory_fixed(IO_MEM_UNASSIGNED, unassigned_mem_read, unassigned_mem_write, NULL);
     return io_mem_read[io_index >> IO_MEM_SHIFT];      cpu_register_io_memory_fixed(IO_MEM_NOTDIRTY, error_mem_read, notdirty_mem_write, NULL);
       for (i=0; i<5; i++)
           io_mem_used[i] = 1;
   
       io_mem_watch = cpu_register_io_memory(watch_mem_read,
                                             watch_mem_write, NULL);
 }  }
   
 #endif /* !defined(CONFIG_USER_ONLY) */  #endif /* !defined(CONFIG_USER_ONLY) */
Line 2988  void cpu_physical_memory_rw(target_phys_ Line 3082  void cpu_physical_memory_rw(target_phys_
                 unsigned long addr1;                  unsigned long addr1;
                 addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);                  addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
                 /* RAM case */                  /* RAM case */
                 ptr = phys_ram_base + addr1;                  ptr = qemu_get_ram_ptr(addr1);
                 memcpy(ptr, buf, l);                  memcpy(ptr, buf, l);
                 if (!cpu_physical_memory_is_dirty(addr1)) {                  if (!cpu_physical_memory_is_dirty(addr1)) {
                     /* invalidate code */                      /* invalidate code */
Line 3024  void cpu_physical_memory_rw(target_phys_ Line 3118  void cpu_physical_memory_rw(target_phys_
                 }                  }
             } else {              } else {
                 /* RAM case */                  /* RAM case */
                 ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +                  ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
                     (addr & ~TARGET_PAGE_MASK);                      (addr & ~TARGET_PAGE_MASK);
                 memcpy(buf, ptr, l);                  memcpy(buf, ptr, l);
             }              }
Line 3065  void cpu_physical_memory_write_rom(targe Line 3159  void cpu_physical_memory_write_rom(targe
             unsigned long addr1;              unsigned long addr1;
             addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);              addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
             /* ROM/RAM case */              /* ROM/RAM case */
             ptr = phys_ram_base + addr1;              ptr = qemu_get_ram_ptr(addr1);
             memcpy(ptr, buf, l);              memcpy(ptr, buf, l);
         }          }
         len -= l;          len -= l;
Line 3085  static BounceBuffer bounce; Line 3179  static BounceBuffer bounce;
 typedef struct MapClient {  typedef struct MapClient {
     void *opaque;      void *opaque;
     void (*callback)(void *opaque);      void (*callback)(void *opaque);
     LIST_ENTRY(MapClient) link;      QLIST_ENTRY(MapClient) link;
 } MapClient;  } MapClient;
   
 static LIST_HEAD(map_client_list, MapClient) map_client_list  static QLIST_HEAD(map_client_list, MapClient) map_client_list
     = LIST_HEAD_INITIALIZER(map_client_list);      = QLIST_HEAD_INITIALIZER(map_client_list);
   
 void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque))  void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque))
 {  {
Line 3097  void *cpu_register_map_client(void *opaq Line 3191  void *cpu_register_map_client(void *opaq
   
     client->opaque = opaque;      client->opaque = opaque;
     client->callback = callback;      client->callback = callback;
     LIST_INSERT_HEAD(&map_client_list, client, link);      QLIST_INSERT_HEAD(&map_client_list, client, link);
     return client;      return client;
 }  }
   
Line 3105  void cpu_unregister_map_client(void *_cl Line 3199  void cpu_unregister_map_client(void *_cl
 {  {
     MapClient *client = (MapClient *)_client;      MapClient *client = (MapClient *)_client;
   
     LIST_REMOVE(client, link);      QLIST_REMOVE(client, link);
       qemu_free(client);
 }  }
   
 static void cpu_notify_map_clients(void)  static void cpu_notify_map_clients(void)
 {  {
     MapClient *client;      MapClient *client;
   
     while (!LIST_EMPTY(&map_client_list)) {      while (!QLIST_EMPTY(&map_client_list)) {
         client = LIST_FIRST(&map_client_list);          client = QLIST_FIRST(&map_client_list);
         client->callback(client->opaque);          client->callback(client->opaque);
         LIST_REMOVE(client, link);          cpu_unregister_map_client(client);
     }      }
 }  }
   
Line 3165  void *cpu_physical_memory_map(target_phy Line 3260  void *cpu_physical_memory_map(target_phy
             ptr = bounce.buffer;              ptr = bounce.buffer;
         } else {          } else {
             addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);              addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
             ptr = phys_ram_base + addr1;              ptr = qemu_get_ram_ptr(addr1);
         }          }
         if (!done) {          if (!done) {
             ret = ptr;              ret = ptr;
Line 3190  void cpu_physical_memory_unmap(void *buf Line 3285  void cpu_physical_memory_unmap(void *buf
 {  {
     if (buffer != bounce.buffer) {      if (buffer != bounce.buffer) {
         if (is_write) {          if (is_write) {
             unsigned long addr1 = (uint8_t *)buffer - phys_ram_base;              ram_addr_t addr1 = qemu_ram_addr_from_host(buffer);
             while (access_len) {              while (access_len) {
                 unsigned l;                  unsigned l;
                 l = TARGET_PAGE_SIZE;                  l = TARGET_PAGE_SIZE;
Line 3212  void cpu_physical_memory_unmap(void *buf Line 3307  void cpu_physical_memory_unmap(void *buf
     if (is_write) {      if (is_write) {
         cpu_physical_memory_write(bounce.addr, bounce.buffer, access_len);          cpu_physical_memory_write(bounce.addr, bounce.buffer, access_len);
     }      }
     qemu_free(bounce.buffer);      qemu_vfree(bounce.buffer);
     bounce.buffer = NULL;      bounce.buffer = NULL;
     cpu_notify_map_clients();      cpu_notify_map_clients();
 }  }
Line 3242  uint32_t ldl_phys(target_phys_addr_t add Line 3337  uint32_t ldl_phys(target_phys_addr_t add
         val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);          val = io_mem_read[io_index][2](io_mem_opaque[io_index], addr);
     } else {      } else {
         /* RAM case */          /* RAM case */
         ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +          ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
             (addr & ~TARGET_PAGE_MASK);              (addr & ~TARGET_PAGE_MASK);
         val = ldl_p(ptr);          val = ldl_p(ptr);
     }      }
Line 3280  uint64_t ldq_phys(target_phys_addr_t add Line 3375  uint64_t ldq_phys(target_phys_addr_t add
 #endif  #endif
     } else {      } else {
         /* RAM case */          /* RAM case */
         ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +          ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
             (addr & ~TARGET_PAGE_MASK);              (addr & ~TARGET_PAGE_MASK);
         val = ldq_p(ptr);          val = ldq_p(ptr);
     }      }
Line 3327  void stl_phys_notdirty(target_phys_addr_ Line 3422  void stl_phys_notdirty(target_phys_addr_
         io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);          io_mem_write[io_index][2](io_mem_opaque[io_index], addr, val);
     } else {      } else {
         unsigned long addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);          unsigned long addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
         ptr = phys_ram_base + addr1;          ptr = qemu_get_ram_ptr(addr1);
         stl_p(ptr, val);          stl_p(ptr, val);
   
         if (unlikely(in_migration)) {          if (unlikely(in_migration)) {
Line 3368  void stq_phys_notdirty(target_phys_addr_ Line 3463  void stq_phys_notdirty(target_phys_addr_
         io_mem_write[io_index][2](io_mem_opaque[io_index], addr + 4, val >> 32);          io_mem_write[io_index][2](io_mem_opaque[io_index], addr + 4, val >> 32);
 #endif  #endif
     } else {      } else {
         ptr = phys_ram_base + (pd & TARGET_PAGE_MASK) +          ptr = qemu_get_ram_ptr(pd & TARGET_PAGE_MASK) +
             (addr & ~TARGET_PAGE_MASK);              (addr & ~TARGET_PAGE_MASK);
         stq_p(ptr, val);          stq_p(ptr, val);
     }      }
Line 3398  void stl_phys(target_phys_addr_t addr, u Line 3493  void stl_phys(target_phys_addr_t addr, u
         unsigned long addr1;          unsigned long addr1;
         addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);          addr1 = (pd & TARGET_PAGE_MASK) + (addr & ~TARGET_PAGE_MASK);
         /* RAM case */          /* RAM case */
         ptr = phys_ram_base + addr1;          ptr = qemu_get_ram_ptr(addr1);
         stl_p(ptr, val);          stl_p(ptr, val);
         if (!cpu_physical_memory_is_dirty(addr1)) {          if (!cpu_physical_memory_is_dirty(addr1)) {
             /* invalidate code */              /* invalidate code */
Line 3433  void stq_phys(target_phys_addr_t addr, u Line 3528  void stq_phys(target_phys_addr_t addr, u
   
 #endif  #endif
   
 /* virtual memory access for debug */  /* virtual memory access for debug (includes writing to ROM) */
 int cpu_memory_rw_debug(CPUState *env, target_ulong addr,  int cpu_memory_rw_debug(CPUState *env, target_ulong addr,
                         uint8_t *buf, int len, int is_write)                          uint8_t *buf, int len, int is_write)
 {  {
Line 3450  int cpu_memory_rw_debug(CPUState *env, t Line 3545  int cpu_memory_rw_debug(CPUState *env, t
         l = (page + TARGET_PAGE_SIZE) - addr;          l = (page + TARGET_PAGE_SIZE) - addr;
         if (l > len)          if (l > len)
             l = len;              l = len;
         cpu_physical_memory_rw(phys_addr + (addr & ~TARGET_PAGE_MASK),          phys_addr += (addr & ~TARGET_PAGE_MASK);
                                buf, l, is_write);  #if !defined(CONFIG_USER_ONLY)
           if (is_write)
               cpu_physical_memory_write_rom(phys_addr, buf, l);
           else
   #endif
               cpu_physical_memory_rw(phys_addr, buf, l, is_write);
         len -= l;          len -= l;
         buf += l;          buf += l;
         addr += l;          addr += l;

Removed from v.1.1.1.8  
changed lines
  Added in v.1.1.1.12


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