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1.1 root 1: <?xml version="1.0"?>
2: <!-- Copyright (C) 2007, 2008 Free Software Foundation, Inc.
3:
4: Copying and distribution of this file, with or without modification,
5: are permitted in any medium without royalty provided the copyright
6: notice and this notice are preserved. -->
7:
8: <!DOCTYPE feature SYSTEM "gdb-target.dtd">
9: <feature name="org.gnu.gdb.power.altivec">
10: <vector id="v4f" type="ieee_single" count="4"/>
11: <vector id="v4i32" type="int32" count="4"/>
12: <vector id="v8i16" type="int16" count="8"/>
13: <vector id="v16i8" type="int8" count="16"/>
14: <union id="vec128">
15: <field name="uint128" type="uint128"/>
16: <field name="v4_float" type="v4f"/>
17: <field name="v4_int32" type="v4i32"/>
18: <field name="v8_int16" type="v8i16"/>
19: <field name="v16_int8" type="v16i8"/>
20: </union>
21:
22: <reg name="vr0" bitsize="128" type="vec128"/>
23: <reg name="vr1" bitsize="128" type="vec128"/>
24: <reg name="vr2" bitsize="128" type="vec128"/>
25: <reg name="vr3" bitsize="128" type="vec128"/>
26: <reg name="vr4" bitsize="128" type="vec128"/>
27: <reg name="vr5" bitsize="128" type="vec128"/>
28: <reg name="vr6" bitsize="128" type="vec128"/>
29: <reg name="vr7" bitsize="128" type="vec128"/>
30: <reg name="vr8" bitsize="128" type="vec128"/>
31: <reg name="vr9" bitsize="128" type="vec128"/>
32: <reg name="vr10" bitsize="128" type="vec128"/>
33: <reg name="vr11" bitsize="128" type="vec128"/>
34: <reg name="vr12" bitsize="128" type="vec128"/>
35: <reg name="vr13" bitsize="128" type="vec128"/>
36: <reg name="vr14" bitsize="128" type="vec128"/>
37: <reg name="vr15" bitsize="128" type="vec128"/>
38: <reg name="vr16" bitsize="128" type="vec128"/>
39: <reg name="vr17" bitsize="128" type="vec128"/>
40: <reg name="vr18" bitsize="128" type="vec128"/>
41: <reg name="vr19" bitsize="128" type="vec128"/>
42: <reg name="vr20" bitsize="128" type="vec128"/>
43: <reg name="vr21" bitsize="128" type="vec128"/>
44: <reg name="vr22" bitsize="128" type="vec128"/>
45: <reg name="vr23" bitsize="128" type="vec128"/>
46: <reg name="vr24" bitsize="128" type="vec128"/>
47: <reg name="vr25" bitsize="128" type="vec128"/>
48: <reg name="vr26" bitsize="128" type="vec128"/>
49: <reg name="vr27" bitsize="128" type="vec128"/>
50: <reg name="vr28" bitsize="128" type="vec128"/>
51: <reg name="vr29" bitsize="128" type="vec128"/>
52: <reg name="vr30" bitsize="128" type="vec128"/>
53: <reg name="vr31" bitsize="128" type="vec128"/>
54:
55: <reg name="vscr" bitsize="32" group="vector"/>
56: <reg name="vrsave" bitsize="32" group="vector"/>
57: </feature>
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