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1.1 root 1: /*
2: * Misc ARM declarations
3: *
4: * Copyright (c) 2006 CodeSourcery.
5: * Written by Paul Brook
6: *
7: * This code is licenced under the LGPL.
8: *
9: */
10:
11: #ifndef ARM_MISC_H
12: #define ARM_MISC_H 1
13:
14: /* The CPU is also modeled as an interrupt controller. */
15: #define ARM_PIC_CPU_IRQ 0
16: #define ARM_PIC_CPU_FIQ 1
17: qemu_irq *arm_pic_init_cpu(CPUState *env);
18:
19: /* armv7m.c */
20: qemu_irq *armv7m_init(int flash_size, int sram_size,
21: const char *kernel_filename, const char *cpu_model);
22:
23: /* arm_boot.c */
1.1.1.2 ! root 24: struct arm_boot_info {
! 25: int ram_size;
! 26: const char *kernel_filename;
! 27: const char *kernel_cmdline;
! 28: const char *initrd_filename;
! 29: target_phys_addr_t loader_start;
! 30: int nb_cpus;
! 31: int board_id;
! 32: int (*atag_board)(struct arm_boot_info *info, void *p);
! 33: };
! 34: void arm_load_kernel(CPUState *env, struct arm_boot_info *info);
1.1 root 35:
36: /* armv7m_nvic.c */
1.1.1.2 ! root 37:
! 38: /* Multiplication factor to convert from system clock ticks to qemu timer
! 39: ticks. */
! 40: extern int system_clock_scale;
1.1 root 41: qemu_irq *armv7m_nvic_init(CPUState *env);
42:
43: /* stellaris_enent.c */
44: void stellaris_enet_init(NICInfo *nd, uint32_t base, qemu_irq irq);
45:
46: #endif /* !ARM_MISC_H */
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