Diff for /qemu/hw/armv7m.c between versions 1.1.1.2 and 1.1.1.3

version 1.1.1.2, 2018/04/24 16:52:55 version 1.1.1.3, 2018/04/24 17:23:58
Line 7 Line 7
  * This code is licenced under the GPL.   * This code is licenced under the GPL.
  */   */
   
 #include "hw.h"  #include "sysbus.h"
 #include "arm-misc.h"  #include "arm-misc.h"
 #include "sysemu.h"  #include "sysemu.h"
   
Line 117  static CPUWriteMemoryFunc *bitband_write Line 117  static CPUWriteMemoryFunc *bitband_write
    bitband_writel     bitband_writel
 };  };
   
 static void armv7m_bitband_init(void)  typedef struct {
       SysBusDevice busdev;
       uint32_t base;
   } BitBandState;
   
   static void bitband_init(SysBusDevice *dev)
 {  {
       BitBandState *s = FROM_SYSBUS(BitBandState, dev);
     int iomemtype;      int iomemtype;
     static uint32_t bitband1_offset = 0x20000000;  
     static uint32_t bitband2_offset = 0x40000000;  
   
     iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,      iomemtype = cpu_register_io_memory(bitband_readfn, bitband_writefn,
                                        &bitband1_offset);                                         &s->base);
     cpu_register_physical_memory(0x22000000, 0x02000000, iomemtype);      sysbus_init_mmio(dev, 0x02000000, iomemtype);
     iomemtype = cpu_register_io_memory(0, bitband_readfn, bitband_writefn,  }
                                        &bitband2_offset);  
     cpu_register_physical_memory(0x42000000, 0x02000000, iomemtype);  static void armv7m_bitband_init(void)
   {
       DeviceState *dev;
   
       dev = qdev_create(NULL, "ARM,bitband-memory");
       qdev_prop_set_uint32(dev, "base", 0x20000000);
       qdev_init(dev);
       sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
   
       dev = qdev_create(NULL, "ARM,bitband-memory");
       qdev_prop_set_uint32(dev, "base", 0x40000000);
       qdev_init(dev);
       sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
 }  }
   
 /* Board init.  */  /* Board init.  */
Line 140  qemu_irq *armv7m_init(int flash_size, in Line 156  qemu_irq *armv7m_init(int flash_size, in
                       const char *kernel_filename, const char *cpu_model)                        const char *kernel_filename, const char *cpu_model)
 {  {
     CPUState *env;      CPUState *env;
     qemu_irq *pic;      DeviceState *nvic;
       /* FIXME: make this local state.  */
       static qemu_irq pic[64];
       qemu_irq *cpu_pic;
     uint32_t pc;      uint32_t pc;
     int image_size;      int image_size;
     uint64_t entry;      uint64_t entry;
     uint64_t lowaddr;      uint64_t lowaddr;
       int i;
   
     flash_size *= 1024;      flash_size *= 1024;
     sram_size *= 1024;      sram_size *= 1024;
Line 170  qemu_irq *armv7m_init(int flash_size, in Line 190  qemu_irq *armv7m_init(int flash_size, in
 #endif  #endif
   
     /* Flash programming is done via the SCU, so pretend it is ROM.  */      /* Flash programming is done via the SCU, so pretend it is ROM.  */
     cpu_register_physical_memory(0, flash_size, IO_MEM_ROM);      cpu_register_physical_memory(0, flash_size,
                                    qemu_ram_alloc(flash_size) | IO_MEM_ROM);
     cpu_register_physical_memory(0x20000000, sram_size,      cpu_register_physical_memory(0x20000000, sram_size,
                                  flash_size + IO_MEM_RAM);                                   qemu_ram_alloc(sram_size) | IO_MEM_RAM);
     armv7m_bitband_init();      armv7m_bitband_init();
   
     pic = armv7m_nvic_init(env);      nvic = qdev_create(NULL, "armv7m_nvic");
       env->v7m.nvic = nvic;
       qdev_init(nvic);
       cpu_pic = arm_pic_init_cpu(env);
       sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
       for (i = 0; i < 64; i++) {
           pic[i] = qdev_get_gpio_in(nvic, i);
       }
   
     image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL);      image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL);
     if (image_size < 0) {      if (image_size < 0) {
         image_size = load_image(kernel_filename, phys_ram_base);          image_size = load_image_targphys(kernel_filename, 0, flash_size);
         lowaddr = 0;          lowaddr = 0;
     }      }
     if (image_size < 0) {      if (image_size < 0) {
Line 192  qemu_irq *armv7m_init(int flash_size, in Line 220  qemu_irq *armv7m_init(int flash_size, in
        regular ROM image and perform the normal CPU reset sequence.         regular ROM image and perform the normal CPU reset sequence.
        Otherwise jump directly to the entry point.  */         Otherwise jump directly to the entry point.  */
     if (lowaddr == 0) {      if (lowaddr == 0) {
         env->regs[13] = tswap32(*(uint32_t *)phys_ram_base);          env->regs[13] = ldl_phys(0);
         pc = tswap32(*(uint32_t *)(phys_ram_base + 4));          pc = ldl_phys(4);
     } else {      } else {
         pc = entry;          pc = entry;
     }      }
Line 203  qemu_irq *armv7m_init(int flash_size, in Line 231  qemu_irq *armv7m_init(int flash_size, in
     /* Hack to map an additional page of ram at the top of the address      /* Hack to map an additional page of ram at the top of the address
        space.  This stops qemu complaining about executing code outside RAM         space.  This stops qemu complaining about executing code outside RAM
        when returning from an exception.  */         when returning from an exception.  */
     cpu_register_physical_memory(0xfffff000, 0x1000, IO_MEM_RAM + ram_size);      cpu_register_physical_memory(0xfffff000, 0x1000,
                                    qemu_ram_alloc(0x1000) | IO_MEM_RAM);
   
     return pic;      return pic;
 }  }
   
   static SysBusDeviceInfo bitband_info = {
       .init = bitband_init,
       .qdev.name  = "ARM,bitband-memory",
       .qdev.size  = sizeof(BitBandState),
       .qdev.props = (Property[]) {
           {
               .name   = "base",
               .info   = &qdev_prop_hex32,
               .offset = offsetof(BitBandState, base),
           },
           {/* end of list */}
       }
   };
   
   static void armv7m_register_devices(void)
   {
       sysbus_register_withprop(&bitband_info);
   }
   
   device_init(armv7m_register_devices)

Removed from v.1.1.1.2  
changed lines
  Added in v.1.1.1.3


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