--- qemu/hw/armv7m.c	2018/04/24 17:23:58	1.1.1.3
+++ qemu/hw/armv7m.c	2018/04/24 17:38:00	1.1.1.4
@@ -10,6 +10,8 @@
 #include "sysbus.h"
 #include "arm-misc.h"
 #include "sysemu.h"
+#include "loader.h"
+#include "elf.h"
 
 /* Bitbanded IO.  Each word corresponds to a single bit.  */
 
@@ -105,13 +107,13 @@ static void bitband_writel(void *opaque,
     cpu_physical_memory_write(addr, (uint8_t *)&v, 4);
 }
 
-static CPUReadMemoryFunc *bitband_readfn[] = {
+static CPUReadMemoryFunc * const bitband_readfn[] = {
    bitband_readb,
    bitband_readw,
    bitband_readl
 };
 
-static CPUWriteMemoryFunc *bitband_writefn[] = {
+static CPUWriteMemoryFunc * const bitband_writefn[] = {
    bitband_writeb,
    bitband_writew,
    bitband_writel
@@ -122,7 +124,7 @@ typedef struct {
     uint32_t base;
 } BitBandState;
 
-static void bitband_init(SysBusDevice *dev)
+static int bitband_init(SysBusDevice *dev)
 {
     BitBandState *s = FROM_SYSBUS(BitBandState, dev);
     int iomemtype;
@@ -130,6 +132,7 @@ static void bitband_init(SysBusDevice *d
     iomemtype = cpu_register_io_memory(bitband_readfn, bitband_writefn,
                                        &s->base);
     sysbus_init_mmio(dev, 0x02000000, iomemtype);
+    return 0;
 }
 
 static void armv7m_bitband_init(void)
@@ -138,12 +141,12 @@ static void armv7m_bitband_init(void)
 
     dev = qdev_create(NULL, "ARM,bitband-memory");
     qdev_prop_set_uint32(dev, "base", 0x20000000);
-    qdev_init(dev);
+    qdev_init_nofail(dev);
     sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x22000000);
 
     dev = qdev_create(NULL, "ARM,bitband-memory");
     qdev_prop_set_uint32(dev, "base", 0x40000000);
-    qdev_init(dev);
+    qdev_init_nofail(dev);
     sysbus_mmio_map(sysbus_from_qdev(dev), 0, 0x42000000);
 }
 
@@ -165,6 +168,7 @@ qemu_irq *armv7m_init(int flash_size, in
     uint64_t entry;
     uint64_t lowaddr;
     int i;
+    int big_endian;
 
     flash_size *= 1024;
     sram_size *= 1024;
@@ -198,14 +202,21 @@ qemu_irq *armv7m_init(int flash_size, in
 
     nvic = qdev_create(NULL, "armv7m_nvic");
     env->v7m.nvic = nvic;
-    qdev_init(nvic);
+    qdev_init_nofail(nvic);
     cpu_pic = arm_pic_init_cpu(env);
     sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
     for (i = 0; i < 64; i++) {
         pic[i] = qdev_get_gpio_in(nvic, i);
     }
 
-    image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL);
+#ifdef TARGET_WORDS_BIGENDIAN
+    big_endian = 1;
+#else
+    big_endian = 0;
+#endif
+
+    image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL,
+                          big_endian, ELF_MACHINE, 1);
     if (image_size < 0) {
         image_size = load_image_targphys(kernel_filename, 0, flash_size);
 	lowaddr = 0;
@@ -242,12 +253,8 @@ static SysBusDeviceInfo bitband_info = {
     .qdev.name  = "ARM,bitband-memory",
     .qdev.size  = sizeof(BitBandState),
     .qdev.props = (Property[]) {
-        {
-            .name   = "base",
-            .info   = &qdev_prop_hex32,
-            .offset = offsetof(BitBandState, base),
-        },
-        {/* end of list */}
+        DEFINE_PROP_UINT32("base", BitBandState, base, 0),
+        DEFINE_PROP_END_OF_LIST(),
     }
 };