Diff for /qemu/hw/armv7m.c between versions 1.1.1.4 and 1.1.1.5

version 1.1.1.4, 2018/04/24 17:38:00 version 1.1.1.5, 2018/04/24 18:28:47
Line 151  static void armv7m_bitband_init(void) Line 151  static void armv7m_bitband_init(void)
 }  }
   
 /* Board init.  */  /* Board init.  */
   
   static void armv7m_reset(void *opaque)
   {
       cpu_reset((CPUState *)opaque);
   }
   
 /* Init CPU and memory for a v7-M based board.  /* Init CPU and memory for a v7-M based board.
    flash_size and sram_size are in kb.     flash_size and sram_size are in kb.
    Returns the NVIC array.  */     Returns the NVIC array.  */
Line 163  qemu_irq *armv7m_init(int flash_size, in Line 169  qemu_irq *armv7m_init(int flash_size, in
     /* FIXME: make this local state.  */      /* FIXME: make this local state.  */
     static qemu_irq pic[64];      static qemu_irq pic[64];
     qemu_irq *cpu_pic;      qemu_irq *cpu_pic;
     uint32_t pc;  
     int image_size;      int image_size;
     uint64_t entry;      uint64_t entry;
     uint64_t lowaddr;      uint64_t lowaddr;
Line 195  qemu_irq *armv7m_init(int flash_size, in Line 200  qemu_irq *armv7m_init(int flash_size, in
   
     /* Flash programming is done via the SCU, so pretend it is ROM.  */      /* Flash programming is done via the SCU, so pretend it is ROM.  */
     cpu_register_physical_memory(0, flash_size,      cpu_register_physical_memory(0, flash_size,
                                  qemu_ram_alloc(flash_size) | IO_MEM_ROM);                                   qemu_ram_alloc(NULL, "armv7m.flash",
                                                   flash_size) | IO_MEM_ROM);
     cpu_register_physical_memory(0x20000000, sram_size,      cpu_register_physical_memory(0x20000000, sram_size,
                                  qemu_ram_alloc(sram_size) | IO_MEM_RAM);                                   qemu_ram_alloc(NULL, "armv7m.sram",
                                                   sram_size) | IO_MEM_RAM);
     armv7m_bitband_init();      armv7m_bitband_init();
   
     nvic = qdev_create(NULL, "armv7m_nvic");      nvic = qdev_create(NULL, "armv7m_nvic");
     env->v7m.nvic = nvic;      env->nvic = nvic;
     qdev_init_nofail(nvic);      qdev_init_nofail(nvic);
     cpu_pic = arm_pic_init_cpu(env);      cpu_pic = arm_pic_init_cpu(env);
     sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);      sysbus_connect_irq(sysbus_from_qdev(nvic), 0, cpu_pic[ARM_PIC_CPU_IRQ]);
Line 215  qemu_irq *armv7m_init(int flash_size, in Line 222  qemu_irq *armv7m_init(int flash_size, in
     big_endian = 0;      big_endian = 0;
 #endif  #endif
   
     image_size = load_elf(kernel_filename, 0, &entry, &lowaddr, NULL,      image_size = load_elf(kernel_filename, NULL, NULL, &entry, &lowaddr,
                           big_endian, ELF_MACHINE, 1);                            NULL, big_endian, ELF_MACHINE, 1);
     if (image_size < 0) {      if (image_size < 0) {
         image_size = load_image_targphys(kernel_filename, 0, flash_size);          image_size = load_image_targphys(kernel_filename, 0, flash_size);
         lowaddr = 0;          lowaddr = 0;
Line 227  qemu_irq *armv7m_init(int flash_size, in Line 234  qemu_irq *armv7m_init(int flash_size, in
         exit(1);          exit(1);
     }      }
   
     /* If the image was loaded at address zero then assume it is a  
        regular ROM image and perform the normal CPU reset sequence.  
        Otherwise jump directly to the entry point.  */  
     if (lowaddr == 0) {  
         env->regs[13] = ldl_phys(0);  
         pc = ldl_phys(4);  
     } else {  
         pc = entry;  
     }  
     env->thumb = pc & 1;  
     env->regs[15] = pc & ~1;  
   
     /* Hack to map an additional page of ram at the top of the address      /* Hack to map an additional page of ram at the top of the address
        space.  This stops qemu complaining about executing code outside RAM         space.  This stops qemu complaining about executing code outside RAM
        when returning from an exception.  */         when returning from an exception.  */
     cpu_register_physical_memory(0xfffff000, 0x1000,      cpu_register_physical_memory(0xfffff000, 0x1000,
                                  qemu_ram_alloc(0x1000) | IO_MEM_RAM);                                   qemu_ram_alloc(NULL, "armv7m.hack", 
                                                   0x1000) | IO_MEM_RAM);
   
       qemu_register_reset(armv7m_reset, env);
     return pic;      return pic;
 }  }
   

Removed from v.1.1.1.4  
changed lines
  Added in v.1.1.1.5


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