![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to fdc.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Qemu by Fabrice Bellard] / qemu / hw|
Return to fdc.c CVS log | Up to [Qemu by Fabrice Bellard] / qemu / hw |
1.1 root 1: /*
2: * QEMU Floppy disk emulator (Intel 82078)
1.1.1.3 root 3: *
4: * Copyright (c) 2003, 2007 Jocelyn Mayer
1.1.1.4 root 5: * Copyright (c) 2008 Herv� Poussineau
1.1.1.3 root 6: *
1.1 root 7: * Permission is hereby granted, free of charge, to any person obtaining a copy
8: * of this software and associated documentation files (the "Software"), to deal
9: * in the Software without restriction, including without limitation the rights
10: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11: * copies of the Software, and to permit persons to whom the Software is
12: * furnished to do so, subject to the following conditions:
13: *
14: * The above copyright notice and this permission notice shall be included in
15: * all copies or substantial portions of the Software.
16: *
17: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23: * THE SOFTWARE.
24: */
25: /*
26: * The controller is used in Sun4m systems in a slightly different
27: * way. There are changes in DOR register and DMA is not available.
28: */
1.1.1.5 ! root 29:
1.1.1.3 root 30: #include "hw.h"
31: #include "fdc.h"
32: #include "block.h"
33: #include "qemu-timer.h"
34: #include "isa.h"
1.1.1.5 ! root 35: #include "sysbus.h"
! 36: #include "qdev-addr.h"
1.1 root 37:
38: /********************************************************/
39: /* debug Floppy devices */
40: //#define DEBUG_FLOPPY
41:
42: #ifdef DEBUG_FLOPPY
1.1.1.5 ! root 43: #define FLOPPY_DPRINTF(fmt, ...) \
! 44: do { printf("FLOPPY: " fmt , ## __VA_ARGS__); } while (0)
1.1 root 45: #else
1.1.1.5 ! root 46: #define FLOPPY_DPRINTF(fmt, ...)
1.1 root 47: #endif
48:
1.1.1.5 ! root 49: #define FLOPPY_ERROR(fmt, ...) \
! 50: do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ## __VA_ARGS__); } while (0)
1.1 root 51:
52: /********************************************************/
53: /* Floppy drive emulation */
54:
1.1.1.4 root 55: #define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
56: #define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
57:
1.1 root 58: /* Will always be a fixed parameter for us */
1.1.1.4 root 59: #define FD_SECTOR_LEN 512
60: #define FD_SECTOR_SC 2 /* Sector size code */
61: #define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
1.1 root 62:
63: /* Floppy disk drive emulation */
64: typedef enum fdisk_type_t {
65: FDRIVE_DISK_288 = 0x01, /* 2.88 MB disk */
66: FDRIVE_DISK_144 = 0x02, /* 1.44 MB disk */
67: FDRIVE_DISK_720 = 0x03, /* 720 kB disk */
68: FDRIVE_DISK_USER = 0x04, /* User defined geometry */
69: FDRIVE_DISK_NONE = 0x05, /* No disk */
70: } fdisk_type_t;
71:
72: typedef enum fdrive_type_t {
73: FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
74: FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
75: FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
76: FDRIVE_DRV_NONE = 0x03, /* No drive connected */
77: } fdrive_type_t;
78:
79: typedef enum fdisk_flags_t {
80: FDISK_DBL_SIDES = 0x01,
81: } fdisk_flags_t;
82:
83: typedef struct fdrive_t {
84: BlockDriverState *bs;
85: /* Drive status */
86: fdrive_type_t drive;
87: uint8_t perpendicular; /* 2.88 MB access mode */
88: /* Position */
89: uint8_t head;
90: uint8_t track;
91: uint8_t sect;
92: /* Media */
93: fdisk_flags_t flags;
94: uint8_t last_sect; /* Nb sector per track */
95: uint8_t max_track; /* Nb of tracks */
96: uint16_t bps; /* Bytes per sector */
97: uint8_t ro; /* Is read-only */
98: } fdrive_t;
99:
100: static void fd_init (fdrive_t *drv, BlockDriverState *bs)
101: {
102: /* Drive */
103: drv->bs = bs;
104: drv->drive = FDRIVE_DRV_NONE;
105: drv->perpendicular = 0;
106: /* Disk */
107: drv->last_sect = 0;
108: drv->max_track = 0;
109: }
110:
111: static int _fd_sector (uint8_t head, uint8_t track,
1.1.1.3 root 112: uint8_t sect, uint8_t last_sect)
1.1 root 113: {
114: return (((track * 2) + head) * last_sect) + sect - 1;
115: }
116:
117: /* Returns current position, in sectors, for given drive */
118: static int fd_sector (fdrive_t *drv)
119: {
120: return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
121: }
122:
1.1.1.4 root 123: /* Seek to a new position:
124: * returns 0 if already on right track
125: * returns 1 if track changed
126: * returns 2 if track is invalid
127: * returns 3 if sector is invalid
128: * returns 4 if seek is disabled
129: */
1.1 root 130: static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
131: int enable_seek)
132: {
133: uint32_t sector;
134: int ret;
135:
136: if (track > drv->max_track ||
1.1.1.3 root 137: (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
1.1 root 138: FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
139: head, track, sect, 1,
140: (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
141: drv->max_track, drv->last_sect);
142: return 2;
143: }
144: if (sect > drv->last_sect) {
145: FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
146: head, track, sect, 1,
147: (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
148: drv->max_track, drv->last_sect);
149: return 3;
150: }
151: sector = _fd_sector(head, track, sect, drv->last_sect);
152: ret = 0;
153: if (sector != fd_sector(drv)) {
154: #if 0
155: if (!enable_seek) {
156: FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
157: head, track, sect, 1, drv->max_track, drv->last_sect);
158: return 4;
159: }
160: #endif
161: drv->head = head;
1.1.1.3 root 162: if (drv->track != track)
163: ret = 1;
1.1 root 164: drv->track = track;
165: drv->sect = sect;
166: }
167:
168: return ret;
169: }
170:
171: /* Set drive back to track 0 */
172: static void fd_recalibrate (fdrive_t *drv)
173: {
174: FLOPPY_DPRINTF("recalibrate\n");
175: drv->head = 0;
176: drv->track = 0;
177: drv->sect = 1;
178: }
179:
180: /* Recognize floppy formats */
181: typedef struct fd_format_t {
182: fdrive_type_t drive;
183: fdisk_type_t disk;
184: uint8_t last_sect;
185: uint8_t max_track;
186: uint8_t max_head;
1.1.1.3 root 187: const char *str;
1.1 root 188: } fd_format_t;
189:
1.1.1.3 root 190: static const fd_format_t fd_formats[] = {
1.1 root 191: /* First entry is default format */
192: /* 1.44 MB 3"1/2 floppy disks */
193: { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
194: { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1, "1.6 MB 3\"1/2", },
195: { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
196: { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
197: { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
198: { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
199: { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
200: { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
201: /* 2.88 MB 3"1/2 floppy disks */
202: { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
203: { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
204: { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1, "3.2 MB 3\"1/2", },
205: { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
206: { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
207: /* 720 kB 3"1/2 floppy disks */
208: { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 1, "720 kB 3\"1/2", },
209: { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1, "800 kB 3\"1/2", },
210: { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1, "820 kB 3\"1/2", },
211: { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1, "830 kB 3\"1/2", },
212: { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
213: { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
214: /* 1.2 MB 5"1/4 floppy disks */
215: { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1, "1.2 kB 5\"1/4", },
216: { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
217: { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
218: { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
219: { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1, "1.6 MB 5\"1/4", },
220: /* 720 kB 5"1/4 floppy disks */
221: { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 80, 1, "720 kB 5\"1/4", },
222: { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1, "880 kB 5\"1/4", },
223: /* 360 kB 5"1/4 floppy disks */
224: { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 1, "360 kB 5\"1/4", },
225: { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 0, "180 kB 5\"1/4", },
226: { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1, "410 kB 5\"1/4", },
227: { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1, "420 kB 5\"1/4", },
1.1.1.3 root 228: /* 320 kB 5"1/4 floppy disks */
1.1 root 229: { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 1, "320 kB 5\"1/4", },
230: { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 0, "160 kB 5\"1/4", },
231: /* 360 kB must match 5"1/4 better than 3"1/2... */
232: { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 0, "360 kB 3\"1/2", },
233: /* end */
234: { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
235: };
236:
237: /* Revalidate a disk drive after a disk change */
238: static void fd_revalidate (fdrive_t *drv)
239: {
1.1.1.3 root 240: const fd_format_t *parse;
241: uint64_t nb_sectors, size;
1.1 root 242: int i, first_match, match;
243: int nb_heads, max_track, last_sect, ro;
244:
245: FLOPPY_DPRINTF("revalidate\n");
246: if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
1.1.1.3 root 247: ro = bdrv_is_read_only(drv->bs);
248: bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
249: if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
250: FLOPPY_DPRINTF("User defined disk (%d %d %d)",
1.1 root 251: nb_heads - 1, max_track, last_sect);
1.1.1.3 root 252: } else {
253: bdrv_get_geometry(drv->bs, &nb_sectors);
254: match = -1;
255: first_match = -1;
256: for (i = 0;; i++) {
257: parse = &fd_formats[i];
258: if (parse->drive == FDRIVE_DRV_NONE)
259: break;
260: if (drv->drive == parse->drive ||
261: drv->drive == FDRIVE_DRV_NONE) {
262: size = (parse->max_head + 1) * parse->max_track *
263: parse->last_sect;
264: if (nb_sectors == size) {
265: match = i;
266: break;
267: }
268: if (first_match == -1)
269: first_match = i;
270: }
271: }
272: if (match == -1) {
273: if (first_match == -1)
274: match = 1;
275: else
276: match = first_match;
277: parse = &fd_formats[match];
278: }
279: nb_heads = parse->max_head + 1;
280: max_track = parse->max_track;
281: last_sect = parse->last_sect;
282: drv->drive = parse->drive;
283: FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
1.1 root 284: nb_heads, max_track, last_sect, ro ? "ro" : "rw");
1.1.1.3 root 285: }
286: if (nb_heads == 1) {
287: drv->flags &= ~FDISK_DBL_SIDES;
288: } else {
289: drv->flags |= FDISK_DBL_SIDES;
290: }
291: drv->max_track = max_track;
292: drv->last_sect = last_sect;
293: drv->ro = ro;
1.1 root 294: } else {
1.1.1.3 root 295: FLOPPY_DPRINTF("No disk in drive\n");
1.1 root 296: drv->last_sect = 0;
1.1.1.3 root 297: drv->max_track = 0;
298: drv->flags &= ~FDISK_DBL_SIDES;
1.1 root 299: }
300: }
301:
302: /********************************************************/
303: /* Intel 82078 floppy disk controller emulation */
304:
305: static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
306: static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
307: static int fdctrl_transfer_handler (void *opaque, int nchan,
308: int dma_pos, int dma_len);
1.1.1.4 root 309: static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status0);
1.1 root 310:
1.1.1.4 root 311: static uint32_t fdctrl_read_statusA (fdctrl_t *fdctrl);
1.1 root 312: static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
313: static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
314: static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value);
315: static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
316: static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value);
317: static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
318: static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value);
319: static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
320: static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value);
321: static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
322:
323: enum {
324: FD_DIR_WRITE = 0,
325: FD_DIR_READ = 1,
326: FD_DIR_SCANE = 2,
327: FD_DIR_SCANL = 3,
328: FD_DIR_SCANH = 4,
329: };
330:
331: enum {
1.1.1.4 root 332: FD_STATE_MULTI = 0x01, /* multi track flag */
333: FD_STATE_FORMAT = 0x02, /* format flag */
334: FD_STATE_SEEK = 0x04, /* seek flag */
335: };
336:
337: enum {
338: FD_REG_SRA = 0x00,
339: FD_REG_SRB = 0x01,
340: FD_REG_DOR = 0x02,
341: FD_REG_TDR = 0x03,
342: FD_REG_MSR = 0x04,
343: FD_REG_DSR = 0x04,
344: FD_REG_FIFO = 0x05,
345: FD_REG_DIR = 0x07,
346: };
347:
348: enum {
349: FD_CMD_READ_TRACK = 0x02,
350: FD_CMD_SPECIFY = 0x03,
351: FD_CMD_SENSE_DRIVE_STATUS = 0x04,
352: FD_CMD_WRITE = 0x05,
353: FD_CMD_READ = 0x06,
354: FD_CMD_RECALIBRATE = 0x07,
355: FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
356: FD_CMD_WRITE_DELETED = 0x09,
357: FD_CMD_READ_ID = 0x0a,
358: FD_CMD_READ_DELETED = 0x0c,
359: FD_CMD_FORMAT_TRACK = 0x0d,
360: FD_CMD_DUMPREG = 0x0e,
361: FD_CMD_SEEK = 0x0f,
362: FD_CMD_VERSION = 0x10,
363: FD_CMD_SCAN_EQUAL = 0x11,
364: FD_CMD_PERPENDICULAR_MODE = 0x12,
365: FD_CMD_CONFIGURE = 0x13,
366: FD_CMD_LOCK = 0x14,
367: FD_CMD_VERIFY = 0x16,
368: FD_CMD_POWERDOWN_MODE = 0x17,
369: FD_CMD_PART_ID = 0x18,
370: FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
371: FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
372: FD_CMD_SAVE = 0x2c,
373: FD_CMD_OPTION = 0x33,
374: FD_CMD_RESTORE = 0x4c,
375: FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
376: FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
377: FD_CMD_FORMAT_AND_WRITE = 0xcd,
378: FD_CMD_RELATIVE_SEEK_IN = 0xcf,
379: };
380:
381: enum {
382: FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
383: FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
384: FD_CONFIG_POLL = 0x10, /* Poll enabled */
385: FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
386: FD_CONFIG_EIS = 0x40, /* No implied seeks */
387: };
388:
389: enum {
390: FD_SR0_EQPMT = 0x10,
391: FD_SR0_SEEK = 0x20,
392: FD_SR0_ABNTERM = 0x40,
393: FD_SR0_INVCMD = 0x80,
394: FD_SR0_RDYCHG = 0xc0,
395: };
396:
397: enum {
398: FD_SR1_EC = 0x80, /* End of cylinder */
399: };
400:
401: enum {
402: FD_SR2_SNS = 0x04, /* Scan not satisfied */
403: FD_SR2_SEH = 0x08, /* Scan equal hit */
404: };
405:
406: enum {
407: FD_SRA_DIR = 0x01,
408: FD_SRA_nWP = 0x02,
409: FD_SRA_nINDX = 0x04,
410: FD_SRA_HDSEL = 0x08,
411: FD_SRA_nTRK0 = 0x10,
412: FD_SRA_STEP = 0x20,
413: FD_SRA_nDRV2 = 0x40,
414: FD_SRA_INTPEND = 0x80,
415: };
416:
417: enum {
418: FD_SRB_MTR0 = 0x01,
419: FD_SRB_MTR1 = 0x02,
420: FD_SRB_WGATE = 0x04,
421: FD_SRB_RDATA = 0x08,
422: FD_SRB_WDATA = 0x10,
423: FD_SRB_DR0 = 0x20,
424: };
425:
426: enum {
427: #if MAX_FD == 4
428: FD_DOR_SELMASK = 0x03,
429: #else
430: FD_DOR_SELMASK = 0x01,
431: #endif
432: FD_DOR_nRESET = 0x04,
433: FD_DOR_DMAEN = 0x08,
434: FD_DOR_MOTEN0 = 0x10,
435: FD_DOR_MOTEN1 = 0x20,
436: FD_DOR_MOTEN2 = 0x40,
437: FD_DOR_MOTEN3 = 0x80,
438: };
439:
440: enum {
441: #if MAX_FD == 4
442: FD_TDR_BOOTSEL = 0x0c,
443: #else
444: FD_TDR_BOOTSEL = 0x04,
445: #endif
446: };
447:
448: enum {
449: FD_DSR_DRATEMASK= 0x03,
450: FD_DSR_PWRDOWN = 0x40,
451: FD_DSR_SWRESET = 0x80,
452: };
453:
454: enum {
455: FD_MSR_DRV0BUSY = 0x01,
456: FD_MSR_DRV1BUSY = 0x02,
457: FD_MSR_DRV2BUSY = 0x04,
458: FD_MSR_DRV3BUSY = 0x08,
459: FD_MSR_CMDBUSY = 0x10,
460: FD_MSR_NONDMA = 0x20,
461: FD_MSR_DIO = 0x40,
462: FD_MSR_RQM = 0x80,
463: };
464:
465: enum {
466: FD_DIR_DSKCHG = 0x80,
1.1 root 467: };
468:
469: #define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
470: #define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
471: #define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
472:
473: struct fdctrl_t {
1.1.1.5 ! root 474: SysBusDevice busdev;
1.1 root 475: /* Controller's identification */
476: uint8_t version;
477: /* HW */
1.1.1.3 root 478: qemu_irq irq;
1.1 root 479: int dma_chann;
1.1.1.3 root 480: target_phys_addr_t io_base;
1.1 root 481: /* Controller state */
482: QEMUTimer *result_timer;
1.1.1.4 root 483: uint8_t sra;
484: uint8_t srb;
485: uint8_t dor;
486: uint8_t tdr;
487: uint8_t dsr;
488: uint8_t msr;
1.1 root 489: uint8_t cur_drv;
1.1.1.4 root 490: uint8_t status0;
491: uint8_t status1;
492: uint8_t status2;
1.1 root 493: /* Command FIFO */
1.1.1.3 root 494: uint8_t *fifo;
1.1 root 495: uint32_t data_pos;
496: uint32_t data_len;
497: uint8_t data_state;
498: uint8_t data_dir;
499: uint8_t eot; /* last wanted sector */
500: /* States kept only to be returned back */
501: /* Timers state */
502: uint8_t timer0;
503: uint8_t timer1;
504: /* precompensation */
505: uint8_t precomp_trk;
506: uint8_t config;
507: uint8_t lock;
508: /* Power down config (also with status regB access mode */
509: uint8_t pwrd;
1.1.1.3 root 510: /* Sun4m quirks? */
511: int sun4m;
1.1 root 512: /* Floppy drives */
1.1.1.4 root 513: fdrive_t drives[MAX_FD];
514: int reset_sensei;
1.1.1.5 ! root 515: uint32_t strict_io;
! 516: uint32_t mem_mapped;
1.1 root 517: };
518:
519: static uint32_t fdctrl_read (void *opaque, uint32_t reg)
520: {
521: fdctrl_t *fdctrl = opaque;
522: uint32_t retval;
523:
1.1.1.4 root 524: switch (reg) {
525: case FD_REG_SRA:
526: retval = fdctrl_read_statusA(fdctrl);
1.1.1.3 root 527: break;
1.1.1.4 root 528: case FD_REG_SRB:
1.1.1.3 root 529: retval = fdctrl_read_statusB(fdctrl);
530: break;
1.1.1.4 root 531: case FD_REG_DOR:
1.1.1.3 root 532: retval = fdctrl_read_dor(fdctrl);
533: break;
1.1.1.4 root 534: case FD_REG_TDR:
1.1 root 535: retval = fdctrl_read_tape(fdctrl);
1.1.1.3 root 536: break;
1.1.1.4 root 537: case FD_REG_MSR:
1.1 root 538: retval = fdctrl_read_main_status(fdctrl);
1.1.1.3 root 539: break;
1.1.1.4 root 540: case FD_REG_FIFO:
1.1 root 541: retval = fdctrl_read_data(fdctrl);
1.1.1.3 root 542: break;
1.1.1.4 root 543: case FD_REG_DIR:
1.1 root 544: retval = fdctrl_read_dir(fdctrl);
1.1.1.3 root 545: break;
1.1 root 546: default:
1.1.1.3 root 547: retval = (uint32_t)(-1);
548: break;
1.1 root 549: }
550: FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
551:
552: return retval;
553: }
554:
555: static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
556: {
557: fdctrl_t *fdctrl = opaque;
558:
559: FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
560:
1.1.1.4 root 561: switch (reg) {
562: case FD_REG_DOR:
1.1.1.3 root 563: fdctrl_write_dor(fdctrl, value);
564: break;
1.1.1.4 root 565: case FD_REG_TDR:
1.1 root 566: fdctrl_write_tape(fdctrl, value);
1.1.1.3 root 567: break;
1.1.1.4 root 568: case FD_REG_DSR:
1.1 root 569: fdctrl_write_rate(fdctrl, value);
1.1.1.3 root 570: break;
1.1.1.4 root 571: case FD_REG_FIFO:
1.1 root 572: fdctrl_write_data(fdctrl, value);
1.1.1.3 root 573: break;
1.1 root 574: default:
1.1.1.3 root 575: break;
1.1 root 576: }
577: }
578:
1.1.1.4 root 579: static uint32_t fdctrl_read_port (void *opaque, uint32_t reg)
580: {
581: return fdctrl_read(opaque, reg & 7);
582: }
583:
584: static void fdctrl_write_port (void *opaque, uint32_t reg, uint32_t value)
585: {
586: fdctrl_write(opaque, reg & 7, value);
587: }
588:
1.1 root 589: static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
590: {
1.1.1.3 root 591: return fdctrl_read(opaque, (uint32_t)reg);
1.1 root 592: }
593:
1.1.1.3 root 594: static void fdctrl_write_mem (void *opaque,
1.1 root 595: target_phys_addr_t reg, uint32_t value)
596: {
1.1.1.3 root 597: fdctrl_write(opaque, (uint32_t)reg, value);
1.1 root 598: }
599:
600: static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
601: fdctrl_read_mem,
602: fdctrl_read_mem,
603: fdctrl_read_mem,
604: };
605:
606: static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
607: fdctrl_write_mem,
608: fdctrl_write_mem,
609: fdctrl_write_mem,
610: };
611:
1.1.1.3 root 612: static CPUReadMemoryFunc *fdctrl_mem_read_strict[3] = {
613: fdctrl_read_mem,
614: NULL,
615: NULL,
616: };
617:
618: static CPUWriteMemoryFunc *fdctrl_mem_write_strict[3] = {
619: fdctrl_write_mem,
620: NULL,
621: NULL,
622: };
623:
624: static void fd_save (QEMUFile *f, fdrive_t *fd)
625: {
626: qemu_put_8s(f, &fd->head);
627: qemu_put_8s(f, &fd->track);
628: qemu_put_8s(f, &fd->sect);
629: }
630:
631: static void fdc_save (QEMUFile *f, void *opaque)
632: {
633: fdctrl_t *s = opaque;
1.1.1.4 root 634: uint8_t tmp;
635: int i;
636: uint8_t dor = s->dor | GET_CUR_DRV(s);
1.1.1.3 root 637:
1.1.1.4 root 638: /* Controller state */
639: qemu_put_8s(f, &s->sra);
640: qemu_put_8s(f, &s->srb);
641: qemu_put_8s(f, &dor);
642: qemu_put_8s(f, &s->tdr);
643: qemu_put_8s(f, &s->dsr);
644: qemu_put_8s(f, &s->msr);
645: qemu_put_8s(f, &s->status0);
646: qemu_put_8s(f, &s->status1);
647: qemu_put_8s(f, &s->status2);
648: /* Command FIFO */
1.1.1.3 root 649: qemu_put_buffer(f, s->fifo, FD_SECTOR_LEN);
650: qemu_put_be32s(f, &s->data_pos);
651: qemu_put_be32s(f, &s->data_len);
652: qemu_put_8s(f, &s->data_state);
653: qemu_put_8s(f, &s->data_dir);
654: qemu_put_8s(f, &s->eot);
1.1.1.4 root 655: /* States kept only to be returned back */
1.1.1.3 root 656: qemu_put_8s(f, &s->timer0);
657: qemu_put_8s(f, &s->timer1);
658: qemu_put_8s(f, &s->precomp_trk);
659: qemu_put_8s(f, &s->config);
660: qemu_put_8s(f, &s->lock);
661: qemu_put_8s(f, &s->pwrd);
1.1.1.4 root 662:
663: tmp = MAX_FD;
664: qemu_put_8s(f, &tmp);
665: for (i = 0; i < MAX_FD; i++)
666: fd_save(f, &s->drives[i]);
1.1.1.3 root 667: }
668:
669: static int fd_load (QEMUFile *f, fdrive_t *fd)
670: {
671: qemu_get_8s(f, &fd->head);
672: qemu_get_8s(f, &fd->track);
673: qemu_get_8s(f, &fd->sect);
674:
675: return 0;
676: }
677:
678: static int fdc_load (QEMUFile *f, void *opaque, int version_id)
679: {
680: fdctrl_t *s = opaque;
1.1.1.4 root 681: int i, ret = 0;
682: uint8_t n;
1.1.1.3 root 683:
1.1.1.4 root 684: if (version_id != 2)
1.1.1.3 root 685: return -EINVAL;
686:
1.1.1.4 root 687: /* Controller state */
688: qemu_get_8s(f, &s->sra);
689: qemu_get_8s(f, &s->srb);
690: qemu_get_8s(f, &s->dor);
691: SET_CUR_DRV(s, s->dor & FD_DOR_SELMASK);
692: s->dor &= ~FD_DOR_SELMASK;
693: qemu_get_8s(f, &s->tdr);
694: qemu_get_8s(f, &s->dsr);
695: qemu_get_8s(f, &s->msr);
696: qemu_get_8s(f, &s->status0);
697: qemu_get_8s(f, &s->status1);
698: qemu_get_8s(f, &s->status2);
699: /* Command FIFO */
1.1.1.3 root 700: qemu_get_buffer(f, s->fifo, FD_SECTOR_LEN);
701: qemu_get_be32s(f, &s->data_pos);
702: qemu_get_be32s(f, &s->data_len);
703: qemu_get_8s(f, &s->data_state);
704: qemu_get_8s(f, &s->data_dir);
705: qemu_get_8s(f, &s->eot);
1.1.1.4 root 706: /* States kept only to be returned back */
1.1.1.3 root 707: qemu_get_8s(f, &s->timer0);
708: qemu_get_8s(f, &s->timer1);
709: qemu_get_8s(f, &s->precomp_trk);
710: qemu_get_8s(f, &s->config);
711: qemu_get_8s(f, &s->lock);
712: qemu_get_8s(f, &s->pwrd);
1.1.1.4 root 713: qemu_get_8s(f, &n);
1.1.1.3 root 714:
1.1.1.4 root 715: if (n > MAX_FD)
716: return -EINVAL;
717:
718: for (i = 0; i < n; i++) {
719: ret = fd_load(f, &s->drives[i]);
720: if (ret != 0)
721: break;
722: }
1.1.1.3 root 723:
724: return ret;
725: }
726:
727: static void fdctrl_external_reset(void *opaque)
728: {
729: fdctrl_t *s = opaque;
730:
731: fdctrl_reset(s, 0);
732: }
733:
1.1.1.4 root 734: static void fdctrl_handle_tc(void *opaque, int irq, int level)
1.1.1.3 root 735: {
1.1.1.4 root 736: //fdctrl_t *s = opaque;
1.1.1.3 root 737:
1.1.1.4 root 738: if (level) {
739: // XXX
740: FLOPPY_DPRINTF("TC pulsed\n");
1.1 root 741: }
1.1.1.3 root 742: }
743:
1.1 root 744: /* XXX: may change if moved to bdrv */
745: int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num)
746: {
747: return fdctrl->drives[drive_num].drive;
748: }
749:
750: /* Change IRQ state */
751: static void fdctrl_reset_irq (fdctrl_t *fdctrl)
752: {
1.1.1.4 root 753: if (!(fdctrl->sra & FD_SRA_INTPEND))
754: return;
1.1 root 755: FLOPPY_DPRINTF("Reset interrupt\n");
1.1.1.3 root 756: qemu_set_irq(fdctrl->irq, 0);
1.1.1.4 root 757: fdctrl->sra &= ~FD_SRA_INTPEND;
1.1 root 758: }
759:
1.1.1.4 root 760: static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status0)
1.1 root 761: {
1.1.1.4 root 762: /* Sparc mutation */
763: if (fdctrl->sun4m && (fdctrl->msr & FD_MSR_CMDBUSY)) {
764: /* XXX: not sure */
765: fdctrl->msr &= ~FD_MSR_CMDBUSY;
766: fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
767: fdctrl->status0 = status0;
1.1.1.3 root 768: return;
1.1 root 769: }
1.1.1.4 root 770: if (!(fdctrl->sra & FD_SRA_INTPEND)) {
1.1.1.3 root 771: qemu_set_irq(fdctrl->irq, 1);
1.1.1.4 root 772: fdctrl->sra |= FD_SRA_INTPEND;
1.1 root 773: }
1.1.1.4 root 774: fdctrl->reset_sensei = 0;
775: fdctrl->status0 = status0;
776: FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
1.1 root 777: }
778:
779: /* Reset controller */
780: static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
781: {
782: int i;
783:
784: FLOPPY_DPRINTF("reset controller\n");
785: fdctrl_reset_irq(fdctrl);
786: /* Initialise controller */
1.1.1.4 root 787: fdctrl->sra = 0;
788: fdctrl->srb = 0xc0;
789: if (!fdctrl->drives[1].bs)
790: fdctrl->sra |= FD_SRA_nDRV2;
1.1 root 791: fdctrl->cur_drv = 0;
1.1.1.4 root 792: fdctrl->dor = FD_DOR_nRESET;
793: fdctrl->dor |= (fdctrl->dma_chann != -1) ? FD_DOR_DMAEN : 0;
794: fdctrl->msr = FD_MSR_RQM;
1.1 root 795: /* FIFO state */
796: fdctrl->data_pos = 0;
797: fdctrl->data_len = 0;
1.1.1.4 root 798: fdctrl->data_state = 0;
1.1 root 799: fdctrl->data_dir = FD_DIR_WRITE;
800: for (i = 0; i < MAX_FD; i++)
1.1.1.4 root 801: fd_recalibrate(&fdctrl->drives[i]);
1.1 root 802: fdctrl_reset_fifo(fdctrl);
1.1.1.4 root 803: if (do_irq) {
804: fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
805: fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
806: }
1.1 root 807: }
808:
809: static inline fdrive_t *drv0 (fdctrl_t *fdctrl)
810: {
1.1.1.4 root 811: return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
1.1 root 812: }
813:
814: static inline fdrive_t *drv1 (fdctrl_t *fdctrl)
815: {
1.1.1.4 root 816: if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
817: return &fdctrl->drives[1];
818: else
819: return &fdctrl->drives[0];
820: }
821:
822: #if MAX_FD == 4
823: static inline fdrive_t *drv2 (fdctrl_t *fdctrl)
824: {
825: if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
826: return &fdctrl->drives[2];
827: else
828: return &fdctrl->drives[1];
829: }
830:
831: static inline fdrive_t *drv3 (fdctrl_t *fdctrl)
832: {
833: if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
834: return &fdctrl->drives[3];
835: else
836: return &fdctrl->drives[2];
1.1 root 837: }
1.1.1.4 root 838: #endif
1.1 root 839:
840: static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
841: {
1.1.1.4 root 842: switch (fdctrl->cur_drv) {
843: case 0: return drv0(fdctrl);
844: case 1: return drv1(fdctrl);
845: #if MAX_FD == 4
846: case 2: return drv2(fdctrl);
847: case 3: return drv3(fdctrl);
848: #endif
849: default: return NULL;
850: }
851: }
852:
853: /* Status A register : 0x00 (read-only) */
854: static uint32_t fdctrl_read_statusA (fdctrl_t *fdctrl)
855: {
856: uint32_t retval = fdctrl->sra;
857:
858: FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
859:
860: return retval;
1.1 root 861: }
862:
863: /* Status B register : 0x01 (read-only) */
864: static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
865: {
1.1.1.4 root 866: uint32_t retval = fdctrl->srb;
867:
868: FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
869:
870: return retval;
1.1 root 871: }
872:
873: /* Digital output register : 0x02 */
874: static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
875: {
1.1.1.4 root 876: uint32_t retval = fdctrl->dor;
1.1 root 877:
878: /* Selected drive */
879: retval |= fdctrl->cur_drv;
880: FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
881:
882: return retval;
883: }
884:
885: static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
886: {
887: FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
1.1.1.4 root 888:
889: /* Motors */
890: if (value & FD_DOR_MOTEN0)
891: fdctrl->srb |= FD_SRB_MTR0;
1.1 root 892: else
1.1.1.4 root 893: fdctrl->srb &= ~FD_SRB_MTR0;
894: if (value & FD_DOR_MOTEN1)
895: fdctrl->srb |= FD_SRB_MTR1;
1.1 root 896: else
1.1.1.4 root 897: fdctrl->srb &= ~FD_SRB_MTR1;
898:
899: /* Drive */
900: if (value & 1)
901: fdctrl->srb |= FD_SRB_DR0;
902: else
903: fdctrl->srb &= ~FD_SRB_DR0;
904:
1.1 root 905: /* Reset */
1.1.1.4 root 906: if (!(value & FD_DOR_nRESET)) {
907: if (fdctrl->dor & FD_DOR_nRESET) {
1.1 root 908: FLOPPY_DPRINTF("controller enter RESET state\n");
909: }
910: } else {
1.1.1.4 root 911: if (!(fdctrl->dor & FD_DOR_nRESET)) {
1.1 root 912: FLOPPY_DPRINTF("controller out of RESET state\n");
913: fdctrl_reset(fdctrl, 1);
1.1.1.4 root 914: fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1.1 root 915: }
916: }
917: /* Selected drive */
1.1.1.4 root 918: fdctrl->cur_drv = value & FD_DOR_SELMASK;
919:
920: fdctrl->dor = value;
1.1 root 921: }
922:
923: /* Tape drive register : 0x03 */
924: static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
925: {
1.1.1.4 root 926: uint32_t retval = fdctrl->tdr;
1.1 root 927:
928: FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
929:
930: return retval;
931: }
932:
933: static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
934: {
935: /* Reset mode */
1.1.1.4 root 936: if (!(fdctrl->dor & FD_DOR_nRESET)) {
1.1 root 937: FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
938: return;
939: }
940: FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
941: /* Disk boot selection indicator */
1.1.1.4 root 942: fdctrl->tdr = value & FD_TDR_BOOTSEL;
1.1 root 943: /* Tape indicators: never allow */
944: }
945:
946: /* Main status register : 0x04 (read) */
947: static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
948: {
1.1.1.4 root 949: uint32_t retval = fdctrl->msr;
950:
951: fdctrl->dsr &= ~FD_DSR_PWRDOWN;
952: fdctrl->dor |= FD_DOR_nRESET;
1.1 root 953:
954: FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
955:
956: return retval;
957: }
958:
959: /* Data select rate register : 0x04 (write) */
960: static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
961: {
962: /* Reset mode */
1.1.1.4 root 963: if (!(fdctrl->dor & FD_DOR_nRESET)) {
1.1.1.3 root 964: FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
965: return;
966: }
1.1 root 967: FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
968: /* Reset: autoclear */
1.1.1.4 root 969: if (value & FD_DSR_SWRESET) {
970: fdctrl->dor &= ~FD_DOR_nRESET;
1.1 root 971: fdctrl_reset(fdctrl, 1);
1.1.1.4 root 972: fdctrl->dor |= FD_DOR_nRESET;
1.1 root 973: }
1.1.1.4 root 974: if (value & FD_DSR_PWRDOWN) {
1.1 root 975: fdctrl_reset(fdctrl, 1);
976: }
1.1.1.4 root 977: fdctrl->dsr = value;
1.1 root 978: }
979:
1.1.1.2 root 980: static int fdctrl_media_changed(fdrive_t *drv)
981: {
982: int ret;
1.1.1.3 root 983:
984: if (!drv->bs)
1.1.1.2 root 985: return 0;
986: ret = bdrv_media_changed(drv->bs);
987: if (ret) {
988: fd_revalidate(drv);
989: }
990: return ret;
991: }
992:
1.1 root 993: /* Digital input register : 0x07 (read-only) */
994: static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
995: {
996: uint32_t retval = 0;
997:
1.1.1.4 root 998: if (fdctrl_media_changed(drv0(fdctrl))
999: || fdctrl_media_changed(drv1(fdctrl))
1000: #if MAX_FD == 4
1001: || fdctrl_media_changed(drv2(fdctrl))
1002: || fdctrl_media_changed(drv3(fdctrl))
1003: #endif
1004: )
1005: retval |= FD_DIR_DSKCHG;
1.1 root 1006: if (retval != 0)
1007: FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1008:
1009: return retval;
1010: }
1011:
1012: /* FIFO state control */
1013: static void fdctrl_reset_fifo (fdctrl_t *fdctrl)
1014: {
1015: fdctrl->data_dir = FD_DIR_WRITE;
1016: fdctrl->data_pos = 0;
1.1.1.4 root 1017: fdctrl->msr &= ~(FD_MSR_CMDBUSY | FD_MSR_DIO);
1.1 root 1018: }
1019:
1020: /* Set FIFO status for the host to read */
1021: static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq)
1022: {
1023: fdctrl->data_dir = FD_DIR_READ;
1024: fdctrl->data_len = fifo_len;
1025: fdctrl->data_pos = 0;
1.1.1.4 root 1026: fdctrl->msr |= FD_MSR_CMDBUSY | FD_MSR_RQM | FD_MSR_DIO;
1.1 root 1027: if (do_irq)
1028: fdctrl_raise_irq(fdctrl, 0x00);
1029: }
1030:
1031: /* Set an error: unimplemented/unknown command */
1.1.1.4 root 1032: static void fdctrl_unimplemented (fdctrl_t *fdctrl, int direction)
1.1 root 1033: {
1.1.1.4 root 1034: FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1035: fdctrl->fifo[0] = FD_SR0_INVCMD;
1.1 root 1036: fdctrl_set_fifo(fdctrl, 1, 0);
1.1.1.4 root 1037: }
1038:
1039: /* Seek to next sector */
1040: static int fdctrl_seek_to_next_sect (fdctrl_t *fdctrl, fdrive_t *cur_drv)
1041: {
1042: FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1043: cur_drv->head, cur_drv->track, cur_drv->sect,
1044: fd_sector(cur_drv));
1045: /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1046: error in fact */
1047: if (cur_drv->sect >= cur_drv->last_sect ||
1048: cur_drv->sect == fdctrl->eot) {
1049: cur_drv->sect = 1;
1050: if (FD_MULTI_TRACK(fdctrl->data_state)) {
1051: if (cur_drv->head == 0 &&
1052: (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1053: cur_drv->head = 1;
1054: } else {
1055: cur_drv->head = 0;
1056: cur_drv->track++;
1057: if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1058: return 0;
1059: }
1060: } else {
1061: cur_drv->track++;
1062: return 0;
1063: }
1064: FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1065: cur_drv->head, cur_drv->track,
1066: cur_drv->sect, fd_sector(cur_drv));
1067: } else {
1068: cur_drv->sect++;
1069: }
1070: return 1;
1.1 root 1071: }
1072:
1073: /* Callback for transfer end (stop or abort) */
1074: static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0,
1.1.1.3 root 1075: uint8_t status1, uint8_t status2)
1.1 root 1076: {
1077: fdrive_t *cur_drv;
1078:
1079: cur_drv = get_cur_drv(fdctrl);
1080: FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1081: status0, status1, status2,
1.1.1.4 root 1082: status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl));
1083: fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1.1 root 1084: fdctrl->fifo[1] = status1;
1085: fdctrl->fifo[2] = status2;
1086: fdctrl->fifo[3] = cur_drv->track;
1087: fdctrl->fifo[4] = cur_drv->head;
1088: fdctrl->fifo[5] = cur_drv->sect;
1089: fdctrl->fifo[6] = FD_SECTOR_SC;
1090: fdctrl->data_dir = FD_DIR_READ;
1.1.1.4 root 1091: if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1.1 root 1092: DMA_release_DREQ(fdctrl->dma_chann);
1093: }
1.1.1.4 root 1094: fdctrl->msr |= FD_MSR_RQM | FD_MSR_DIO;
1095: fdctrl->msr &= ~FD_MSR_NONDMA;
1.1 root 1096: fdctrl_set_fifo(fdctrl, 7, 1);
1097: }
1098:
1099: /* Prepare a data transfer (either DMA or FIFO) */
1100: static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
1101: {
1102: fdrive_t *cur_drv;
1103: uint8_t kh, kt, ks;
1.1.1.4 root 1104: int did_seek = 0;
1.1 root 1105:
1.1.1.4 root 1106: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1.1 root 1107: cur_drv = get_cur_drv(fdctrl);
1108: kt = fdctrl->fifo[2];
1109: kh = fdctrl->fifo[3];
1110: ks = fdctrl->fifo[4];
1111: FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1.1.1.4 root 1112: GET_CUR_DRV(fdctrl), kh, kt, ks,
1.1 root 1113: _fd_sector(kh, kt, ks, cur_drv->last_sect));
1.1.1.4 root 1114: switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1.1 root 1115: case 2:
1116: /* sect too big */
1.1.1.4 root 1117: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1.1 root 1118: fdctrl->fifo[3] = kt;
1119: fdctrl->fifo[4] = kh;
1120: fdctrl->fifo[5] = ks;
1121: return;
1122: case 3:
1123: /* track too big */
1.1.1.4 root 1124: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1.1 root 1125: fdctrl->fifo[3] = kt;
1126: fdctrl->fifo[4] = kh;
1127: fdctrl->fifo[5] = ks;
1128: return;
1129: case 4:
1130: /* No seek enabled */
1.1.1.4 root 1131: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1.1 root 1132: fdctrl->fifo[3] = kt;
1133: fdctrl->fifo[4] = kh;
1134: fdctrl->fifo[5] = ks;
1135: return;
1136: case 1:
1137: did_seek = 1;
1138: break;
1139: default:
1140: break;
1141: }
1.1.1.4 root 1142:
1.1 root 1143: /* Set the FIFO state */
1144: fdctrl->data_dir = direction;
1145: fdctrl->data_pos = 0;
1.1.1.4 root 1146: fdctrl->msr |= FD_MSR_CMDBUSY;
1.1 root 1147: if (fdctrl->fifo[0] & 0x80)
1148: fdctrl->data_state |= FD_STATE_MULTI;
1149: else
1150: fdctrl->data_state &= ~FD_STATE_MULTI;
1151: if (did_seek)
1152: fdctrl->data_state |= FD_STATE_SEEK;
1153: else
1154: fdctrl->data_state &= ~FD_STATE_SEEK;
1155: if (fdctrl->fifo[5] == 00) {
1156: fdctrl->data_len = fdctrl->fifo[8];
1157: } else {
1.1.1.3 root 1158: int tmp;
1.1.1.2 root 1159: fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1.1.1.4 root 1160: tmp = (fdctrl->fifo[6] - ks + 1);
1.1 root 1161: if (fdctrl->fifo[0] & 0x80)
1.1.1.4 root 1162: tmp += fdctrl->fifo[6];
1.1.1.3 root 1163: fdctrl->data_len *= tmp;
1.1 root 1164: }
1165: fdctrl->eot = fdctrl->fifo[6];
1.1.1.4 root 1166: if (fdctrl->dor & FD_DOR_DMAEN) {
1.1 root 1167: int dma_mode;
1168: /* DMA transfer are enabled. Check if DMA channel is well programmed */
1169: dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
1170: dma_mode = (dma_mode >> 2) & 3;
1171: FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1.1.1.3 root 1172: dma_mode, direction,
1.1 root 1173: (128 << fdctrl->fifo[5]) *
1.1.1.3 root 1174: (cur_drv->last_sect - ks + 1), fdctrl->data_len);
1.1 root 1175: if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1176: direction == FD_DIR_SCANH) && dma_mode == 0) ||
1177: (direction == FD_DIR_WRITE && dma_mode == 2) ||
1178: (direction == FD_DIR_READ && dma_mode == 1)) {
1179: /* No access is allowed until DMA transfer has completed */
1.1.1.4 root 1180: fdctrl->msr &= ~FD_MSR_RQM;
1.1 root 1181: /* Now, we just have to wait for the DMA controller to
1182: * recall us...
1183: */
1184: DMA_hold_DREQ(fdctrl->dma_chann);
1185: DMA_schedule(fdctrl->dma_chann);
1186: return;
1187: } else {
1.1.1.3 root 1188: FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1.1 root 1189: }
1190: }
1191: FLOPPY_DPRINTF("start non-DMA transfer\n");
1.1.1.4 root 1192: fdctrl->msr |= FD_MSR_NONDMA;
1193: if (direction != FD_DIR_WRITE)
1194: fdctrl->msr |= FD_MSR_DIO;
1.1 root 1195: /* IO based transfer: calculate len */
1196: fdctrl_raise_irq(fdctrl, 0x00);
1197:
1198: return;
1199: }
1200:
1201: /* Prepare a transfer of deleted data */
1202: static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
1203: {
1.1.1.4 root 1204: FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1205:
1.1 root 1206: /* We don't handle deleted data,
1207: * so we don't return *ANYTHING*
1208: */
1.1.1.4 root 1209: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1.1 root 1210: }
1211:
1212: /* handlers for DMA transfers */
1213: static int fdctrl_transfer_handler (void *opaque, int nchan,
1214: int dma_pos, int dma_len)
1215: {
1216: fdctrl_t *fdctrl;
1217: fdrive_t *cur_drv;
1218: int len, start_pos, rel_pos;
1219: uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1220:
1221: fdctrl = opaque;
1.1.1.4 root 1222: if (fdctrl->msr & FD_MSR_RQM) {
1.1 root 1223: FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1224: return 0;
1225: }
1226: cur_drv = get_cur_drv(fdctrl);
1227: if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1228: fdctrl->data_dir == FD_DIR_SCANH)
1.1.1.4 root 1229: status2 = FD_SR2_SNS;
1.1 root 1230: if (dma_len > fdctrl->data_len)
1231: dma_len = fdctrl->data_len;
1232: if (cur_drv->bs == NULL) {
1.1.1.3 root 1233: if (fdctrl->data_dir == FD_DIR_WRITE)
1.1.1.4 root 1234: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1.1.1.3 root 1235: else
1.1.1.4 root 1236: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1.1.1.3 root 1237: len = 0;
1.1 root 1238: goto transfer_error;
1239: }
1240: rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1241: for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1242: len = dma_len - fdctrl->data_pos;
1243: if (len + rel_pos > FD_SECTOR_LEN)
1244: len = FD_SECTOR_LEN - rel_pos;
1245: FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1246: "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
1.1.1.4 root 1247: fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1.1 root 1248: cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
1.1.1.4 root 1249: fd_sector(cur_drv) * FD_SECTOR_LEN);
1.1 root 1250: if (fdctrl->data_dir != FD_DIR_WRITE ||
1.1.1.3 root 1251: len < FD_SECTOR_LEN || rel_pos != 0) {
1.1 root 1252: /* READ & SCAN commands and realign to a sector for WRITE */
1253: if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1.1.1.3 root 1254: fdctrl->fifo, 1) < 0) {
1.1 root 1255: FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1256: fd_sector(cur_drv));
1257: /* Sure, image size is too small... */
1258: memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1259: }
1260: }
1.1.1.3 root 1261: switch (fdctrl->data_dir) {
1262: case FD_DIR_READ:
1263: /* READ commands */
1.1 root 1264: DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1265: fdctrl->data_pos, len);
1.1.1.3 root 1266: break;
1267: case FD_DIR_WRITE:
1.1 root 1268: /* WRITE commands */
1269: DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1270: fdctrl->data_pos, len);
1271: if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1.1.1.3 root 1272: fdctrl->fifo, 1) < 0) {
1.1.1.4 root 1273: FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1274: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1.1 root 1275: goto transfer_error;
1276: }
1.1.1.3 root 1277: break;
1278: default:
1279: /* SCAN commands */
1.1 root 1280: {
1.1.1.3 root 1281: uint8_t tmpbuf[FD_SECTOR_LEN];
1.1 root 1282: int ret;
1283: DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1284: ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1285: if (ret == 0) {
1.1.1.4 root 1286: status2 = FD_SR2_SEH;
1.1 root 1287: goto end_transfer;
1288: }
1289: if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1290: (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1291: status2 = 0x00;
1292: goto end_transfer;
1293: }
1294: }
1.1.1.3 root 1295: break;
1.1 root 1296: }
1.1.1.3 root 1297: fdctrl->data_pos += len;
1298: rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1.1 root 1299: if (rel_pos == 0) {
1300: /* Seek to next sector */
1.1.1.4 root 1301: if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1302: break;
1.1 root 1303: }
1304: }
1.1.1.3 root 1305: end_transfer:
1.1 root 1306: len = fdctrl->data_pos - start_pos;
1307: FLOPPY_DPRINTF("end transfer %d %d %d\n",
1.1.1.3 root 1308: fdctrl->data_pos, len, fdctrl->data_len);
1.1 root 1309: if (fdctrl->data_dir == FD_DIR_SCANE ||
1310: fdctrl->data_dir == FD_DIR_SCANL ||
1311: fdctrl->data_dir == FD_DIR_SCANH)
1.1.1.4 root 1312: status2 = FD_SR2_SEH;
1.1 root 1313: if (FD_DID_SEEK(fdctrl->data_state))
1.1.1.4 root 1314: status0 |= FD_SR0_SEEK;
1.1 root 1315: fdctrl->data_len -= len;
1316: fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1.1.1.3 root 1317: transfer_error:
1.1 root 1318:
1319: return len;
1320: }
1321:
1322: /* Data register : 0x05 */
1323: static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
1324: {
1325: fdrive_t *cur_drv;
1326: uint32_t retval = 0;
1.1.1.4 root 1327: int pos;
1.1 root 1328:
1329: cur_drv = get_cur_drv(fdctrl);
1.1.1.4 root 1330: fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1331: if (!(fdctrl->msr & FD_MSR_RQM) || !(fdctrl->msr & FD_MSR_DIO)) {
1332: FLOPPY_ERROR("controller not ready for reading\n");
1.1 root 1333: return 0;
1334: }
1335: pos = fdctrl->data_pos;
1.1.1.4 root 1336: if (fdctrl->msr & FD_MSR_NONDMA) {
1.1 root 1337: pos %= FD_SECTOR_LEN;
1338: if (pos == 0) {
1.1.1.4 root 1339: if (fdctrl->data_pos != 0)
1340: if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1341: FLOPPY_DPRINTF("error seeking to next sector %d\n",
1342: fd_sector(cur_drv));
1343: return 0;
1344: }
1345: if (bdrv_read(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1346: FLOPPY_DPRINTF("error getting sector %d\n",
1347: fd_sector(cur_drv));
1348: /* Sure, image size is too small... */
1349: memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1350: }
1.1 root 1351: }
1352: }
1353: retval = fdctrl->fifo[pos];
1354: if (++fdctrl->data_pos == fdctrl->data_len) {
1355: fdctrl->data_pos = 0;
1356: /* Switch from transfer mode to status mode
1357: * then from status mode to command mode
1358: */
1.1.1.4 root 1359: if (fdctrl->msr & FD_MSR_NONDMA) {
1360: fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1.1 root 1361: } else {
1362: fdctrl_reset_fifo(fdctrl);
1363: fdctrl_reset_irq(fdctrl);
1364: }
1365: }
1366: FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1367:
1368: return retval;
1369: }
1370:
1371: static void fdctrl_format_sector (fdctrl_t *fdctrl)
1372: {
1373: fdrive_t *cur_drv;
1374: uint8_t kh, kt, ks;
1375:
1.1.1.4 root 1376: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1.1 root 1377: cur_drv = get_cur_drv(fdctrl);
1378: kt = fdctrl->fifo[6];
1379: kh = fdctrl->fifo[7];
1380: ks = fdctrl->fifo[8];
1381: FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1.1.1.4 root 1382: GET_CUR_DRV(fdctrl), kh, kt, ks,
1.1 root 1383: _fd_sector(kh, kt, ks, cur_drv->last_sect));
1.1.1.4 root 1384: switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1.1 root 1385: case 2:
1386: /* sect too big */
1.1.1.4 root 1387: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1.1 root 1388: fdctrl->fifo[3] = kt;
1389: fdctrl->fifo[4] = kh;
1390: fdctrl->fifo[5] = ks;
1391: return;
1392: case 3:
1393: /* track too big */
1.1.1.4 root 1394: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1.1 root 1395: fdctrl->fifo[3] = kt;
1396: fdctrl->fifo[4] = kh;
1397: fdctrl->fifo[5] = ks;
1398: return;
1399: case 4:
1400: /* No seek enabled */
1.1.1.4 root 1401: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1.1 root 1402: fdctrl->fifo[3] = kt;
1403: fdctrl->fifo[4] = kh;
1404: fdctrl->fifo[5] = ks;
1405: return;
1406: case 1:
1407: fdctrl->data_state |= FD_STATE_SEEK;
1408: break;
1409: default:
1410: break;
1411: }
1412: memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1413: if (cur_drv->bs == NULL ||
1414: bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1.1.1.3 root 1415: FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1.1.1.4 root 1416: fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK, 0x00, 0x00);
1.1 root 1417: } else {
1.1.1.3 root 1418: if (cur_drv->sect == cur_drv->last_sect) {
1419: fdctrl->data_state &= ~FD_STATE_FORMAT;
1420: /* Last sector done */
1421: if (FD_DID_SEEK(fdctrl->data_state))
1.1.1.4 root 1422: fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1.1.1.3 root 1423: else
1424: fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1425: } else {
1426: /* More to do */
1427: fdctrl->data_pos = 0;
1428: fdctrl->data_len = 4;
1429: }
1.1 root 1430: }
1431: }
1432:
1.1.1.4 root 1433: static void fdctrl_handle_lock (fdctrl_t *fdctrl, int direction)
1.1 root 1434: {
1.1.1.4 root 1435: fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1436: fdctrl->fifo[0] = fdctrl->lock << 4;
1437: fdctrl_set_fifo(fdctrl, 1, fdctrl->lock);
1438: }
1.1 root 1439:
1.1.1.4 root 1440: static void fdctrl_handle_dumpreg (fdctrl_t *fdctrl, int direction)
1441: {
1442: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1443:
1444: /* Drives position */
1445: fdctrl->fifo[0] = drv0(fdctrl)->track;
1446: fdctrl->fifo[1] = drv1(fdctrl)->track;
1447: #if MAX_FD == 4
1448: fdctrl->fifo[2] = drv2(fdctrl)->track;
1449: fdctrl->fifo[3] = drv3(fdctrl)->track;
1.1 root 1450: #else
1.1.1.4 root 1451: fdctrl->fifo[2] = 0;
1452: fdctrl->fifo[3] = 0;
1.1 root 1453: #endif
1.1.1.4 root 1454: /* timers */
1455: fdctrl->fifo[4] = fdctrl->timer0;
1456: fdctrl->fifo[5] = (fdctrl->timer1 << 1) | (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1457: fdctrl->fifo[6] = cur_drv->last_sect;
1458: fdctrl->fifo[7] = (fdctrl->lock << 7) |
1459: (cur_drv->perpendicular << 2);
1460: fdctrl->fifo[8] = fdctrl->config;
1461: fdctrl->fifo[9] = fdctrl->precomp_trk;
1462: fdctrl_set_fifo(fdctrl, 10, 0);
1463: }
1464:
1465: static void fdctrl_handle_version (fdctrl_t *fdctrl, int direction)
1466: {
1467: /* Controller's version */
1468: fdctrl->fifo[0] = fdctrl->version;
1469: fdctrl_set_fifo(fdctrl, 1, 1);
1470: }
1471:
1472: static void fdctrl_handle_partid (fdctrl_t *fdctrl, int direction)
1473: {
1474: fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1475: fdctrl_set_fifo(fdctrl, 1, 0);
1476: }
1477:
1478: static void fdctrl_handle_restore (fdctrl_t *fdctrl, int direction)
1479: {
1480: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1481:
1482: /* Drives position */
1483: drv0(fdctrl)->track = fdctrl->fifo[3];
1484: drv1(fdctrl)->track = fdctrl->fifo[4];
1485: #if MAX_FD == 4
1486: drv2(fdctrl)->track = fdctrl->fifo[5];
1487: drv3(fdctrl)->track = fdctrl->fifo[6];
1488: #endif
1489: /* timers */
1490: fdctrl->timer0 = fdctrl->fifo[7];
1491: fdctrl->timer1 = fdctrl->fifo[8];
1492: cur_drv->last_sect = fdctrl->fifo[9];
1493: fdctrl->lock = fdctrl->fifo[10] >> 7;
1494: cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1495: fdctrl->config = fdctrl->fifo[11];
1496: fdctrl->precomp_trk = fdctrl->fifo[12];
1497: fdctrl->pwrd = fdctrl->fifo[13];
1498: fdctrl_reset_fifo(fdctrl);
1499: }
1500:
1501: static void fdctrl_handle_save (fdctrl_t *fdctrl, int direction)
1502: {
1503: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1504:
1505: fdctrl->fifo[0] = 0;
1506: fdctrl->fifo[1] = 0;
1507: /* Drives position */
1508: fdctrl->fifo[2] = drv0(fdctrl)->track;
1509: fdctrl->fifo[3] = drv1(fdctrl)->track;
1510: #if MAX_FD == 4
1511: fdctrl->fifo[4] = drv2(fdctrl)->track;
1512: fdctrl->fifo[5] = drv3(fdctrl)->track;
1513: #else
1514: fdctrl->fifo[4] = 0;
1515: fdctrl->fifo[5] = 0;
1516: #endif
1517: /* timers */
1518: fdctrl->fifo[6] = fdctrl->timer0;
1519: fdctrl->fifo[7] = fdctrl->timer1;
1520: fdctrl->fifo[8] = cur_drv->last_sect;
1521: fdctrl->fifo[9] = (fdctrl->lock << 7) |
1522: (cur_drv->perpendicular << 2);
1523: fdctrl->fifo[10] = fdctrl->config;
1524: fdctrl->fifo[11] = fdctrl->precomp_trk;
1525: fdctrl->fifo[12] = fdctrl->pwrd;
1526: fdctrl->fifo[13] = 0;
1527: fdctrl->fifo[14] = 0;
1528: fdctrl_set_fifo(fdctrl, 15, 1);
1529: }
1530:
1531: static void fdctrl_handle_readid (fdctrl_t *fdctrl, int direction)
1532: {
1533: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1534:
1535: /* XXX: should set main status register to busy */
1536: cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1537: qemu_mod_timer(fdctrl->result_timer,
1538: qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
1539: }
1540:
1541: static void fdctrl_handle_format_track (fdctrl_t *fdctrl, int direction)
1542: {
1543: fdrive_t *cur_drv;
1544:
1545: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1546: cur_drv = get_cur_drv(fdctrl);
1547: fdctrl->data_state |= FD_STATE_FORMAT;
1548: if (fdctrl->fifo[0] & 0x80)
1549: fdctrl->data_state |= FD_STATE_MULTI;
1550: else
1551: fdctrl->data_state &= ~FD_STATE_MULTI;
1552: fdctrl->data_state &= ~FD_STATE_SEEK;
1553: cur_drv->bps =
1554: fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1555: #if 0
1556: cur_drv->last_sect =
1557: cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1558: fdctrl->fifo[3] / 2;
1559: #else
1560: cur_drv->last_sect = fdctrl->fifo[3];
1561: #endif
1562: /* TODO: implement format using DMA expected by the Bochs BIOS
1563: * and Linux fdformat (read 3 bytes per sector via DMA and fill
1564: * the sector with the specified fill byte
1565: */
1566: fdctrl->data_state &= ~FD_STATE_FORMAT;
1567: fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1568: }
1569:
1570: static void fdctrl_handle_specify (fdctrl_t *fdctrl, int direction)
1571: {
1572: fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1573: fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1574: if (fdctrl->fifo[2] & 1)
1575: fdctrl->dor &= ~FD_DOR_DMAEN;
1576: else
1577: fdctrl->dor |= FD_DOR_DMAEN;
1578: /* No result back */
1579: fdctrl_reset_fifo(fdctrl);
1580: }
1581:
1582: static void fdctrl_handle_sense_drive_status (fdctrl_t *fdctrl, int direction)
1583: {
1584: fdrive_t *cur_drv;
1585:
1586: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1587: cur_drv = get_cur_drv(fdctrl);
1588: cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1589: /* 1 Byte status back */
1590: fdctrl->fifo[0] = (cur_drv->ro << 6) |
1591: (cur_drv->track == 0 ? 0x10 : 0x00) |
1592: (cur_drv->head << 2) |
1593: GET_CUR_DRV(fdctrl) |
1594: 0x28;
1595: fdctrl_set_fifo(fdctrl, 1, 0);
1596: }
1597:
1598: static void fdctrl_handle_recalibrate (fdctrl_t *fdctrl, int direction)
1599: {
1600: fdrive_t *cur_drv;
1601:
1602: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1603: cur_drv = get_cur_drv(fdctrl);
1604: fd_recalibrate(cur_drv);
1605: fdctrl_reset_fifo(fdctrl);
1606: /* Raise Interrupt */
1607: fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1608: }
1609:
1610: static void fdctrl_handle_sense_interrupt_status (fdctrl_t *fdctrl, int direction)
1611: {
1612: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1613:
1614: if(fdctrl->reset_sensei > 0) {
1615: fdctrl->fifo[0] =
1616: FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
1617: fdctrl->reset_sensei--;
1618: } else {
1619: /* XXX: status0 handling is broken for read/write
1620: commands, so we do this hack. It should be suppressed
1621: ASAP */
1622: fdctrl->fifo[0] =
1623: FD_SR0_SEEK | (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1624: }
1625:
1626: fdctrl->fifo[1] = cur_drv->track;
1627: fdctrl_set_fifo(fdctrl, 2, 0);
1628: fdctrl_reset_irq(fdctrl);
1629: fdctrl->status0 = FD_SR0_RDYCHG;
1630: }
1631:
1632: static void fdctrl_handle_seek (fdctrl_t *fdctrl, int direction)
1633: {
1634: fdrive_t *cur_drv;
1635:
1636: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1637: cur_drv = get_cur_drv(fdctrl);
1638: fdctrl_reset_fifo(fdctrl);
1639: if (fdctrl->fifo[2] > cur_drv->max_track) {
1640: fdctrl_raise_irq(fdctrl, FD_SR0_ABNTERM | FD_SR0_SEEK);
1641: } else {
1642: cur_drv->track = fdctrl->fifo[2];
1643: /* Raise Interrupt */
1644: fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1645: }
1646: }
1647:
1648: static void fdctrl_handle_perpendicular_mode (fdctrl_t *fdctrl, int direction)
1649: {
1650: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1651:
1652: if (fdctrl->fifo[1] & 0x80)
1653: cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1654: /* No result back */
1655: fdctrl_reset_fifo(fdctrl);
1656: }
1657:
1658: static void fdctrl_handle_configure (fdctrl_t *fdctrl, int direction)
1659: {
1660: fdctrl->config = fdctrl->fifo[2];
1661: fdctrl->precomp_trk = fdctrl->fifo[3];
1662: /* No result back */
1663: fdctrl_reset_fifo(fdctrl);
1664: }
1665:
1666: static void fdctrl_handle_powerdown_mode (fdctrl_t *fdctrl, int direction)
1667: {
1668: fdctrl->pwrd = fdctrl->fifo[1];
1669: fdctrl->fifo[0] = fdctrl->fifo[1];
1670: fdctrl_set_fifo(fdctrl, 1, 1);
1671: }
1672:
1673: static void fdctrl_handle_option (fdctrl_t *fdctrl, int direction)
1674: {
1675: /* No result back */
1676: fdctrl_reset_fifo(fdctrl);
1677: }
1678:
1679: static void fdctrl_handle_drive_specification_command (fdctrl_t *fdctrl, int direction)
1680: {
1681: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1682:
1683: if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
1684: /* Command parameters done */
1685: if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1686: fdctrl->fifo[0] = fdctrl->fifo[1];
1687: fdctrl->fifo[2] = 0;
1688: fdctrl->fifo[3] = 0;
1689: fdctrl_set_fifo(fdctrl, 4, 1);
1690: } else {
1691: fdctrl_reset_fifo(fdctrl);
1.1 root 1692: }
1.1.1.4 root 1693: } else if (fdctrl->data_len > 7) {
1694: /* ERROR */
1695: fdctrl->fifo[0] = 0x80 |
1696: (cur_drv->head << 2) | GET_CUR_DRV(fdctrl);
1697: fdctrl_set_fifo(fdctrl, 1, 1);
1698: }
1699: }
1700:
1701: static void fdctrl_handle_relative_seek_out (fdctrl_t *fdctrl, int direction)
1702: {
1703: fdrive_t *cur_drv;
1704:
1705: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1706: cur_drv = get_cur_drv(fdctrl);
1707: if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1708: cur_drv->track = cur_drv->max_track - 1;
1709: } else {
1710: cur_drv->track += fdctrl->fifo[2];
1.1 root 1711: }
1.1.1.4 root 1712: fdctrl_reset_fifo(fdctrl);
1713: /* Raise Interrupt */
1714: fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1715: }
1716:
1717: static void fdctrl_handle_relative_seek_in (fdctrl_t *fdctrl, int direction)
1718: {
1719: fdrive_t *cur_drv;
1720:
1721: SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1722: cur_drv = get_cur_drv(fdctrl);
1723: if (fdctrl->fifo[2] > cur_drv->track) {
1724: cur_drv->track = 0;
1725: } else {
1726: cur_drv->track -= fdctrl->fifo[2];
1727: }
1728: fdctrl_reset_fifo(fdctrl);
1729: /* Raise Interrupt */
1730: fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
1731: }
1732:
1733: static const struct {
1734: uint8_t value;
1735: uint8_t mask;
1736: const char* name;
1737: int parameters;
1738: void (*handler)(fdctrl_t *fdctrl, int direction);
1739: int direction;
1740: } handlers[] = {
1741: { FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
1742: { FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
1743: { FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
1744: { FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
1745: { FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
1746: { FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
1747: { FD_CMD_READ_TRACK, 0xbf, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
1748: { FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
1749: { FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
1750: { FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
1751: { FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
1752: { FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
1753: { FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
1754: { FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
1755: { FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
1756: { FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
1757: { FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
1758: { FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
1759: { FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
1760: { FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
1761: { FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
1762: { FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
1763: { FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 5, fdctrl_handle_drive_specification_command },
1764: { FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
1765: { FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
1766: { FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
1767: { FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
1768: { FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
1769: { FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
1770: { FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
1771: { FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
1772: { 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
1773: };
1774: /* Associate command to an index in the 'handlers' array */
1775: static uint8_t command_to_handler[256];
1776:
1777: static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1778: {
1779: fdrive_t *cur_drv;
1780: int pos;
1781:
1782: /* Reset mode */
1783: if (!(fdctrl->dor & FD_DOR_nRESET)) {
1784: FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1785: return;
1786: }
1787: if (!(fdctrl->msr & FD_MSR_RQM) || (fdctrl->msr & FD_MSR_DIO)) {
1788: FLOPPY_ERROR("controller not ready for writing\n");
1789: return;
1790: }
1791: fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1792: /* Is it write command time ? */
1793: if (fdctrl->msr & FD_MSR_NONDMA) {
1794: /* FIFO data write */
1795: pos = fdctrl->data_pos++;
1796: pos %= FD_SECTOR_LEN;
1797: fdctrl->fifo[pos] = value;
1798: if (pos == FD_SECTOR_LEN - 1 ||
1799: fdctrl->data_pos == fdctrl->data_len) {
1800: cur_drv = get_cur_drv(fdctrl);
1801: if (bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1802: FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1803: return;
1804: }
1805: if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1806: FLOPPY_DPRINTF("error seeking to next sector %d\n",
1807: fd_sector(cur_drv));
1808: return;
1809: }
1810: }
1811: /* Switch from transfer mode to status mode
1812: * then from status mode to command mode
1813: */
1814: if (fdctrl->data_pos == fdctrl->data_len)
1815: fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1816: return;
1817: }
1818: if (fdctrl->data_pos == 0) {
1819: /* Command */
1820: pos = command_to_handler[value & 0xff];
1821: FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
1822: fdctrl->data_len = handlers[pos].parameters + 1;
1823: }
1824:
1.1 root 1825: FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1.1.1.4 root 1826: fdctrl->fifo[fdctrl->data_pos++] = value;
1827: if (fdctrl->data_pos == fdctrl->data_len) {
1.1 root 1828: /* We now have all parameters
1829: * and will be able to treat the command
1830: */
1.1.1.3 root 1831: if (fdctrl->data_state & FD_STATE_FORMAT) {
1832: fdctrl_format_sector(fdctrl);
1.1 root 1833: return;
1834: }
1.1.1.4 root 1835:
1836: pos = command_to_handler[fdctrl->fifo[0] & 0xff];
1837: FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
1838: (*handlers[pos].handler)(fdctrl, handlers[pos].direction);
1.1 root 1839: }
1840: }
1841:
1842: static void fdctrl_result_timer(void *opaque)
1843: {
1844: fdctrl_t *fdctrl = opaque;
1.1.1.3 root 1845: fdrive_t *cur_drv = get_cur_drv(fdctrl);
1846:
1847: /* Pretend we are spinning.
1848: * This is needed for Coherent, which uses READ ID to check for
1849: * sector interleaving.
1850: */
1851: if (cur_drv->last_sect != 0) {
1852: cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
1853: }
1.1 root 1854: fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1855: }
1.1.1.4 root 1856:
1857: /* Init functions */
1.1.1.5 ! root 1858: static void fdctrl_init_common (fdctrl_t *fdctrl, int dma_chann,
! 1859: target_phys_addr_t io_base,
! 1860: BlockDriverState **fds)
1.1.1.4 root 1861: {
1862: int i, j;
1863:
1864: /* Fill 'command_to_handler' lookup table */
1865: for (i = ARRAY_SIZE(handlers) - 1; i >= 0; i--) {
1866: for (j = 0; j < sizeof(command_to_handler); j++) {
1867: if ((j & handlers[i].mask) == handlers[i].value)
1868: command_to_handler[j] = i;
1869: }
1870: }
1871:
1872: FLOPPY_DPRINTF("init controller\n");
1873: fdctrl->fifo = qemu_memalign(512, FD_SECTOR_LEN);
1874: fdctrl->result_timer = qemu_new_timer(vm_clock,
1875: fdctrl_result_timer, fdctrl);
1876:
1877: fdctrl->version = 0x90; /* Intel 82078 controller */
1878: fdctrl->dma_chann = dma_chann;
1879: fdctrl->io_base = io_base;
1880: fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
1881: if (fdctrl->dma_chann != -1) {
1882: DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
1883: }
1884: for (i = 0; i < MAX_FD; i++) {
1885: fd_init(&fdctrl->drives[i], fds[i]);
1886: }
1887: fdctrl_external_reset(fdctrl);
1888: register_savevm("fdc", io_base, 2, fdc_save, fdc_load, fdctrl);
1889: qemu_register_reset(fdctrl_external_reset, fdctrl);
1890: for (i = 0; i < MAX_FD; i++) {
1891: fd_revalidate(&fdctrl->drives[i]);
1892: }
1893: }
1894:
1895: fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
1896: target_phys_addr_t io_base,
1897: BlockDriverState **fds)
1898: {
1.1.1.5 ! root 1899: DeviceState *dev;
! 1900: SysBusDevice *s;
1.1.1.4 root 1901: fdctrl_t *fdctrl;
1902:
1.1.1.5 ! root 1903: dev = qdev_create(NULL, "fdc");
! 1904: qdev_prop_set_uint32(dev, "strict_io", 0);
! 1905: qdev_prop_set_uint32(dev, "mem_mapped", mem_mapped);
! 1906: qdev_prop_set_uint32(dev, "sun4m", 0);
! 1907: qdev_init(dev);
! 1908: s = sysbus_from_qdev(dev);
! 1909: sysbus_connect_irq(s, 0, irq);
! 1910: fdctrl = FROM_SYSBUS(fdctrl_t, s);
1.1.1.4 root 1911: if (mem_mapped) {
1.1.1.5 ! root 1912: sysbus_mmio_map(s, 0, io_base);
1.1.1.4 root 1913: } else {
1914: register_ioport_read((uint32_t)io_base + 0x01, 5, 1,
1915: &fdctrl_read_port, fdctrl);
1916: register_ioport_read((uint32_t)io_base + 0x07, 1, 1,
1917: &fdctrl_read_port, fdctrl);
1918: register_ioport_write((uint32_t)io_base + 0x01, 5, 1,
1919: &fdctrl_write_port, fdctrl);
1920: register_ioport_write((uint32_t)io_base + 0x07, 1, 1,
1921: &fdctrl_write_port, fdctrl);
1922: }
1923:
1.1.1.5 ! root 1924: fdctrl_init_common(fdctrl, dma_chann, io_base, fds);
! 1925:
1.1.1.4 root 1926: return fdctrl;
1927: }
1928:
1929: fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
1930: BlockDriverState **fds, qemu_irq *fdc_tc)
1931: {
1.1.1.5 ! root 1932: DeviceState *dev;
! 1933: SysBusDevice *s;
1.1.1.4 root 1934: fdctrl_t *fdctrl;
1935:
1.1.1.5 ! root 1936: dev = qdev_create(NULL, "fdc");
! 1937: qdev_prop_set_uint32(dev, "strict_io", 1);
! 1938: qdev_prop_set_uint32(dev, "mem_mapped", 1);
! 1939: qdev_prop_set_uint32(dev, "sun4m", 1);
! 1940: qdev_init(dev);
! 1941: s = sysbus_from_qdev(dev);
! 1942: sysbus_connect_irq(s, 0, irq);
! 1943: sysbus_mmio_map(s, 0, io_base);
! 1944: *fdc_tc = qdev_get_gpio_in(dev, 0);
! 1945:
! 1946: fdctrl = FROM_SYSBUS(fdctrl_t, s);
! 1947: fdctrl_init_common(fdctrl, -1, io_base, fds);
1.1.1.4 root 1948:
1949: return fdctrl;
1950: }
1.1.1.5 ! root 1951:
! 1952: static void fdc_init1(SysBusDevice *dev)
! 1953: {
! 1954: fdctrl_t *s = FROM_SYSBUS(fdctrl_t, dev);
! 1955: int io;
! 1956:
! 1957: sysbus_init_irq(dev, &s->irq);
! 1958: qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);
! 1959: if (s->strict_io) {
! 1960: io = cpu_register_io_memory(fdctrl_mem_read_strict,
! 1961: fdctrl_mem_write_strict, s);
! 1962: } else {
! 1963: io = cpu_register_io_memory(fdctrl_mem_read, fdctrl_mem_write, s);
! 1964: }
! 1965: sysbus_init_mmio(dev, 0x08, io);
! 1966: }
! 1967:
! 1968:
! 1969: static SysBusDeviceInfo fdc_info = {
! 1970: .init = fdc_init1,
! 1971: .qdev.name = "fdc",
! 1972: .qdev.size = sizeof(fdctrl_t),
! 1973: .qdev.props = (Property[]) {
! 1974: {
! 1975: .name = "io_base",
! 1976: .info = &qdev_prop_taddr,
! 1977: .offset = offsetof(fdctrl_t, io_base),
! 1978: },
! 1979: {
! 1980: .name = "strict_io",
! 1981: .info = &qdev_prop_uint32,
! 1982: .offset = offsetof(fdctrl_t, strict_io),
! 1983: },
! 1984: {
! 1985: .name = "mem_mapped",
! 1986: .info = &qdev_prop_uint32,
! 1987: .offset = offsetof(fdctrl_t, mem_mapped),
! 1988: },
! 1989: {
! 1990: .name = "sun4m",
! 1991: .info = &qdev_prop_uint32,
! 1992: .offset = offsetof(fdctrl_t, sun4m),
! 1993: },
! 1994: {/* end of properties */}
! 1995: }
! 1996: };
! 1997:
! 1998: static void fdc_register_devices(void)
! 1999: {
! 2000: sysbus_register_withprop(&fdc_info);
! 2001: }
! 2002:
! 2003: device_init(fdc_register_devices)
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.