--- qemu/hw/ide/ich.c 2018/04/24 18:40:24 1.1 +++ qemu/hw/ide/ich.c 2018/04/24 19:02:18 1.1.1.2 @@ -67,7 +67,6 @@ #include #include "block.h" #include "block_int.h" -#include "sysemu.h" #include "dma.h" #include @@ -78,11 +77,8 @@ static int pci_ich9_ahci_init(PCIDevice struct AHCIPCIState *d; d = DO_UPCAST(struct AHCIPCIState, card, dev); - pci_config_set_vendor_id(d->card.config, PCI_VENDOR_ID_INTEL); - pci_config_set_device_id(d->card.config, PCI_DEVICE_ID_INTEL_82801IR); + ahci_init(&d->ahci, &dev->qdev, 6); - pci_config_set_class(d->card.config, PCI_CLASS_STORAGE_SATA); - pci_config_set_revision(d->card.config, 0x02); pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1); d->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */ @@ -94,15 +90,12 @@ static int pci_ich9_ahci_init(PCIDevice qemu_register_reset(ahci_reset, d); - /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */ - pci_register_bar(&d->card, 5, 0x1000, PCI_BASE_ADDRESS_SPACE_MEMORY, - ahci_pci_map); - msi_init(dev, 0x50, 1, true, false); - - ahci_init(&d->ahci, &dev->qdev, 6); d->ahci.irq = d->card.irq[0]; + /* XXX BAR size should be 1k, but that breaks, so bump it to 4k for now */ + pci_register_bar_simple(&d->card, 5, 0x1000, 0, d->ahci.mem); + return 0; } @@ -111,10 +104,7 @@ static int pci_ich9_uninit(PCIDevice *de struct AHCIPCIState *d; d = DO_UPCAST(struct AHCIPCIState, card, dev); - if (msi_enabled(dev)) { - msi_uninit(dev); - } - + msi_uninit(dev); qemu_unregister_reset(ahci_reset, d); ahci_uninit(&d->ahci); @@ -136,6 +126,10 @@ static PCIDeviceInfo ich_ahci_info[] = { .init = pci_ich9_ahci_init, .exit = pci_ich9_uninit, .config_write = pci_ich9_write_config, + .vendor_id = PCI_VENDOR_ID_INTEL, + .device_id = PCI_DEVICE_ID_INTEL_82801IR, + .revision = 0x02, + .class_id = PCI_CLASS_STORAGE_SATA, },{ /* end of list */ }