--- qemu/hw/ide/macio.c	2018/04/24 17:40:35	1.1
+++ qemu/hw/ide/macio.c	2018/04/24 19:02:16	1.1.1.4
@@ -27,7 +27,6 @@
 #include <hw/mac_dbdma.h>
 #include "block.h"
 #include "block_int.h"
-#include "sysemu.h"
 #include "dma.h"
 
 #include <hw/ide/internal.h>
@@ -40,6 +39,8 @@ typedef struct MACIOIDEState {
     BlockDriverAIOCB *aiocb;
 } MACIOIDEState;
 
+#define MACIO_PAGE_SIZE 4096
+
 static void pmac_ide_atapi_transfer_cb(void *opaque, int ret)
 {
     DBDMA_io *io = opaque;
@@ -77,7 +78,7 @@ static void pmac_ide_atapi_transfer_cb(v
 
     s->io_buffer_size = io->len;
 
-    qemu_sglist_init(&s->sg, io->len / TARGET_PAGE_SIZE + 1);
+    qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1);
     qemu_sglist_add(&s->sg, io->addr, io->len);
     io->addr += io->len;
     io->len = 0;
@@ -139,17 +140,26 @@ static void pmac_ide_transfer_cb(void *o
     s->io_buffer_index = 0;
     s->io_buffer_size = io->len;
 
-    qemu_sglist_init(&s->sg, io->len / TARGET_PAGE_SIZE + 1);
+    qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1);
     qemu_sglist_add(&s->sg, io->addr, io->len);
     io->addr += io->len;
     io->len = 0;
 
-    if (s->is_read)
+    switch (s->dma_cmd) {
+    case IDE_DMA_READ:
         m->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num,
 		                 pmac_ide_transfer_cb, io);
-    else
+        break;
+    case IDE_DMA_WRITE:
         m->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num,
 		                  pmac_ide_transfer_cb, io);
+        break;
+    case IDE_DMA_TRIM:
+        m->aiocb = dma_bdrv_io(s->bs, &s->sg, sector_num,
+                               ide_issue_trim, pmac_ide_transfer_cb, s, 1);
+        break;
+    }
+
     if (!m->aiocb)
         pmac_ide_transfer_cb(io, -1);
 }
@@ -160,7 +170,7 @@ static void pmac_ide_transfer(DBDMA_io *
     IDEState *s = idebus_active_if(&m->bus);
 
     s->io_buffer_size = 0;
-    if (s->is_cdrom) {
+    if (s->drive_kind == IDE_CD) {
         pmac_ide_atapi_transfer_cb(io, 0);
         return;
     }
@@ -223,9 +233,7 @@ static void pmac_ide_writew (void *opaqu
     MACIOIDEState *d = opaque;
 
     addr = (addr & 0xFFF) >> 4;
-#ifdef TARGET_WORDS_BIGENDIAN
     val = bswap16(val);
-#endif
     if (addr == 0) {
         ide_data_writew(&d->bus, 0, val);
     }
@@ -242,9 +250,7 @@ static uint32_t pmac_ide_readw (void *op
     } else {
         retval = 0xFFFF;
     }
-#ifdef TARGET_WORDS_BIGENDIAN
     retval = bswap16(retval);
-#endif
     return retval;
 }
 
@@ -254,9 +260,7 @@ static void pmac_ide_writel (void *opaqu
     MACIOIDEState *d = opaque;
 
     addr = (addr & 0xFFF) >> 4;
-#ifdef TARGET_WORDS_BIGENDIAN
     val = bswap32(val);
-#endif
     if (addr == 0) {
         ide_data_writel(&d->bus, 0, val);
     }
@@ -273,9 +277,7 @@ static uint32_t pmac_ide_readl (void *op
     } else {
         retval = 0xFFFFFFFF;
     }
-#ifdef TARGET_WORDS_BIGENDIAN
     retval = bswap32(retval);
-#endif
     return retval;
 }
 
@@ -320,14 +322,15 @@ int pmac_ide_init (DriveInfo **hd_table,
     int pmac_ide_memory;
 
     d = qemu_mallocz(sizeof(MACIOIDEState));
-    ide_init2(&d->bus, hd_table[0], hd_table[1], irq);
+    ide_init2_with_non_qdev_drives(&d->bus, hd_table[0], hd_table[1], irq);
 
     if (dbdma)
         DBDMA_register_channel(dbdma, channel, dma_irq, pmac_ide_transfer, pmac_ide_flush, d);
 
     pmac_ide_memory = cpu_register_io_memory(pmac_ide_read,
-                                             pmac_ide_write, d);
-    vmstate_register(0, &vmstate_pmac, d);
+                                             pmac_ide_write, d,
+                                             DEVICE_NATIVE_ENDIAN);
+    vmstate_register(NULL, 0, &vmstate_pmac, d);
     qemu_register_reset(pmac_ide_reset, d);
 
     return pmac_ide_memory;