Annotation of qemu/hw/isa_mmio.c, revision 1.1.1.7

1.1       root        1: /*
                      2:  * Memory mapped access to ISA IO space.
                      3:  *
                      4:  * Copyright (c) 2006 Fabrice Bellard
1.1.1.2   root        5:  *
1.1       root        6:  * Permission is hereby granted, free of charge, to any person obtaining a copy
                      7:  * of this software and associated documentation files (the "Software"), to deal
                      8:  * in the Software without restriction, including without limitation the rights
                      9:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                     10:  * copies of the Software, and to permit persons to whom the Software is
                     11:  * furnished to do so, subject to the following conditions:
                     12:  *
                     13:  * The above copyright notice and this permission notice shall be included in
                     14:  * all copies or substantial portions of the Software.
                     15:  *
                     16:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                     17:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                     18:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
                     19:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                     20:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                     21:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
                     22:  * THE SOFTWARE.
                     23:  */
                     24: 
1.1.1.2   root       25: #include "hw.h"
                     26: #include "isa.h"
1.1.1.7 ! root       27: #include "exec-memory.h"
1.1       root       28: 
                     29: static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
                     30:                                   uint32_t val)
                     31: {
1.1.1.4   root       32:     cpu_outb(addr & IOPORTS_MASK, val);
1.1       root       33: }
                     34: 
1.1.1.6   root       35: static void isa_mmio_writew(void *opaque, target_phys_addr_t addr,
1.1.1.5   root       36:                                uint32_t val)
1.1       root       37: {
1.1.1.4   root       38:     cpu_outw(addr & IOPORTS_MASK, val);
1.1       root       39: }
                     40: 
1.1.1.6   root       41: static void isa_mmio_writel(void *opaque, target_phys_addr_t addr,
1.1.1.5   root       42:                                uint32_t val)
                     43: {
1.1.1.4   root       44:     cpu_outl(addr & IOPORTS_MASK, val);
1.1       root       45: }
                     46: 
                     47: static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
                     48: {
1.1.1.6   root       49:     return cpu_inb(addr & IOPORTS_MASK);
1.1       root       50: }
                     51: 
1.1.1.6   root       52: static uint32_t isa_mmio_readw(void *opaque, target_phys_addr_t addr)
1.1       root       53: {
1.1.1.6   root       54:     return cpu_inw(addr & IOPORTS_MASK);
1.1       root       55: }
                     56: 
1.1.1.6   root       57: static uint32_t isa_mmio_readl(void *opaque, target_phys_addr_t addr)
1.1.1.5   root       58: {
1.1.1.6   root       59:     return cpu_inl(addr & IOPORTS_MASK);
1.1.1.5   root       60: }
                     61: 
1.1.1.7 ! root       62: static const MemoryRegionOps isa_mmio_ops = {
        !            63:     .old_mmio = {
        !            64:         .write = { isa_mmio_writeb, isa_mmio_writew, isa_mmio_writel },
        !            65:         .read = { isa_mmio_readb, isa_mmio_readw, isa_mmio_readl, },
        !            66:     },
        !            67:     .endianness = DEVICE_LITTLE_ENDIAN,
1.1       root       68: };
                     69: 
1.1.1.7 ! root       70: void isa_mmio_setup(MemoryRegion *mr, target_phys_addr_t size)
        !            71: {
        !            72:     memory_region_init_io(mr, &isa_mmio_ops, NULL, "isa-mmio", size);
        !            73: }
1.1       root       74: 
1.1.1.6   root       75: void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size)
1.1       root       76: {
1.1.1.7 ! root       77:     MemoryRegion *mr = g_malloc(sizeof(*mr));
1.1.1.6   root       78: 
1.1.1.7 ! root       79:     isa_mmio_setup(mr, size);
        !            80:     memory_region_add_subregion(get_system_memory(), base, mr);
1.1       root       81: }

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