![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to macio.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Qemu by Fabrice Bellard] / qemu / hw|
Return to macio.c CVS log | Up to [Qemu by Fabrice Bellard] / qemu / hw |
1.1 root 1: /*
2: * PowerMac MacIO device emulation
3: *
4: * Copyright (c) 2005-2007 Fabrice Bellard
5: * Copyright (c) 2007 Jocelyn Mayer
6: *
7: * Permission is hereby granted, free of charge, to any person obtaining a copy
8: * of this software and associated documentation files (the "Software"), to deal
9: * in the Software without restriction, including without limitation the rights
10: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11: * copies of the Software, and to permit persons to whom the Software is
12: * furnished to do so, subject to the following conditions:
13: *
14: * The above copyright notice and this permission notice shall be included in
15: * all copies or substantial portions of the Software.
16: *
17: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23: * THE SOFTWARE.
24: */
25: #include "hw.h"
26: #include "ppc_mac.h"
27: #include "pci.h"
1.1.1.2 root 28: #include "escc.h"
1.1 root 29:
1.1.1.7 ! root 30: typedef struct MacIOState
! 31: {
! 32: PCIDevice parent;
1.1 root 33: int is_oldworld;
1.1.1.6 root 34: MemoryRegion bar;
35: MemoryRegion *pic_mem;
36: MemoryRegion *dbdma_mem;
37: MemoryRegion *cuda_mem;
38: MemoryRegion *escc_mem;
1.1 root 39: void *nvram;
40: int nb_ide;
1.1.1.6 root 41: MemoryRegion *ide_mem[4];
1.1.1.7 ! root 42: } MacIOState;
1.1 root 43:
1.1.1.7 ! root 44: static void macio_bar_setup(MacIOState *macio_state)
1.1 root 45: {
46: int i;
1.1.1.6 root 47: MemoryRegion *bar = &macio_state->bar;
1.1 root 48:
1.1.1.6 root 49: memory_region_init(bar, "macio", 0x80000);
50: if (macio_state->pic_mem) {
1.1 root 51: if (macio_state->is_oldworld) {
52: /* Heathrow PIC */
1.1.1.6 root 53: memory_region_add_subregion(bar, 0x00000, macio_state->pic_mem);
1.1 root 54: } else {
55: /* OpenPIC */
1.1.1.6 root 56: memory_region_add_subregion(bar, 0x40000, macio_state->pic_mem);
1.1 root 57: }
58: }
1.1.1.6 root 59: if (macio_state->dbdma_mem) {
60: memory_region_add_subregion(bar, 0x08000, macio_state->dbdma_mem);
1.1 root 61: }
1.1.1.6 root 62: if (macio_state->escc_mem) {
63: memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
1.1.1.2 root 64: }
1.1.1.6 root 65: if (macio_state->cuda_mem) {
66: memory_region_add_subregion(bar, 0x16000, macio_state->cuda_mem);
1.1 root 67: }
68: for (i = 0; i < macio_state->nb_ide; i++) {
1.1.1.6 root 69: if (macio_state->ide_mem[i]) {
70: memory_region_add_subregion(bar, 0x1f000 + (i * 0x1000),
71: macio_state->ide_mem[i]);
1.1 root 72: }
73: }
74: if (macio_state->nvram != NULL)
1.1.1.6 root 75: macio_nvram_setup_bar(macio_state->nvram, bar, 0x60000);
1.1 root 76: }
77:
1.1.1.7 ! root 78: static int macio_initfn(PCIDevice *d)
! 79: {
! 80: d->config[0x3d] = 0x01; // interrupt on pin 1
! 81: return 0;
! 82: }
! 83:
! 84: static void macio_class_init(ObjectClass *klass, void *data)
! 85: {
! 86: PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
! 87:
! 88: k->init = macio_initfn;
! 89: k->vendor_id = PCI_VENDOR_ID_APPLE;
! 90: k->class_id = PCI_CLASS_OTHERS << 8;
! 91: }
! 92:
! 93: static TypeInfo macio_info = {
! 94: .name = "macio",
! 95: .parent = TYPE_PCI_DEVICE,
! 96: .instance_size = sizeof(MacIOState),
! 97: .class_init = macio_class_init,
! 98: };
! 99:
! 100: static void macio_register_types(void)
! 101: {
! 102: type_register_static(&macio_info);
! 103: }
! 104:
! 105: type_init(macio_register_types)
! 106:
1.1.1.6 root 107: void macio_init (PCIBus *bus, int device_id, int is_oldworld,
108: MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
109: MemoryRegion *cuda_mem, void *nvram,
110: int nb_ide, MemoryRegion **ide_mem,
111: MemoryRegion *escc_mem)
1.1 root 112: {
113: PCIDevice *d;
1.1.1.7 ! root 114: MacIOState *macio_state;
1.1 root 115: int i;
116:
1.1.1.7 ! root 117: d = pci_create_simple(bus, -1, "macio");
! 118:
! 119: macio_state = DO_UPCAST(MacIOState, parent, d);
1.1 root 120: macio_state->is_oldworld = is_oldworld;
1.1.1.6 root 121: macio_state->pic_mem = pic_mem;
122: macio_state->dbdma_mem = dbdma_mem;
123: macio_state->cuda_mem = cuda_mem;
124: macio_state->escc_mem = escc_mem;
1.1 root 125: macio_state->nvram = nvram;
126: if (nb_ide > 4)
127: nb_ide = 4;
128: macio_state->nb_ide = nb_ide;
129: for (i = 0; i < nb_ide; i++)
1.1.1.6 root 130: macio_state->ide_mem[i] = ide_mem[i];
1.1 root 131: for (; i < 4; i++)
1.1.1.6 root 132: macio_state->ide_mem[i] = NULL;
1.1 root 133: /* Note: this code is strongly inspirated from the corresponding code
134: in PearPC */
135:
1.1.1.2 root 136: pci_config_set_device_id(d->config, device_id);
1.1 root 137:
1.1.1.6 root 138: macio_bar_setup(macio_state);
139: pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &macio_state->bar);
1.1 root 140: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.