Annotation of qemu/hw/mainstone.c, revision 1.1.1.1

1.1       root        1: /*
                      2:  * PXA270-based Intel Mainstone platforms.
                      3:  *
                      4:  * Copyright (c) 2007 by Armin Kuster <[email protected]> or
                      5:  *                                    <[email protected]>
                      6:  *
                      7:  * Code based on spitz platform by Andrzej Zaborowski <[email protected]>
                      8:  *
                      9:  * This code is licensed under the GNU GPL v2.
                     10:  */
                     11: #include "hw.h"
                     12: #include "pxa.h"
                     13: #include "arm-misc.h"
                     14: #include "net.h"
                     15: #include "devices.h"
                     16: #include "boards.h"
                     17: #include "mainstone.h"
                     18: #include "sysemu.h"
                     19: #include "flash.h"
                     20: 
                     21: static struct keymap map[0xE0] = {
                     22:     [0 ... 0xDF] = { -1, -1 },
                     23:     [0x1e] = {0,0}, /* a */
                     24:     [0x30] = {0,1}, /* b */
                     25:     [0x2e] = {0,2}, /* c */
                     26:     [0x20] = {0,3}, /* d */
                     27:     [0x12] = {0,4}, /* e */
                     28:     [0x21] = {0,5}, /* f */
                     29:     [0x22] = {1,0}, /* g */
                     30:     [0x23] = {1,1}, /* h */
                     31:     [0x17] = {1,2}, /* i */
                     32:     [0x24] = {1,3}, /* j */
                     33:     [0x25] = {1,4}, /* k */
                     34:     [0x26] = {1,5}, /* l */
                     35:     [0x32] = {2,0}, /* m */
                     36:     [0x31] = {2,1}, /* n */
                     37:     [0x18] = {2,2}, /* o */
                     38:     [0x19] = {2,3}, /* p */
                     39:     [0x10] = {2,4}, /* q */
                     40:     [0x13] = {2,5}, /* r */
                     41:     [0x1f] = {3,0}, /* s */
                     42:     [0x14] = {3,1}, /* t */
                     43:     [0x16] = {3,2}, /* u */
                     44:     [0x2f] = {3,3}, /* v */
                     45:     [0x11] = {3,4}, /* w */
                     46:     [0x2d] = {3,5}, /* x */
                     47:     [0x15] = {4,2}, /* y */
                     48:     [0x2c] = {4,3}, /* z */
                     49:     [0xc7] = {5,0}, /* Home */
                     50:     [0x2a] = {5,1}, /* shift */
                     51:     [0x39] = {5,2}, /* space */
                     52:     [0x39] = {5,3}, /* space */
                     53:     [0x1c] = {5,5}, /*  enter */
                     54:     [0xc8] = {6,0}, /* up */
                     55:     [0xd0] = {6,1}, /* down */
                     56:     [0xcb] = {6,2}, /* left */
                     57:     [0xcd] = {6,3}, /* right */
                     58: };
                     59: 
                     60: enum mainstone_model_e { mainstone };
                     61: 
                     62: static void mainstone_common_init(int ram_size, int vga_ram_size,
                     63:                 DisplayState *ds, const char *kernel_filename,
                     64:                 const char *kernel_cmdline, const char *initrd_filename,
                     65:                 const char *cpu_model, enum mainstone_model_e model, int arm_id)
                     66: {
                     67:     uint32_t mainstone_ram   = 0x04000000;
                     68:     uint32_t mainstone_rom   = 0x00800000;
                     69:     uint32_t mainstone_flash = 0x02000000;
                     70:     uint32_t sector_len = 256 * 1024;
                     71:     target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
                     72:     struct pxa2xx_state_s *cpu;
                     73:     qemu_irq *mst_irq;
                     74:     int i, index;
                     75: 
                     76:     if (!cpu_model)
                     77:         cpu_model = "pxa270-c5";
                     78: 
                     79:     /* Setup CPU & memory */
                     80:     if (ram_size < mainstone_ram + mainstone_rom + 2 * mainstone_flash +
                     81:                     PXA2XX_INTERNAL_SIZE) {
                     82:         fprintf(stderr, "This platform requires %i bytes of memory\n",
                     83:                         mainstone_ram + mainstone_rom + 2 * mainstone_flash +
                     84:                         PXA2XX_INTERNAL_SIZE);
                     85:         exit(1);
                     86:     }
                     87: 
                     88:     cpu = pxa270_init(mainstone_ram, ds, cpu_model);
                     89:     cpu_register_physical_memory(0, mainstone_rom,
                     90:                     qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM);
                     91: 
                     92:     /* Setup initial (reset) machine state */
                     93:     cpu->env->regs[15] = PXA2XX_SDRAM_BASE;
                     94: 
                     95:     /* There are two 32MiB flash devices on the board */
                     96:     for (i = 0; i < 2; i ++) {
                     97:         index = drive_get_index(IF_PFLASH, 0, i);
                     98:         if (index == -1) {
                     99:             fprintf(stderr, "Two flash images must be given with the "
                    100:                     "'pflash' parameter\n");
                    101:             exit(1);
                    102:         }
                    103: 
                    104:         if (!pflash_cfi01_register(mainstone_flash_base[i],
                    105:                                 qemu_ram_alloc(mainstone_flash),
                    106:                                 drives_table[index].bdrv, sector_len,
                    107:                                 mainstone_flash / sector_len, 4, 0, 0, 0, 0)) {
                    108:             fprintf(stderr, "qemu: Error registering flash memory.\n");
                    109:             exit(1);
                    110:         }
                    111:     }
                    112: 
                    113:     mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
                    114: 
                    115:     /* setup keypad */
                    116:     printf("map addr %p\n", &map);
                    117:     pxa27x_register_keypad(cpu->kp, map, 0xe0);
                    118: 
                    119:     /* MMC/SD host */
                    120:     pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]);
                    121: 
                    122:     smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
                    123: 
                    124:     arm_load_kernel(cpu->env, mainstone_ram, kernel_filename, kernel_cmdline,
                    125:                     initrd_filename, arm_id, PXA2XX_SDRAM_BASE);
                    126: }
                    127: 
                    128: static void mainstone_init(int ram_size, int vga_ram_size,
                    129:                 const char *boot_device, DisplayState *ds,
                    130:                 const char *kernel_filename, const char *kernel_cmdline,
                    131:                 const char *initrd_filename, const char *cpu_model)
                    132: {
                    133:     mainstone_common_init(ram_size, vga_ram_size, ds, kernel_filename,
                    134:                 kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
                    135: }
                    136: 
                    137: QEMUMachine mainstone2_machine = {
                    138:     "mainstone",
                    139:     "Mainstone II (PXA27x)",
                    140:     mainstone_init,
                    141: };

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