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1.1 root 1: /*
2: * PXA270-based Intel Mainstone platforms.
3: *
4: * Copyright (c) 2007 by Armin Kuster <[email protected]> or
5: * <[email protected]>
6: *
7: * Code based on spitz platform by Andrzej Zaborowski <[email protected]>
8: *
9: * This code is licensed under the GNU GPL v2.
10: */
11: #include "hw.h"
12: #include "pxa.h"
13: #include "arm-misc.h"
14: #include "net.h"
15: #include "devices.h"
16: #include "boards.h"
17: #include "mainstone.h"
18: #include "sysemu.h"
19: #include "flash.h"
1.1.1.6 ! root 20: #include "blockdev.h"
1.1 root 21:
22: static struct keymap map[0xE0] = {
23: [0 ... 0xDF] = { -1, -1 },
24: [0x1e] = {0,0}, /* a */
25: [0x30] = {0,1}, /* b */
26: [0x2e] = {0,2}, /* c */
27: [0x20] = {0,3}, /* d */
28: [0x12] = {0,4}, /* e */
29: [0x21] = {0,5}, /* f */
30: [0x22] = {1,0}, /* g */
31: [0x23] = {1,1}, /* h */
32: [0x17] = {1,2}, /* i */
33: [0x24] = {1,3}, /* j */
34: [0x25] = {1,4}, /* k */
35: [0x26] = {1,5}, /* l */
36: [0x32] = {2,0}, /* m */
37: [0x31] = {2,1}, /* n */
38: [0x18] = {2,2}, /* o */
39: [0x19] = {2,3}, /* p */
40: [0x10] = {2,4}, /* q */
41: [0x13] = {2,5}, /* r */
42: [0x1f] = {3,0}, /* s */
43: [0x14] = {3,1}, /* t */
44: [0x16] = {3,2}, /* u */
45: [0x2f] = {3,3}, /* v */
46: [0x11] = {3,4}, /* w */
47: [0x2d] = {3,5}, /* x */
48: [0x15] = {4,2}, /* y */
49: [0x2c] = {4,3}, /* z */
50: [0xc7] = {5,0}, /* Home */
51: [0x2a] = {5,1}, /* shift */
52: [0x39] = {5,2}, /* space */
53: [0x39] = {5,3}, /* space */
54: [0x1c] = {5,5}, /* enter */
55: [0xc8] = {6,0}, /* up */
56: [0xd0] = {6,1}, /* down */
57: [0xcb] = {6,2}, /* left */
58: [0xcd] = {6,3}, /* right */
59: };
60:
61: enum mainstone_model_e { mainstone };
62:
1.1.1.2 root 63: #define MAINSTONE_RAM 0x04000000
64: #define MAINSTONE_ROM 0x00800000
65: #define MAINSTONE_FLASH 0x02000000
66:
67: static struct arm_boot_info mainstone_binfo = {
68: .loader_start = PXA2XX_SDRAM_BASE,
69: .ram_size = 0x04000000,
70: };
71:
1.1.1.3 root 72: static void mainstone_common_init(ram_addr_t ram_size,
1.1.1.2 root 73: const char *kernel_filename,
1.1 root 74: const char *kernel_cmdline, const char *initrd_filename,
75: const char *cpu_model, enum mainstone_model_e model, int arm_id)
76: {
77: uint32_t sector_len = 256 * 1024;
78: target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
1.1.1.3 root 79: PXA2xxState *cpu;
1.1 root 80: qemu_irq *mst_irq;
1.1.1.4 root 81: DriveInfo *dinfo;
82: int i;
1.1.1.5 root 83: int be;
1.1 root 84:
85: if (!cpu_model)
86: cpu_model = "pxa270-c5";
87:
88: /* Setup CPU & memory */
1.1.1.2 root 89: cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
90: cpu_register_physical_memory(0, MAINSTONE_ROM,
1.1.1.5 root 91: qemu_ram_alloc(NULL, "mainstone.rom",
92: MAINSTONE_ROM) | IO_MEM_ROM);
1.1 root 93:
1.1.1.5 root 94: #ifdef TARGET_WORDS_BIGENDIAN
95: be = 1;
96: #else
97: be = 0;
98: #endif
1.1 root 99: /* There are two 32MiB flash devices on the board */
100: for (i = 0; i < 2; i ++) {
1.1.1.4 root 101: dinfo = drive_get(IF_PFLASH, 0, i);
102: if (!dinfo) {
1.1 root 103: fprintf(stderr, "Two flash images must be given with the "
104: "'pflash' parameter\n");
105: exit(1);
106: }
107:
108: if (!pflash_cfi01_register(mainstone_flash_base[i],
1.1.1.6 ! root 109: qemu_ram_alloc(NULL, i ? "mainstone.flash1" :
! 110: "mainstone.flash0",
1.1.1.5 root 111: MAINSTONE_FLASH),
112: dinfo->bdrv, sector_len,
113: MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0,
114: be)) {
1.1 root 115: fprintf(stderr, "qemu: Error registering flash memory.\n");
116: exit(1);
117: }
118: }
119:
120: mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
121:
122: /* setup keypad */
123: printf("map addr %p\n", &map);
124: pxa27x_register_keypad(cpu->kp, map, 0xe0);
125:
126: /* MMC/SD host */
127: pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]);
128:
129: smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
130:
1.1.1.2 root 131: mainstone_binfo.kernel_filename = kernel_filename;
132: mainstone_binfo.kernel_cmdline = kernel_cmdline;
133: mainstone_binfo.initrd_filename = initrd_filename;
134: mainstone_binfo.board_id = arm_id;
135: arm_load_kernel(cpu->env, &mainstone_binfo);
1.1 root 136: }
137:
1.1.1.3 root 138: static void mainstone_init(ram_addr_t ram_size,
1.1.1.2 root 139: const char *boot_device,
1.1 root 140: const char *kernel_filename, const char *kernel_cmdline,
141: const char *initrd_filename, const char *cpu_model)
142: {
1.1.1.3 root 143: mainstone_common_init(ram_size, kernel_filename,
1.1 root 144: kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
145: }
146:
1.1.1.3 root 147: static QEMUMachine mainstone2_machine = {
1.1.1.2 root 148: .name = "mainstone",
149: .desc = "Mainstone II (PXA27x)",
150: .init = mainstone_init,
1.1 root 151: };
1.1.1.3 root 152:
153: static void mainstone_machine_init(void)
154: {
155: qemu_register_machine(&mainstone2_machine);
156: }
157:
158: machine_init(mainstone_machine_init);
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