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1.1 root 1: /*
2: * PXA270-based Intel Mainstone platforms.
3: *
4: * Copyright (c) 2007 by Armin Kuster <[email protected]> or
5: * <[email protected]>
6: *
7: * Code based on spitz platform by Andrzej Zaborowski <[email protected]>
8: *
9: * This code is licensed under the GNU GPL v2.
10: */
11: #include "hw.h"
12: #include "pxa.h"
13: #include "arm-misc.h"
14: #include "net.h"
15: #include "devices.h"
16: #include "boards.h"
17: #include "flash.h"
1.1.1.6 root 18: #include "blockdev.h"
1.1.1.7 ! root 19: #include "sysbus.h"
! 20:
! 21: /* Device addresses */
! 22: #define MST_FPGA_PHYS 0x08000000
! 23: #define MST_ETH_PHYS 0x10000300
! 24: #define MST_FLASH_0 0x00000000
! 25: #define MST_FLASH_1 0x04000000
! 26:
! 27: /* IRQ definitions */
! 28: #define MMC_IRQ 0
! 29: #define USIM_IRQ 1
! 30: #define USBC_IRQ 2
! 31: #define ETHERNET_IRQ 3
! 32: #define AC97_IRQ 4
! 33: #define PEN_IRQ 5
! 34: #define MSINS_IRQ 6
! 35: #define EXBRD_IRQ 7
! 36: #define S0_CD_IRQ 9
! 37: #define S0_STSCHG_IRQ 10
! 38: #define S0_IRQ 11
! 39: #define S1_CD_IRQ 13
! 40: #define S1_STSCHG_IRQ 14
! 41: #define S1_IRQ 15
1.1 root 42:
43: static struct keymap map[0xE0] = {
44: [0 ... 0xDF] = { -1, -1 },
45: [0x1e] = {0,0}, /* a */
46: [0x30] = {0,1}, /* b */
47: [0x2e] = {0,2}, /* c */
48: [0x20] = {0,3}, /* d */
49: [0x12] = {0,4}, /* e */
50: [0x21] = {0,5}, /* f */
51: [0x22] = {1,0}, /* g */
52: [0x23] = {1,1}, /* h */
53: [0x17] = {1,2}, /* i */
54: [0x24] = {1,3}, /* j */
55: [0x25] = {1,4}, /* k */
56: [0x26] = {1,5}, /* l */
57: [0x32] = {2,0}, /* m */
58: [0x31] = {2,1}, /* n */
59: [0x18] = {2,2}, /* o */
60: [0x19] = {2,3}, /* p */
61: [0x10] = {2,4}, /* q */
62: [0x13] = {2,5}, /* r */
63: [0x1f] = {3,0}, /* s */
64: [0x14] = {3,1}, /* t */
65: [0x16] = {3,2}, /* u */
66: [0x2f] = {3,3}, /* v */
67: [0x11] = {3,4}, /* w */
68: [0x2d] = {3,5}, /* x */
69: [0x15] = {4,2}, /* y */
70: [0x2c] = {4,3}, /* z */
71: [0xc7] = {5,0}, /* Home */
72: [0x2a] = {5,1}, /* shift */
73: [0x39] = {5,2}, /* space */
74: [0x39] = {5,3}, /* space */
75: [0x1c] = {5,5}, /* enter */
76: [0xc8] = {6,0}, /* up */
77: [0xd0] = {6,1}, /* down */
78: [0xcb] = {6,2}, /* left */
79: [0xcd] = {6,3}, /* right */
80: };
81:
82: enum mainstone_model_e { mainstone };
83:
1.1.1.2 root 84: #define MAINSTONE_RAM 0x04000000
85: #define MAINSTONE_ROM 0x00800000
86: #define MAINSTONE_FLASH 0x02000000
87:
88: static struct arm_boot_info mainstone_binfo = {
89: .loader_start = PXA2XX_SDRAM_BASE,
90: .ram_size = 0x04000000,
91: };
92:
1.1.1.3 root 93: static void mainstone_common_init(ram_addr_t ram_size,
1.1.1.2 root 94: const char *kernel_filename,
1.1 root 95: const char *kernel_cmdline, const char *initrd_filename,
96: const char *cpu_model, enum mainstone_model_e model, int arm_id)
97: {
98: uint32_t sector_len = 256 * 1024;
99: target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
1.1.1.3 root 100: PXA2xxState *cpu;
1.1.1.7 ! root 101: DeviceState *mst_irq;
1.1.1.4 root 102: DriveInfo *dinfo;
103: int i;
1.1.1.5 root 104: int be;
1.1 root 105:
106: if (!cpu_model)
107: cpu_model = "pxa270-c5";
108:
109: /* Setup CPU & memory */
1.1.1.2 root 110: cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model);
111: cpu_register_physical_memory(0, MAINSTONE_ROM,
1.1.1.5 root 112: qemu_ram_alloc(NULL, "mainstone.rom",
113: MAINSTONE_ROM) | IO_MEM_ROM);
1.1 root 114:
1.1.1.5 root 115: #ifdef TARGET_WORDS_BIGENDIAN
116: be = 1;
117: #else
118: be = 0;
119: #endif
1.1 root 120: /* There are two 32MiB flash devices on the board */
121: for (i = 0; i < 2; i ++) {
1.1.1.4 root 122: dinfo = drive_get(IF_PFLASH, 0, i);
123: if (!dinfo) {
1.1 root 124: fprintf(stderr, "Two flash images must be given with the "
125: "'pflash' parameter\n");
126: exit(1);
127: }
128:
129: if (!pflash_cfi01_register(mainstone_flash_base[i],
1.1.1.6 root 130: qemu_ram_alloc(NULL, i ? "mainstone.flash1" :
131: "mainstone.flash0",
1.1.1.5 root 132: MAINSTONE_FLASH),
133: dinfo->bdrv, sector_len,
134: MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0,
135: be)) {
1.1 root 136: fprintf(stderr, "qemu: Error registering flash memory.\n");
137: exit(1);
138: }
139: }
140:
1.1.1.7 ! root 141: mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
! 142: qdev_get_gpio_in(cpu->gpio, 0));
1.1 root 143:
144: /* setup keypad */
145: printf("map addr %p\n", &map);
146: pxa27x_register_keypad(cpu->kp, map, 0xe0);
147:
148: /* MMC/SD host */
1.1.1.7 ! root 149: pxa2xx_mmci_handlers(cpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
! 150:
! 151: pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
! 152: qdev_get_gpio_in(mst_irq, S0_IRQ),
! 153: qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
! 154: pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
! 155: qdev_get_gpio_in(mst_irq, S1_IRQ),
! 156: qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
1.1 root 157:
1.1.1.7 ! root 158: smc91c111_init(&nd_table[0], MST_ETH_PHYS,
! 159: qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
1.1 root 160:
1.1.1.2 root 161: mainstone_binfo.kernel_filename = kernel_filename;
162: mainstone_binfo.kernel_cmdline = kernel_cmdline;
163: mainstone_binfo.initrd_filename = initrd_filename;
164: mainstone_binfo.board_id = arm_id;
165: arm_load_kernel(cpu->env, &mainstone_binfo);
1.1 root 166: }
167:
1.1.1.3 root 168: static void mainstone_init(ram_addr_t ram_size,
1.1.1.2 root 169: const char *boot_device,
1.1 root 170: const char *kernel_filename, const char *kernel_cmdline,
171: const char *initrd_filename, const char *cpu_model)
172: {
1.1.1.3 root 173: mainstone_common_init(ram_size, kernel_filename,
1.1 root 174: kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
175: }
176:
1.1.1.3 root 177: static QEMUMachine mainstone2_machine = {
1.1.1.2 root 178: .name = "mainstone",
179: .desc = "Mainstone II (PXA27x)",
180: .init = mainstone_init,
1.1 root 181: };
1.1.1.3 root 182:
183: static void mainstone_machine_init(void)
184: {
185: qemu_register_machine(&mainstone2_machine);
186: }
187:
188: machine_init(mainstone_machine_init);
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