![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to mainstone.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Qemu by Fabrice Bellard] / qemu / hw|
Return to mainstone.c CVS log | Up to [Qemu by Fabrice Bellard] / qemu / hw |
1.1 root 1: /*
2: * PXA270-based Intel Mainstone platforms.
3: *
4: * Copyright (c) 2007 by Armin Kuster <[email protected]> or
5: * <[email protected]>
6: *
7: * Code based on spitz platform by Andrzej Zaborowski <[email protected]>
8: *
9: * This code is licensed under the GNU GPL v2.
10: */
11: #include "hw.h"
12: #include "pxa.h"
13: #include "arm-misc.h"
14: #include "net.h"
15: #include "devices.h"
16: #include "boards.h"
17: #include "flash.h"
1.1.1.6 root 18: #include "blockdev.h"
1.1.1.7 root 19: #include "sysbus.h"
1.1.1.8 ! root 20: #include "exec-memory.h"
1.1.1.7 root 21:
22: /* Device addresses */
23: #define MST_FPGA_PHYS 0x08000000
24: #define MST_ETH_PHYS 0x10000300
25: #define MST_FLASH_0 0x00000000
26: #define MST_FLASH_1 0x04000000
27:
28: /* IRQ definitions */
29: #define MMC_IRQ 0
30: #define USIM_IRQ 1
31: #define USBC_IRQ 2
32: #define ETHERNET_IRQ 3
33: #define AC97_IRQ 4
34: #define PEN_IRQ 5
35: #define MSINS_IRQ 6
36: #define EXBRD_IRQ 7
37: #define S0_CD_IRQ 9
38: #define S0_STSCHG_IRQ 10
39: #define S0_IRQ 11
40: #define S1_CD_IRQ 13
41: #define S1_STSCHG_IRQ 14
42: #define S1_IRQ 15
1.1 root 43:
44: static struct keymap map[0xE0] = {
45: [0 ... 0xDF] = { -1, -1 },
46: [0x1e] = {0,0}, /* a */
47: [0x30] = {0,1}, /* b */
48: [0x2e] = {0,2}, /* c */
49: [0x20] = {0,3}, /* d */
50: [0x12] = {0,4}, /* e */
51: [0x21] = {0,5}, /* f */
52: [0x22] = {1,0}, /* g */
53: [0x23] = {1,1}, /* h */
54: [0x17] = {1,2}, /* i */
55: [0x24] = {1,3}, /* j */
56: [0x25] = {1,4}, /* k */
57: [0x26] = {1,5}, /* l */
58: [0x32] = {2,0}, /* m */
59: [0x31] = {2,1}, /* n */
60: [0x18] = {2,2}, /* o */
61: [0x19] = {2,3}, /* p */
62: [0x10] = {2,4}, /* q */
63: [0x13] = {2,5}, /* r */
64: [0x1f] = {3,0}, /* s */
65: [0x14] = {3,1}, /* t */
66: [0x16] = {3,2}, /* u */
67: [0x2f] = {3,3}, /* v */
68: [0x11] = {3,4}, /* w */
69: [0x2d] = {3,5}, /* x */
70: [0x15] = {4,2}, /* y */
71: [0x2c] = {4,3}, /* z */
72: [0xc7] = {5,0}, /* Home */
73: [0x2a] = {5,1}, /* shift */
74: [0x39] = {5,2}, /* space */
75: [0x39] = {5,3}, /* space */
76: [0x1c] = {5,5}, /* enter */
77: [0xc8] = {6,0}, /* up */
78: [0xd0] = {6,1}, /* down */
79: [0xcb] = {6,2}, /* left */
80: [0xcd] = {6,3}, /* right */
81: };
82:
83: enum mainstone_model_e { mainstone };
84:
1.1.1.2 root 85: #define MAINSTONE_RAM 0x04000000
86: #define MAINSTONE_ROM 0x00800000
87: #define MAINSTONE_FLASH 0x02000000
88:
89: static struct arm_boot_info mainstone_binfo = {
90: .loader_start = PXA2XX_SDRAM_BASE,
91: .ram_size = 0x04000000,
92: };
93:
1.1.1.8 ! root 94: static void mainstone_common_init(MemoryRegion *address_space_mem,
! 95: ram_addr_t ram_size,
1.1.1.2 root 96: const char *kernel_filename,
1.1 root 97: const char *kernel_cmdline, const char *initrd_filename,
98: const char *cpu_model, enum mainstone_model_e model, int arm_id)
99: {
100: uint32_t sector_len = 256 * 1024;
101: target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
1.1.1.3 root 102: PXA2xxState *cpu;
1.1.1.7 root 103: DeviceState *mst_irq;
1.1.1.4 root 104: DriveInfo *dinfo;
105: int i;
1.1.1.5 root 106: int be;
1.1.1.8 ! root 107: MemoryRegion *rom = g_new(MemoryRegion, 1);
1.1 root 108:
109: if (!cpu_model)
110: cpu_model = "pxa270-c5";
111:
112: /* Setup CPU & memory */
1.1.1.8 ! root 113: cpu = pxa270_init(address_space_mem, mainstone_binfo.ram_size, cpu_model);
! 114: memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM);
! 115: memory_region_set_readonly(rom, true);
! 116: memory_region_add_subregion(address_space_mem, 0, rom);
1.1 root 117:
1.1.1.5 root 118: #ifdef TARGET_WORDS_BIGENDIAN
119: be = 1;
120: #else
121: be = 0;
122: #endif
1.1 root 123: /* There are two 32MiB flash devices on the board */
124: for (i = 0; i < 2; i ++) {
1.1.1.4 root 125: dinfo = drive_get(IF_PFLASH, 0, i);
126: if (!dinfo) {
1.1 root 127: fprintf(stderr, "Two flash images must be given with the "
128: "'pflash' parameter\n");
129: exit(1);
130: }
131:
1.1.1.8 ! root 132: if (!pflash_cfi01_register(mainstone_flash_base[i], NULL,
! 133: i ? "mainstone.flash1" : "mainstone.flash0",
! 134: MAINSTONE_FLASH,
1.1.1.5 root 135: dinfo->bdrv, sector_len,
136: MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0,
137: be)) {
1.1 root 138: fprintf(stderr, "qemu: Error registering flash memory.\n");
139: exit(1);
140: }
141: }
142:
1.1.1.7 root 143: mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
144: qdev_get_gpio_in(cpu->gpio, 0));
1.1 root 145:
146: /* setup keypad */
147: printf("map addr %p\n", &map);
148: pxa27x_register_keypad(cpu->kp, map, 0xe0);
149:
150: /* MMC/SD host */
1.1.1.7 root 151: pxa2xx_mmci_handlers(cpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
152:
153: pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
154: qdev_get_gpio_in(mst_irq, S0_IRQ),
155: qdev_get_gpio_in(mst_irq, S0_CD_IRQ));
156: pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
157: qdev_get_gpio_in(mst_irq, S1_IRQ),
158: qdev_get_gpio_in(mst_irq, S1_CD_IRQ));
1.1 root 159:
1.1.1.7 root 160: smc91c111_init(&nd_table[0], MST_ETH_PHYS,
161: qdev_get_gpio_in(mst_irq, ETHERNET_IRQ));
1.1 root 162:
1.1.1.2 root 163: mainstone_binfo.kernel_filename = kernel_filename;
164: mainstone_binfo.kernel_cmdline = kernel_cmdline;
165: mainstone_binfo.initrd_filename = initrd_filename;
166: mainstone_binfo.board_id = arm_id;
167: arm_load_kernel(cpu->env, &mainstone_binfo);
1.1 root 168: }
169:
1.1.1.3 root 170: static void mainstone_init(ram_addr_t ram_size,
1.1.1.2 root 171: const char *boot_device,
1.1 root 172: const char *kernel_filename, const char *kernel_cmdline,
173: const char *initrd_filename, const char *cpu_model)
174: {
1.1.1.8 ! root 175: mainstone_common_init(get_system_memory(), ram_size, kernel_filename,
1.1 root 176: kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196);
177: }
178:
1.1.1.3 root 179: static QEMUMachine mainstone2_machine = {
1.1.1.2 root 180: .name = "mainstone",
181: .desc = "Mainstone II (PXA27x)",
182: .init = mainstone_init,
1.1 root 183: };
1.1.1.3 root 184:
185: static void mainstone_machine_init(void)
186: {
187: qemu_register_machine(&mainstone2_machine);
188: }
189:
190: machine_init(mainstone_machine_init);
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.