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1.1 root 1: #ifndef QEMU_HW_MILKYMIST_H
2: #define QEMU_HW_MILKYMIST_H
3:
4: #include "qdev.h"
5: #include "qdev-addr.h"
6:
7: static inline DeviceState *milkymist_uart_create(target_phys_addr_t base,
8: qemu_irq rx_irq, qemu_irq tx_irq)
9: {
10: DeviceState *dev;
11:
12: dev = qdev_create(NULL, "milkymist-uart");
13: qdev_init_nofail(dev);
14: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
15: sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
16: sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
17:
18: return dev;
19: }
20:
21: static inline DeviceState *milkymist_hpdmc_create(target_phys_addr_t base)
22: {
23: DeviceState *dev;
24:
25: dev = qdev_create(NULL, "milkymist-hpdmc");
26: qdev_init_nofail(dev);
27: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
28:
29: return dev;
30: }
31:
32: static inline DeviceState *milkymist_memcard_create(target_phys_addr_t base)
33: {
34: DeviceState *dev;
35:
36: dev = qdev_create(NULL, "milkymist-memcard");
37: qdev_init_nofail(dev);
38: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
39:
40: return dev;
41: }
42:
43: static inline DeviceState *milkymist_vgafb_create(target_phys_addr_t base,
44: uint32_t fb_offset, uint32_t fb_mask)
45: {
46: DeviceState *dev;
47:
48: dev = qdev_create(NULL, "milkymist-vgafb");
49: qdev_prop_set_uint32(dev, "fb_offset", fb_offset);
50: qdev_prop_set_uint32(dev, "fb_mask", fb_mask);
51: qdev_init_nofail(dev);
52: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
53:
54: return dev;
55: }
56:
57: static inline DeviceState *milkymist_sysctl_create(target_phys_addr_t base,
58: qemu_irq gpio_irq, qemu_irq timer0_irq, qemu_irq timer1_irq,
59: uint32_t freq_hz, uint32_t system_id, uint32_t capabilities,
60: uint32_t gpio_strappings)
61: {
62: DeviceState *dev;
63:
64: dev = qdev_create(NULL, "milkymist-sysctl");
65: qdev_prop_set_uint32(dev, "frequency", freq_hz);
66: qdev_prop_set_uint32(dev, "systemid", system_id);
67: qdev_prop_set_uint32(dev, "capabilities", capabilities);
68: qdev_prop_set_uint32(dev, "gpio_strappings", gpio_strappings);
69: qdev_init_nofail(dev);
70: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
71: sysbus_connect_irq(sysbus_from_qdev(dev), 0, gpio_irq);
72: sysbus_connect_irq(sysbus_from_qdev(dev), 1, timer0_irq);
73: sysbus_connect_irq(sysbus_from_qdev(dev), 2, timer1_irq);
74:
75: return dev;
76: }
77:
78: static inline DeviceState *milkymist_pfpu_create(target_phys_addr_t base,
79: qemu_irq irq)
80: {
81: DeviceState *dev;
82:
83: dev = qdev_create(NULL, "milkymist-pfpu");
84: qdev_init_nofail(dev);
85: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
86: sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
87: return dev;
88: }
89:
90: #ifdef CONFIG_OPENGL
91: #include <X11/Xlib.h>
92: #include <GL/glx.h>
93: static const int glx_fbconfig_attr[] = {
94: GLX_GREEN_SIZE, 5,
95: GLX_GREEN_SIZE, 6,
96: GLX_BLUE_SIZE, 5,
97: None
98: };
99: #endif
100:
101: static inline DeviceState *milkymist_tmu2_create(target_phys_addr_t base,
102: qemu_irq irq)
103: {
104: #ifdef CONFIG_OPENGL
105: DeviceState *dev;
106: Display *d;
107: GLXFBConfig *configs;
108: int nelements;
109: int ver_major, ver_minor;
110:
111: if (display_type == DT_NOGRAPHIC) {
112: return NULL;
113: }
114:
115: /* check that GLX will work */
116: d = XOpenDisplay(NULL);
117: if (d == NULL) {
118: return NULL;
119: }
120:
121: if (!glXQueryVersion(d, &ver_major, &ver_minor)) {
122: /* Yeah, sometimes getting the GLX version can fail.
123: * Isn't X beautiful? */
124: XCloseDisplay(d);
125: return NULL;
126: }
127:
128: if ((ver_major < 1) || ((ver_major == 1) && (ver_minor < 3))) {
129: printf("Your GLX version is %d.%d,"
130: "but TMU emulation needs at least 1.3. TMU disabled.\n",
131: ver_major, ver_minor);
132: XCloseDisplay(d);
133: return NULL;
134: }
135:
136: configs = glXChooseFBConfig(d, 0, glx_fbconfig_attr, &nelements);
137: if (configs == NULL) {
138: XCloseDisplay(d);
139: return NULL;
140: }
141:
142: XFree(configs);
143: XCloseDisplay(d);
144:
145: dev = qdev_create(NULL, "milkymist-tmu2");
146: qdev_init_nofail(dev);
147: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
148: sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
149:
150: return dev;
151: #else
152: return NULL;
153: #endif
154: }
155:
156: static inline DeviceState *milkymist_ac97_create(target_phys_addr_t base,
157: qemu_irq crrequest_irq, qemu_irq crreply_irq, qemu_irq dmar_irq,
158: qemu_irq dmaw_irq)
159: {
160: DeviceState *dev;
161:
162: dev = qdev_create(NULL, "milkymist-ac97");
163: qdev_init_nofail(dev);
164: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
165: sysbus_connect_irq(sysbus_from_qdev(dev), 0, crrequest_irq);
166: sysbus_connect_irq(sysbus_from_qdev(dev), 1, crreply_irq);
167: sysbus_connect_irq(sysbus_from_qdev(dev), 2, dmar_irq);
168: sysbus_connect_irq(sysbus_from_qdev(dev), 3, dmaw_irq);
169:
170: return dev;
171: }
172:
173: static inline DeviceState *milkymist_minimac_create(target_phys_addr_t base,
174: qemu_irq rx_irq, qemu_irq tx_irq)
175: {
176: DeviceState *dev;
177:
178: qemu_check_nic_model(&nd_table[0], "minimac");
179: dev = qdev_create(NULL, "milkymist-minimac");
180: qdev_set_nic_properties(dev, &nd_table[0]);
181: qdev_init_nofail(dev);
182: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
183: sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
184: sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
185:
186: return dev;
187: }
188:
189: static inline DeviceState *milkymist_minimac2_create(target_phys_addr_t base,
190: target_phys_addr_t buffers_base, qemu_irq rx_irq, qemu_irq tx_irq)
191: {
192: DeviceState *dev;
193:
194: qemu_check_nic_model(&nd_table[0], "minimac2");
195: dev = qdev_create(NULL, "milkymist-minimac2");
196: qdev_prop_set_taddr(dev, "buffers_base", buffers_base);
197: qdev_set_nic_properties(dev, &nd_table[0]);
198: qdev_init_nofail(dev);
199: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
200: sysbus_connect_irq(sysbus_from_qdev(dev), 0, rx_irq);
201: sysbus_connect_irq(sysbus_from_qdev(dev), 1, tx_irq);
202:
203: return dev;
204: }
205:
206: static inline DeviceState *milkymist_softusb_create(target_phys_addr_t base,
207: qemu_irq irq, uint32_t pmem_base, uint32_t pmem_size,
208: uint32_t dmem_base, uint32_t dmem_size)
209: {
210: DeviceState *dev;
211:
212: dev = qdev_create(NULL, "milkymist-softusb");
213: qdev_prop_set_uint32(dev, "pmem_base", pmem_base);
214: qdev_prop_set_uint32(dev, "pmem_size", pmem_size);
215: qdev_prop_set_uint32(dev, "dmem_base", dmem_base);
216: qdev_prop_set_uint32(dev, "dmem_size", dmem_size);
217: qdev_init_nofail(dev);
218: sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
219: sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
220:
221: return dev;
222: }
223:
224: #endif /* QEMU_HW_MILKYMIST_H */
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